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From: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
To: Cezary Rojewski <cezary.rojewski@intel.com>, alsa-devel@alsa-project.org
Cc: broonie@kernel.org, tiwai@suse.com, lgirdwood@gmail.com
Subject: Re: [PATCH 27/35] ASoC: Intel: Skylake: Define platform descriptors
Date: Mon, 26 Aug 2019 12:13:38 -0500	[thread overview]
Message-ID: <12a90456-b8a0-adc3-755a-cfee3124f177@linux.intel.com> (raw)
In-Reply-To: <29c6bb0d-c236-a6c7-9a59-efb7ec42e145@intel.com>



On 8/24/19 5:51 AM, Cezary Rojewski wrote:
> On 2019-08-23 21:50, Pierre-Louis Bossart wrote:
>>
>>
>> On 8/22/19 2:04 PM, Cezary Rojewski wrote:
>>> Make use of sst_pdata and declare platform descriptors for all existing
>>> cAVS platforms. Each carries information about base_fw filename,
>>> platform specific operations and boards supported.
>>
>> if you use a constant base_fw name that cannot be made board-specific 
>> for specific usages, you will restrict the ability to deal with quirks 
>> and custom cases.
>>
>> real-life example: not so long ago there were two SST firmwares for 
>> 'regular' solutions and ultra-low-latency ones, so by having a single 
>> name for all APL-based platforms you will generate issues that don't 
>> exist today, or you will force users to patch something in the core.
>>
> 
> I did not bring up ULL case for a reason. Guess Pandora box is to be 
> opened.. so be it.
> 
> ULL stands for Ultra Low Latency and it can be described by the following:
> - exists only for APL based platforms (more like single platform/ model 
> though)
> - in consequence, binary isn't present on any other FW branch and any 
> other platform apart from APL
> - its existence is tied to hardware.. eh.. let's call it a "limitation"
> - number of actual vendors is too Ultra Low..
> - has limited functionality and validation
> - is not the recommended FW for end users in any case
> - binary is not going to be upstreamed
> - reference board is not going to be upstreamed
> - generic (so called main FW) and ULL share the board ACPI ID and thus 
> require kernel .config to be modified -or- blacklist.conf with be updated
> - shares topology filename with generic (main) FW so user still has to 
> modify his /lib/firmware. Topology names are currently NHLT-based, built 
> from NHLT header data and platform id which are BIOS/ ABL and platform 
> specific respectively
> (...)

I would describe your answer as 'whatabout-ism'. Yes there are plenty of 
ways to screw-up, none of them is a justification for assuming that a 
single filename will work for everyone.

There are also plenty of good reasons to use a different fw and topology 
file name. Taking this capability away essentially corners users into 
non-upstreamed custom versions.

> TLDR:
> There is total of 0 people sitting in front of their monitors who are 
> consciously going to make use of ULL firmware.
> Any user that is going to, will have to play with their kconfig, 
> blacklist and replace existing topology file.

that's where you are making too many assumptions, if quirks and dynamic 
detection capabilities are provided then it's possible to have a single 
kernel build that will deal with multiple configurations.

> This is normally done by titanic build-bot which, among billion other 
> things, ensures /lib/firmware looks like it should given the configuration.
> 
> -
> 
> So, one could have provided a nice choice-box within menuconfig to 
> ensure only one board can be chosen.
> When one does it, one realizes both generic and ULL firmwares are not 
> actually tied to any specific board and with more boards (usecases) and 
> more kconfigs code gets bloated.
> 
> Moving further, guarding apl_desc with #if-else depending on some global 
> generic-vs-ULL configuration which would adjust said descriptors with 
> proper FW filename actually seems like a better solution..
> 
> ..and then kBOOM comes in and actual design pattern!
> Board should have been stated tplg_filename, not the fw_filename. Said 
> topology file contains manifest which tells host what libraries to load. 
> And thus, we clear the mist and see that one single field (which is 
> currently missing in snd_soc_acpi_mach) and some clever topology 
> manifest make it all happen: platform-board conflicts cease to exist.

I am not going to argue further. I've spent a lot of time making sure 
the same kernel build can be used across multiple platforms, if you want 
to stick to static custom configurations I am not interested in 
debating. I just hope your team has enough support folks to deal with 
all these configurations.

> 
> Czarek
> 
>>>
>>> Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
>>> ---
>>>   sound/soc/intel/skylake/bxt-sst.c |  4 ++--
>>>   sound/soc/intel/skylake/cnl-sst.c |  4 ++--
>>>   sound/soc/intel/skylake/skl-sst.c |  4 ++--
>>>   sound/soc/intel/skylake/skl.c     | 38 ++++++++++++++++++++++++++++++-
>>>   sound/soc/intel/skylake/skl.h     |  3 +++
>>>   5 files changed, 46 insertions(+), 7 deletions(-)
>>>
>>> diff --git a/sound/soc/intel/skylake/bxt-sst.c 
>>> b/sound/soc/intel/skylake/bxt-sst.c
>>> index a547fb84eee9..06da822790a5 100644
>>> --- a/sound/soc/intel/skylake/bxt-sst.c
>>> +++ b/sound/soc/intel/skylake/bxt-sst.c
>>> @@ -531,7 +531,7 @@ static const struct skl_dsp_fw_ops bxt_fw_ops = {
>>>       .load_library = bxt_load_library,
>>>   };
>>> -static struct sst_ops skl_ops = {
>>> +struct sst_ops apl_sst_ops = {
>>>       .irq_handler = skl_dsp_sst_interrupt,
>>>       .thread_fn = skl_dsp_irq_thread_handler,
>>>       .write = sst_shim32_write,
>>> @@ -542,7 +542,7 @@ static struct sst_ops skl_ops = {
>>>   };
>>>   static struct sst_pdata skl_dev = {
>>> -    .ops = &skl_ops,
>>> +    .ops = &apl_sst_ops,
>>>   };
>>>   int bxt_sst_dsp_init(struct skl_dev *skl, const char *fw_name)
>>> diff --git a/sound/soc/intel/skylake/cnl-sst.c 
>>> b/sound/soc/intel/skylake/cnl-sst.c
>>> index 5be0a8eb154d..c4dbf6655097 100644
>>> --- a/sound/soc/intel/skylake/cnl-sst.c
>>> +++ b/sound/soc/intel/skylake/cnl-sst.c
>>> @@ -408,7 +408,7 @@ static int cnl_ipc_init(struct device *dev, 
>>> struct skl_dev *cnl)
>>>       return 0;
>>>   }
>>> -static struct sst_ops cnl_ops = {
>>> +struct sst_ops cnl_sst_ops = {
>>>       .irq_handler = cnl_dsp_sst_interrupt,
>>>       .thread_fn = cnl_dsp_irq_thread_handler,
>>>       .write = sst_shim32_write,
>>> @@ -419,7 +419,7 @@ static struct sst_ops cnl_ops = {
>>>   };
>>>   static struct sst_pdata cnl_dev = {
>>> -    .ops = &cnl_ops,
>>> +    .ops = &cnl_sst_ops,
>>>   };
>>>   int cnl_sst_dsp_init(struct skl_dev *cnl, const char *fw_name)
>>> diff --git a/sound/soc/intel/skylake/skl-sst.c 
>>> b/sound/soc/intel/skylake/skl-sst.c
>>> index 8ae7fe73534e..122c07290440 100644
>>> --- a/sound/soc/intel/skylake/skl-sst.c
>>> +++ b/sound/soc/intel/skylake/skl-sst.c
>>> @@ -503,7 +503,7 @@ static const struct skl_dsp_fw_ops skl_fw_ops = {
>>>       .unload_mod = skl_unload_module,
>>>   };
>>> -static struct sst_ops skl_ops = {
>>> +struct sst_ops skl_sst_ops = {
>>>       .irq_handler = skl_dsp_sst_interrupt,
>>>       .write = sst_shim32_write,
>>>       .read = sst_shim32_read,
>>> @@ -513,7 +513,7 @@ static struct sst_ops skl_ops = {
>>>   };
>>>   static struct sst_pdata skl_dev = {
>>> -    .ops = &skl_ops,
>>> +    .ops = &skl_sst_ops,
>>>   };
>>>   int skl_sst_dsp_init(struct skl_dev *skl, const char *fw_name)
>>> diff --git a/sound/soc/intel/skylake/skl.c 
>>> b/sound/soc/intel/skylake/skl.c
>>> index 54e1f957121d..d6d099aba834 100644
>>> --- a/sound/soc/intel/skylake/skl.c
>>> +++ b/sound/soc/intel/skylake/skl.c
>>> @@ -27,6 +27,7 @@
>>>   #include <sound/hda_i915.h>
>>>   #include <sound/hda_codec.h>
>>>   #include <sound/intel-nhlt.h>
>>> +#include "../common/sst-dsp.h"
>>>   #include "skl.h"
>>>   #include "skl-sst-dsp.h"
>>>   #include "skl-sst-ipc.h"
>>> @@ -1063,7 +1064,6 @@ static int skl_probe(struct pci_dev *pci,
>>>       pci_set_drvdata(skl->pci, bus);
>>> -
>>>       err = skl_find_machine(skl, (void *)pci_id->driver_data);
>>>       if (err < 0) {
>>>           dev_err(bus->dev, "skl_find_machine failed with err: %d\n", 
>>> err);
>>> @@ -1153,6 +1153,42 @@ static void skl_remove(struct pci_dev *pci)
>>>       dev_set_drvdata(&pci->dev, NULL);
>>>   }
>>> +static struct sst_pdata skl_desc = {
>>> +    .fw_name = "intel/dsp_fw_release.bin",
>>> +    .ops = &skl_sst_ops,
>>> +    .boards = snd_soc_acpi_intel_skl_machines,
>>> +};
>>> +
>>> +static struct sst_pdata kbl_desc = {
>>> +    .fw_name = "intel/dsp_fw_kbl.bin",
>>> +    .ops = &skl_sst_ops,
>>> +    .boards = snd_soc_acpi_intel_kbl_machines,
>>> +};
>>> +
>>> +static struct sst_pdata apl_desc = {
>>> +    .fw_name = "intel/dsp_fw_bxtn.bin",
>>> +    .ops = &apl_sst_ops,
>>> +    .boards = snd_soc_acpi_intel_bxt_machines,
>>> +};
>>> +
>>> +static struct sst_pdata glk_desc = {
>>> +    .fw_name = "intel/dsp_fw_glk.bin",
>>> +    .ops = &apl_sst_ops,
>>> +    .boards = snd_soc_acpi_intel_glk_machines,
>>> +};
>>> +
>>> +static struct sst_pdata cnl_desc = {
>>> +    .fw_name = "intel/dsp_fw_cnl.bin",
>>> +    .ops = &cnl_sst_ops,
>>> +    .boards = snd_soc_acpi_intel_cnl_machines,
>>> +};
>>> +
>>> +static struct sst_pdata icl_desc = {
>>> +    .fw_name = "intel/dsp_fw_icl.bin",
>>> +    .ops = &cnl_sst_ops,
>>> +    .boards = snd_soc_acpi_intel_icl_machines,
>>> +};
>>> +
>>>   /* PCI IDs */
>>>   static const struct pci_device_id skl_ids[] = {
>>>   #if IS_ENABLED(CONFIG_SND_SOC_INTEL_SKL)
>>> diff --git a/sound/soc/intel/skylake/skl.h 
>>> b/sound/soc/intel/skylake/skl.h
>>> index 9f5aa53df9f8..2f2b5a141abf 100644
>>> --- a/sound/soc/intel/skylake/skl.h
>>> +++ b/sound/soc/intel/skylake/skl.h
>>> @@ -42,6 +42,9 @@
>>>   #define AZX_REG_VS_EM2_L1SEN        BIT(13)
>>>   struct skl_debug;
>>> +extern struct sst_ops skl_sst_ops;
>>> +extern struct sst_ops apl_sst_ops;
>>> +extern struct sst_ops cnl_sst_ops;
>>>   struct skl_astate_param {
>>>       u32 kcps;
>>>
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  reply	other threads:[~2019-08-26 18:55 UTC|newest]

Thread overview: 107+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-22 19:03 [PATCH 00/35] ASoC: Intel: Clenaup SST initialization Cezary Rojewski
2019-08-22 19:03 ` [PATCH 01/35] ASoC: Intel: Skylake: Put FW runtime params defs in one place Cezary Rojewski
2019-08-22 19:03 ` [PATCH 02/35] ASoC: Intel: Skylake: Add FIRMWARE_CONFIG IPC request Cezary Rojewski
2019-08-23 18:24   ` Pierre-Louis Bossart
2019-08-24  9:17     ` Cezary Rojewski
2019-08-26 16:27       ` Pierre-Louis Bossart
2019-08-26 19:34         ` Cezary Rojewski
2019-08-22 19:03 ` [PATCH 03/35] ASoC: Intel: Skylake: Add HARDWARE_CONFIG " Cezary Rojewski
2019-08-23 18:32   ` Pierre-Louis Bossart
2019-08-24  9:30     ` Cezary Rojewski
2019-08-22 19:03 ` [PATCH 04/35] ASoC: Intel: Skylake: Unify firmware loading mechanism Cezary Rojewski
2019-08-23 18:40   ` Pierre-Louis Bossart
2019-08-24  9:34     ` Cezary Rojewski
2019-08-26 16:31       ` Pierre-Louis Bossart
2019-08-26 19:50         ` Cezary Rojewski
2019-08-22 19:03 ` [PATCH 05/35] ASoC: Intel: Skylake: Reload libraries on D0 entry for CNL Cezary Rojewski
2019-08-22 19:03 ` [PATCH 06/35] ASoC: Intel: Skylake: Unhardcode dsp cores number Cezary Rojewski
2019-08-22 19:03 ` [PATCH 07/35] ASoC: Intel: Skylake: Update interrupt disabling routine Cezary Rojewski
2019-08-22 19:03 ` [PATCH 08/35] ASoC: Intel: Skylake: Inline ipc free operations Cezary Rojewski
2019-08-22 19:03 ` [PATCH 09/35] ASoC: Intel: Skylake: Unify driver cleanup mechanism Cezary Rojewski
2019-08-22 19:04 ` [PATCH 10/35] ASoC: Intel: Relocate irq thread header to sst_ops Cezary Rojewski
2019-08-22 19:04 ` [PATCH 11/35] ASoC: Intel: Merge sst_dsp_device into sst_pdata Cezary Rojewski
2019-08-23 18:54   ` Pierre-Louis Bossart
2019-08-24 10:52     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 12/35] ASoC: Intel: Skylake: Reuse sst_dsp_free Cezary Rojewski
2019-08-23 19:07   ` Pierre-Louis Bossart
2019-08-24  9:35     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 13/35] ASoC: Intel: Skylake: Reuse sst_dsp_new Cezary Rojewski
2019-08-23 19:09   ` Pierre-Louis Bossart
2019-08-24  9:37     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 14/35] ASoC: Intel: Skylake: Remove skl_dsp_acquire_irq Cezary Rojewski
2019-08-22 19:04 ` [PATCH 15/35] ASoC: Intel: Skylake: Use dsp loading functions directly Cezary Rojewski
2019-08-23 19:17   ` Pierre-Louis Bossart
2019-08-24  9:41     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 16/35] ASoC: Intel: Skylake: Make dsp_ops::stream_tag obsolete Cezary Rojewski
2019-08-22 19:04 ` [PATCH 17/35] ASoC: Intel: Skylake: Remove skl_dsp_loader_ops Cezary Rojewski
2019-08-23 19:21   ` Pierre-Louis Bossart
2019-08-24  9:49     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 18/35] ASoC: Intel: Skylake: Remove window0 sst_addr fields Cezary Rojewski
2019-08-23 19:26   ` Pierre-Louis Bossart
2019-08-24  9:57     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 19/35] ASoC: Intel: Skylake: Remove redundant W0 and W1 macros Cezary Rojewski
2019-08-23 19:28   ` Pierre-Louis Bossart
2019-08-24 11:52     ` Cezary Rojewski
2019-08-24 12:04       ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 20/35] ASoC: Intel: Skylake: Remove redundant SRAM fields Cezary Rojewski
2019-08-22 19:04 ` [PATCH 21/35] ASoC: Intel: Expose ACPI loading members Cezary Rojewski
2019-08-23 19:32   ` Pierre-Louis Bossart
2019-08-24  9:58     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 22/35] ASoC: Intel: Haswell: Define separate ACPI loader Cezary Rojewski
2019-08-23 19:35   ` Pierre-Louis Bossart
2019-08-24  9:59     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 23/35] ASoC: Intel: Baytrail: " Cezary Rojewski
2019-08-23 19:36   ` Pierre-Louis Bossart
2019-08-22 19:04 ` [PATCH 24/35] ASoC: Intel: Refactor probing of ACPI devices Cezary Rojewski
2019-08-23 19:43   ` Pierre-Louis Bossart
2019-08-24 10:16     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 25/35] ASoC: Intel: Skylake: Simplify skl_sst_ctx_init declaration Cezary Rojewski
2019-08-22 19:04 ` [PATCH 26/35] ASoC: Intel: Skylake: Simplify all sst_dsp_init declarations Cezary Rojewski
2019-08-22 19:04 ` [PATCH 27/35] ASoC: Intel: Skylake: Define platform descriptors Cezary Rojewski
2019-08-23 19:50   ` Pierre-Louis Bossart
2019-08-24 10:51     ` Cezary Rojewski
2019-08-26 17:13       ` Pierre-Louis Bossart [this message]
2019-08-26 19:18         ` Cezary Rojewski
2019-08-26 21:53           ` Pierre-Louis Bossart
2019-08-22 19:04 ` [PATCH 28/35] ASoC: Intel: Skylake: Update skl_ids table Cezary Rojewski
2019-08-23 20:15   ` Pierre-Louis Bossart
2019-08-22 19:04 ` [PATCH 29/35] ASoC: Intel: Skylake: Flip SST initialization order Cezary Rojewski
2019-08-23 20:18   ` Pierre-Louis Bossart
2019-08-24 10:54     ` Cezary Rojewski
2019-08-26 16:39       ` Pierre-Louis Bossart
2019-08-26 20:03         ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 30/35] ASoC: Intel: Reuse sst_pdata::fw_name field Cezary Rojewski
2019-08-23 20:20   ` Pierre-Louis Bossart
2019-08-24 10:57     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 31/35] ASoC: Intel: Reuse sst_pdata::fw field Cezary Rojewski
2019-08-22 19:04 ` [PATCH 32/35] ASoC: Intel: Skylake: Remove skl_dsp_ops Cezary Rojewski
2019-08-22 19:04 ` [PATCH 33/35] ASoC: Intel: Skylake: Privatize SST init handlers Cezary Rojewski
2019-08-23 20:25   ` Pierre-Louis Bossart
2019-08-24 11:01     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 34/35] ASoC: Intel: Skylake: Merge skl_sst_ctx_init into skl_init_dsp Cezary Rojewski
2019-08-22 19:04 ` [PATCH 35/35] ASoC: Intel: Remove obsolete firmware fields Cezary Rojewski
2019-08-23 20:27   ` Pierre-Louis Bossart
2019-08-24 11:02     ` Cezary Rojewski
2019-08-22 20:55 ` [PATCH 00/35] ASoC: Intel: Clenaup SST initialization Pierre-Louis Bossart
2019-08-23  8:29   ` Cezary Rojewski
2019-08-23 10:26     ` Mark Brown
2019-08-23 10:43       ` Cezary Rojewski
2019-08-23 16:26         ` Pierre-Louis Bossart
2019-08-23 18:44           ` Cezary Rojewski
2019-08-23 20:12             ` Pierre-Louis Bossart
2019-08-23 21:39               ` Mark Brown
2019-08-24 13:51                 ` Cezary Rojewski
2019-08-25 11:06                   ` Cezary Rojewski
2019-08-26  7:24                     ` Wasko, Michal
2019-08-26 16:51                       ` Pierre-Louis Bossart
2019-08-26 20:08                         ` Cezary Rojewski
2019-08-26 21:57                           ` Pierre-Louis Bossart
2019-08-27  8:33                             ` Wasko, Michal
2019-08-27 13:52                               ` Pierre-Louis Bossart
2019-08-27 14:58                                 ` Cezary Rojewski
2019-08-27 15:00                                   ` Pierre-Louis Bossart
2019-08-27 15:08                                     ` Cezary Rojewski
2019-08-27 17:18                                       ` Pierre-Louis Bossart
2019-08-27 18:13                                         ` Cezary Rojewski
2019-08-27 19:20                                         ` Mark Brown
2019-08-27 19:06                         ` Mark Brown

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