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From: Daniel Vetter <daniel.vetter@ffwll.ch>
To: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Subject: [PATCH 00/10] bpc handling fixes
Date: Fri, 22 Feb 2013 01:04:55 +0100	[thread overview]
Message-ID: <1361491513-14231-1-git-send-email-daniel.vetter@ffwll.ch> (raw)

Hi all,

To actually be able to implement fdi link bpc dithering we need to have working
plane/pipe bpp handling. The current code doesn't manage that - I've had way too
many black screens and other funny issues.

Note that I currently lack a high-color-depth screen, so I couldn't test
anything with a 10bpc dp screen or a 12bpc hdmi capable screen. Anyone who has
such a thing, testing highly welcome.

After these patches I can at least fire up X in any sane bitdepth and things
still work.

Cheers, Daniel

Daniel Vetter (10):
  drm/i915: use pipe_config for lvds dithering
  drm/i915: consolidate pch pll computations a bit
  drm/i915: fixup 12bpc hdmi dotclock handling
  drm/i915: Disable high-bpc on pre-1.4 EDID screens
  drm/i915: force bpp for eDP panels
  drm/i915: extract i9xx_set_pipeconf
  drm/i915: drop adjusted_mode from *_set_pipeconf functions
  drm/i915: implement high-bpc + pipeconf-dither support for g4x/vlv
  drm/i915: allow high-bpc modes on DP
  drm/i915: Fixup non-24bpp support for VGA screens on Haswell

 drivers/gpu/drm/i915/intel_crt.c     |   4 +
 drivers/gpu/drm/i915/intel_display.c | 179 ++++++++++++++++++-----------------
 drivers/gpu/drm/i915/intel_dp.c      |  13 ++-
 drivers/gpu/drm/i915/intel_drv.h     |   5 +
 drivers/gpu/drm/i915/intel_hdmi.c    |  23 ++++-
 drivers/gpu/drm/i915/intel_lvds.c    |  14 +--
 6 files changed, 139 insertions(+), 99 deletions(-)

-- 
1.7.11.4

             reply	other threads:[~2013-02-22  0:05 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-02-22  0:04 Daniel Vetter [this message]
2013-02-22  0:04 ` [PATCH 1/8] drm/i915: clear up the fdi/dp set_m_n confusion Daniel Vetter
2013-02-22  0:04 ` [PATCH 01/10] drm/i915: use pipe_config for lvds dithering Daniel Vetter
2013-02-22  0:04 ` [PATCH 02/10] drm/i915: consolidate pch pll computations a bit Daniel Vetter
2013-02-22  0:04 ` [PATCH 2/8] drm/i915: move dp_m_n computation to dp_encoder->compute_config Daniel Vetter
2013-02-22  0:05 ` [PATCH 03/10] drm/i915: fixup 12bpc hdmi dotclock handling Daniel Vetter
2013-02-22  0:05 ` [PATCH 3/8] drm/i915: track dp target_clock in pipe_config Daniel Vetter
2013-02-22  0:05 ` [PATCH 04/10] drm/i915: Disable high-bpc on pre-1.4 EDID screens Daniel Vetter
2013-02-22  0:05 ` [PATCH 4/8] drm/i915: rip out superflous is_dp&is_cpu_edp tracking Daniel Vetter
2013-02-22  0:05 ` [PATCH 5/8] drm/i915: add hw state readout/checking for pipe_config Daniel Vetter
2013-02-22  0:05 ` [PATCH 05/10] drm/i915: force bpp for eDP panels Daniel Vetter
2013-02-22  6:50   ` Jani Nikula
2013-02-22 11:10     ` [PATCH] " Daniel Vetter
2013-02-22  0:05 ` [PATCH 06/10] drm/i915: extract i9xx_set_pipeconf Daniel Vetter
2013-02-22  0:05 ` [PATCH 6/8] drm/i915: hw readout support for ->has_pch_encoders Daniel Vetter
2013-02-22  0:05 ` [PATCH 7/8] drm/i915: create pipe_config->dpll for clock state Daniel Vetter
2013-02-22  0:05 ` [PATCH 07/10] drm/i915: drop adjusted_mode from *_set_pipeconf functions Daniel Vetter
2013-02-22  0:05 ` [PATCH 08/10] drm/i915: implement high-bpc + pipeconf-dither support for g4x/vlv Daniel Vetter
2013-02-22  0:05 ` [PATCH 8/8] drm/i915: move dp clock computations to encoder->compute_config Daniel Vetter
2013-02-22  0:05 ` [PATCH 09/10] drm/i915: allow high-bpc modes on DP Daniel Vetter
2013-02-22  0:05 ` [PATCH 10/10] drm/i915: Fixup non-24bpp support for VGA screens on Haswell Daniel Vetter

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