Re: [PATCH 05/10] drm/i915: force bpp for eDP panels

From: Jani Nikula <jani.nikula@intel.com>
To: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Subject: Re: [PATCH 05/10] drm/i915: force bpp for eDP panels
Date: Fri, 22 Feb 2013 08:50:36 +0200	[thread overview]
Message-ID: <87zjywon9f.fsf@intel.com> (raw)
In-Reply-To: <1361491513-14231-11-git-send-email-daniel.vetter@ffwll.ch>

On Fri, 22 Feb 2013, Daniel Vetter <daniel.vetter@ffwll.ch> wrote:
> We'ev had our fair share of woes already which showed that we can't
     ^^

> rely on the bpc limits in the EDID for eDP panels without risking
> black screens. So now we limit the depth by what the BIOS recommends
> in the VBT:
>
> commit 2f4f649a69a9eb51f6e98130e19dd90a260a4145
> Author: Jani Nikula <jani.nikula@intel.com>
> Date:   Mon Nov 12 14:33:44 2012 +0200
>
>     drm/i915: do not ignore eDP bpc settings from vbt
>
> But that's not enough, since at least the panel on my ASUS Zenbook
> Prime here is also unhappy if the bpc is too low. Hence just take the
> firmware value and dither to get what flimsy panels want.
>
> Like before we ensure that we don't change the bpp if the firmware
> doesn't proved a value, see

s/proved/provide/

> commit 2f4f649a69a9eb51f6e98130e19dd90a260a4145
> Author: Jani Nikula <jani.nikula@intel.com>
> Date:   Mon Nov 12 14:33:44 2012 +0200
>
>     drm/i915: do not ignore eDP bpc settings from vbt

That's the same reference as above. Perhaps you mean:

commit 9a30a61f3516871c5c638fd7c025fbaa11ddf7fe
Author: Jani Nikula <jani.nikula@intel.com>
Date:   Mon Nov 12 14:33:45 2012 +0200

    drm/i915: do not default to 18 bpp for eDP if missing from VBT

With that and a few typos here and there sorted out,
Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> Cc: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> ---
>  drivers/gpu/drm/i915/intel_dp.c | 11 +++++++++--
>  1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 83e3791..81693fc 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -755,8 +755,15 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>  	/* Walk through all bpp values. Luckily they're all nicely spaced with 2
>  	 * bpc in between. */
>  	bpp = min_t(int, 8*3, pipe_config->pipe_bpp);
> -	if (is_edp(intel_dp) && dev_priv->edp.bpp)
> -		bpp = min_t(int, bpp, dev_priv->edp.bpp);
> +
> +	/* eDP panels are really fickle, try to enfore the bpp the firmware
                                                     ^

> +	 * recomments. This means we'll up-dither 16bpp framebuffers on
                   ^

> +	 * high-depth panels. */
> +	if (is_edp(intel_dp) && dev_priv->edp.bpp) {
> +		DRM_DEBUG_KMS("forcing bpp for eDP panel to BIOS-provided %i\n",
> +			      dev_priv->edp.bpp);
> +		bpp = dev_priv->edp.bpp;
> +	}
>  
>  	for (; bpp >= 6*3; bpp -= 2*3) {
>  		mode_rate = intel_dp_link_required(target_clock, bpp);
> -- 
> 1.7.11.4