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From: Stephen Boyd <sboyd@codeaurora.org>
To: linux-edac@vger.kernel.org
Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org
Subject: [PATCH 4/6] edac: Document Krait L1/L2 EDAC driver binding
Date: Mon, 28 Oct 2013 17:31:28 -0700	[thread overview]
Message-ID: <1383006690-6754-5-git-send-email-sboyd@codeaurora.org> (raw)
In-Reply-To: <1383006690-6754-1-git-send-email-sboyd@codeaurora.org>

The Krait L1/L2 error reporting device is made up of two
interrupts, one per-CPU interrupt for the L1 caches and one
interrupt for the L2 cache.

Cc: <devicetree@vger.kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
 .../devicetree/bindings/arm/qcom,krait-cache-erp.txt     | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/qcom,krait-cache-erp.txt

diff --git a/Documentation/devicetree/bindings/arm/qcom,krait-cache-erp.txt b/Documentation/devicetree/bindings/arm/qcom,krait-cache-erp.txt
new file mode 100644
index 0000000..01fe8a8
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/qcom,krait-cache-erp.txt
@@ -0,0 +1,16 @@
+* Qualcomm Krait L1 / L2 cache error reporting
+
+Required properties:
+- compatible: Should be "qcom,krait-cache-erp"
+- interrupts: Should contain the L1/CPU error interrupt number and
+  then the L2 cache error interrupt number
+
+Optional properties:
+- interrupt-names: Should contain the interrupt names "l1_irq" and
+  "l2_irq"
+
+Example:
+	edac {
+		compatible = "qcom,krait-cache-erp";
+		interrupts = <1 9 0xf04>, <0 2 0x4>;
+	};
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation

WARNING: multiple messages have this Message-ID (diff)
From: Stephen Boyd <sboyd@codeaurora.org>
To: linux-edac@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	<devicetree@vger.kernel.org>
Subject: [PATCH 4/6] edac: Document Krait L1/L2 EDAC driver binding
Date: Mon, 28 Oct 2013 17:31:28 -0700	[thread overview]
Message-ID: <1383006690-6754-5-git-send-email-sboyd@codeaurora.org> (raw)
In-Reply-To: <1383006690-6754-1-git-send-email-sboyd@codeaurora.org>

The Krait L1/L2 error reporting device is made up of two
interrupts, one per-CPU interrupt for the L1 caches and one
interrupt for the L2 cache.

Cc: <devicetree@vger.kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
 .../devicetree/bindings/arm/qcom,krait-cache-erp.txt     | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/qcom,krait-cache-erp.txt

diff --git a/Documentation/devicetree/bindings/arm/qcom,krait-cache-erp.txt b/Documentation/devicetree/bindings/arm/qcom,krait-cache-erp.txt
new file mode 100644
index 0000000..01fe8a8
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/qcom,krait-cache-erp.txt
@@ -0,0 +1,16 @@
+* Qualcomm Krait L1 / L2 cache error reporting
+
+Required properties:
+- compatible: Should be "qcom,krait-cache-erp"
+- interrupts: Should contain the L1/CPU error interrupt number and
+  then the L2 cache error interrupt number
+
+Optional properties:
+- interrupt-names: Should contain the interrupt names "l1_irq" and
+  "l2_irq"
+
+Example:
+	edac {
+		compatible = "qcom,krait-cache-erp";
+		interrupts = <1 9 0xf04>, <0 2 0x4>;
+	};
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation


WARNING: multiple messages have this Message-ID (diff)
From: sboyd@codeaurora.org (Stephen Boyd)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 4/6] edac: Document Krait L1/L2 EDAC driver binding
Date: Mon, 28 Oct 2013 17:31:28 -0700	[thread overview]
Message-ID: <1383006690-6754-5-git-send-email-sboyd@codeaurora.org> (raw)
In-Reply-To: <1383006690-6754-1-git-send-email-sboyd@codeaurora.org>

The Krait L1/L2 error reporting device is made up of two
interrupts, one per-CPU interrupt for the L1 caches and one
interrupt for the L2 cache.

Cc: <devicetree@vger.kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
 .../devicetree/bindings/arm/qcom,krait-cache-erp.txt     | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/qcom,krait-cache-erp.txt

diff --git a/Documentation/devicetree/bindings/arm/qcom,krait-cache-erp.txt b/Documentation/devicetree/bindings/arm/qcom,krait-cache-erp.txt
new file mode 100644
index 0000000..01fe8a8
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/qcom,krait-cache-erp.txt
@@ -0,0 +1,16 @@
+* Qualcomm Krait L1 / L2 cache error reporting
+
+Required properties:
+- compatible: Should be "qcom,krait-cache-erp"
+- interrupts: Should contain the L1/CPU error interrupt number and
+  then the L2 cache error interrupt number
+
+Optional properties:
+- interrupt-names: Should contain the interrupt names "l1_irq" and
+  "l2_irq"
+
+Example:
+	edac {
+		compatible = "qcom,krait-cache-erp";
+		interrupts = <1 9 0xf04>, <0 2 0x4>;
+	};
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation

  parent reply	other threads:[~2013-10-29  0:31 UTC|newest]

Thread overview: 61+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-10-29  0:31 [PATCH 0/6] Krait L1/L2 EDAC driver Stephen Boyd
2013-10-29  0:31 ` Stephen Boyd
2013-10-29  0:31 ` [PATCH 1/6] edac: Don't try to cancel workqueue when it's never setup Stephen Boyd
2013-10-29  0:31   ` Stephen Boyd
2013-10-29 20:48   ` Borislav Petkov
2013-10-29 20:48     ` Borislav Petkov
2013-10-29 20:51     ` Stephen Boyd
2013-10-29 20:51       ` Stephen Boyd
2013-10-29  0:31 ` [PATCH 2/6] genirq: export percpu irq functions for module usage Stephen Boyd
2013-10-29  0:31   ` Stephen Boyd
2013-10-29 12:54   ` Thomas Gleixner
2013-10-29 12:54     ` Thomas Gleixner
2013-10-29  0:31 ` [PATCH 3/6] ARM: Add Krait L2 accessor functions Stephen Boyd
2013-10-29  0:31   ` Stephen Boyd
2013-10-29  1:19   ` Mark Rutland
2013-10-29  1:19     ` Mark Rutland
2013-10-29  1:19     ` Mark Rutland
2013-10-29  1:21     ` Stephen Boyd
2013-10-29  1:21       ` Stephen Boyd
2013-10-29  1:21       ` Stephen Boyd
2013-10-29  1:32       ` Mark Rutland
2013-10-29  1:32         ` Mark Rutland
2013-10-29  1:32         ` Mark Rutland
2013-10-29  5:05         ` Stephen Boyd
2013-10-29  5:05           ` Stephen Boyd
2013-10-29  5:05           ` Stephen Boyd
2013-10-29  0:31 ` Stephen Boyd [this message]
2013-10-29  0:31   ` [PATCH 4/6] edac: Document Krait L1/L2 EDAC driver binding Stephen Boyd
2013-10-29  0:31   ` Stephen Boyd
2013-10-29  1:34   ` Mark Rutland
2013-10-29  1:34     ` Mark Rutland
2013-10-29  1:34     ` Mark Rutland
2013-10-29  5:06     ` Stephen Boyd
2013-10-29  5:06       ` Stephen Boyd
2013-10-29  5:06       ` Stephen Boyd
2013-10-30  0:34       ` Mark Rutland
2013-10-30  0:34         ` Mark Rutland
2013-10-30  0:34         ` Mark Rutland
     [not found]   ` <1383006690-6754-5-git-send-email-sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2013-10-29  8:21     ` Kumar Gala
2013-10-29  8:21       ` Kumar Gala
2013-10-29  8:21       ` Kumar Gala
2013-10-29 18:00       ` Stephen Boyd
2013-10-29 18:00         ` Stephen Boyd
2013-10-29 20:22         ` Olof Johansson
2013-10-29 20:22           ` Olof Johansson
2013-10-29 20:22           ` Olof Johansson
2013-10-30  0:07         ` Stephen Boyd
2013-10-30  0:07           ` Stephen Boyd
2013-10-30  0:38         ` Mark Rutland
2013-10-30  0:38           ` Mark Rutland
2013-10-30  0:38           ` Mark Rutland
2013-10-30  7:19           ` Kumar Gala
2013-10-30  7:19             ` Kumar Gala
2013-10-30  7:19             ` Kumar Gala
2013-10-29  0:31 ` [PATCH 5/6] edac: Add support for Krait CPU cache error detection Stephen Boyd
2013-10-29  0:31   ` Stephen Boyd
2013-10-29  1:28   ` Mark Rutland
2013-10-29  1:28     ` Mark Rutland
2013-10-29  1:28     ` Mark Rutland
2013-10-29  0:31 ` [PATCH 6/6] ARM: dts: msm: Add Krait edac node Stephen Boyd
2013-10-29  0:31   ` Stephen Boyd

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