From: Kumar Gala <galak@codeaurora.org> To: Kishon Vijay Abraham I <kishon@ti.com>, Tejun Heo <tj@kernel.org>, Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>, Mark Rutland <mark.rutland@arm.com>, Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org>, linux-ide@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/2] phy: qcom: Add device tree bindings information Date: Thu, 12 Jun 2014 14:18:44 -0500 [thread overview] Message-ID: <1402600724-20651-2-git-send-email-galak@codeaurora.org> (raw) In-Reply-To: <1402600724-20651-1-git-send-email-galak@codeaurora.org> Add binding spec for Qualcomm SoC PHYs, starting with the SATA PHY on the IPQ806x family of SoCs. Signed-off-by: Kumar Gala <galak@codeaurora.org> --- Documentation/devicetree/bindings/phy/qcom-phy.txt | 23 ++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/qcom-phy.txt diff --git a/Documentation/devicetree/bindings/phy/qcom-phy.txt b/Documentation/devicetree/bindings/phy/qcom-phy.txt new file mode 100644 index 0000000..76bfbd0 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom-phy.txt @@ -0,0 +1,23 @@ +Qualcomm IPQ806x SATA PHY Controller +------------------------------------ + +SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers. +Each SATA PHY controller should have its own node. + +Required properties: +- compatible: compatible list, contains "qcom,ipq806x-sata-phy" +- reg: offset and length of the SATA PHY register set; +- #phy-cells: must be zero +- clocks: must be exactly one entry +- clock-names: must be "cfg" + +Example: + sata_phy: sata-phy@1b400000 { + compatible = "qcom,ipq806x-sata-phy"; + reg = <0x1b400000 0x200>; + + clocks = <&gcc SATA_PHY_CFG_CLK>; + clock-names = "cfg"; + + #phy-cells = <0>; + }; -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation
WARNING: multiple messages have this Message-ID (diff)
From: galak@codeaurora.org (Kumar Gala) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/2] phy: qcom: Add device tree bindings information Date: Thu, 12 Jun 2014 14:18:44 -0500 [thread overview] Message-ID: <1402600724-20651-2-git-send-email-galak@codeaurora.org> (raw) In-Reply-To: <1402600724-20651-1-git-send-email-galak@codeaurora.org> Add binding spec for Qualcomm SoC PHYs, starting with the SATA PHY on the IPQ806x family of SoCs. Signed-off-by: Kumar Gala <galak@codeaurora.org> --- Documentation/devicetree/bindings/phy/qcom-phy.txt | 23 ++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/qcom-phy.txt diff --git a/Documentation/devicetree/bindings/phy/qcom-phy.txt b/Documentation/devicetree/bindings/phy/qcom-phy.txt new file mode 100644 index 0000000..76bfbd0 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom-phy.txt @@ -0,0 +1,23 @@ +Qualcomm IPQ806x SATA PHY Controller +------------------------------------ + +SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers. +Each SATA PHY controller should have its own node. + +Required properties: +- compatible: compatible list, contains "qcom,ipq806x-sata-phy" +- reg: offset and length of the SATA PHY register set; +- #phy-cells: must be zero +- clocks: must be exactly one entry +- clock-names: must be "cfg" + +Example: + sata_phy: sata-phy at 1b400000 { + compatible = "qcom,ipq806x-sata-phy"; + reg = <0x1b400000 0x200>; + + clocks = <&gcc SATA_PHY_CFG_CLK>; + clock-names = "cfg"; + + #phy-cells = <0>; + }; -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation
next prev parent reply other threads:[~2014-06-12 19:18 UTC|newest] Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top 2014-06-12 19:18 [PATCH 1/2] phy: qcom: Add driver for QCOM IPQ806x SATA PHY Kumar Gala 2014-06-12 19:18 ` Kumar Gala 2014-06-12 19:18 ` Kumar Gala [this message] 2014-06-12 19:18 ` [PATCH 2/2] phy: qcom: Add device tree bindings information Kumar Gala 2014-06-12 20:16 ` [PATCH 1/2] phy: qcom: Add driver for QCOM IPQ806x SATA PHY Stephen Boyd 2014-06-12 20:16 ` Stephen Boyd 2014-06-16 10:04 ` Kishon Vijay Abraham I 2014-06-16 10:04 ` Kishon Vijay Abraham I 2014-06-16 10:04 ` Kishon Vijay Abraham I 2014-06-16 19:51 ` Kumar Gala 2014-06-16 19:51 ` Kumar Gala
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=1402600724-20651-2-git-send-email-galak@codeaurora.org \ --to=galak@codeaurora.org \ --cc=devicetree@vger.kernel.org \ --cc=ijc+devicetree@hellion.org.uk \ --cc=kishon@ti.com \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-arm-msm@vger.kernel.org \ --cc=linux-ide@vger.kernel.org \ --cc=linux-kernel@vger.kernel.org \ --cc=mark.rutland@arm.com \ --cc=pawel.moll@arm.com \ --cc=robh+dt@kernel.org \ --cc=tj@kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.