From: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> To: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> Cc: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>, Andrew Bresticker <abrestic-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>, Mikko Perttunen <mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org Subject: [PATCH v5 3/4] ARM: tegra: tegra124: Add XUSB pad controller Date: Thu, 19 Jun 2014 13:37:09 +0200 [thread overview] Message-ID: <1403177830-28595-3-git-send-email-thierry.reding@gmail.com> (raw) In-Reply-To: <1403177830-28595-1-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> The device tree node in the SoC file contains only the resources (such as registers, resets, ...) but none of the lane assignment information since that's board specific and belongs in the board file. Tested-by: Mikko Perttunen <mperttunen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> --- Changes in v2: - include dt-bindings/pinctrl/pinctrl-tegra-xusb.h so that board files don't have to include it explicitly - remove unneeded #address-cells/#size-cells = <0> - add padctl label for XUSB pad controller node arch/arm/boot/dts/tegra124.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index 6e6bc4e8185c..b7cb944b2faa 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -1,6 +1,7 @@ #include <dt-bindings/clock/tegra124-car.h> #include <dt-bindings/gpio/tegra-gpio.h> #include <dt-bindings/pinctrl/pinctrl-tegra.h> +#include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include "skeleton.dtsi" @@ -449,6 +450,15 @@ clock-names = "pclk", "clk32k_in"; }; + padctl: padctl@0,7009f000 { + compatible = "nvidia,tegra124-xusb-padctl"; + reg = <0x0 0x7009f000 0x0 0x1000>; + resets = <&tegra_car 142>; + reset-names = "padctl"; + + #phy-cells = <1>; + }; + sdhci@0,700b0000 { compatible = "nvidia,tegra124-sdhci"; reg = <0x0 0x700b0000 0x0 0x200>; -- 1.9.2
WARNING: multiple messages have this Message-ID (diff)
From: thierry.reding@gmail.com (Thierry Reding) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v5 3/4] ARM: tegra: tegra124: Add XUSB pad controller Date: Thu, 19 Jun 2014 13:37:09 +0200 [thread overview] Message-ID: <1403177830-28595-3-git-send-email-thierry.reding@gmail.com> (raw) In-Reply-To: <1403177830-28595-1-git-send-email-thierry.reding@gmail.com> From: Thierry Reding <treding@nvidia.com> The device tree node in the SoC file contains only the resources (such as registers, resets, ...) but none of the lane assignment information since that's board specific and belongs in the board file. Tested-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> --- Changes in v2: - include dt-bindings/pinctrl/pinctrl-tegra-xusb.h so that board files don't have to include it explicitly - remove unneeded #address-cells/#size-cells = <0> - add padctl label for XUSB pad controller node arch/arm/boot/dts/tegra124.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index 6e6bc4e8185c..b7cb944b2faa 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -1,6 +1,7 @@ #include <dt-bindings/clock/tegra124-car.h> #include <dt-bindings/gpio/tegra-gpio.h> #include <dt-bindings/pinctrl/pinctrl-tegra.h> +#include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include "skeleton.dtsi" @@ -449,6 +450,15 @@ clock-names = "pclk", "clk32k_in"; }; + padctl: padctl at 0,7009f000 { + compatible = "nvidia,tegra124-xusb-padctl"; + reg = <0x0 0x7009f000 0x0 0x1000>; + resets = <&tegra_car 142>; + reset-names = "padctl"; + + #phy-cells = <1>; + }; + sdhci at 0,700b0000 { compatible = "nvidia,tegra124-sdhci"; reg = <0x0 0x700b0000 0x0 0x200>; -- 1.9.2
next prev parent reply other threads:[~2014-06-19 11:37 UTC|newest] Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top 2014-06-19 11:37 [PATCH v5 1/4] of: Add NVIDIA Tegra XUSB pad controller binding Thierry Reding 2014-06-19 11:37 ` Thierry Reding [not found] ` <1403177830-28595-1-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2014-06-19 11:37 ` [PATCH v5 2/4] pinctrl: Add NVIDIA Tegra XUSB pad controller support Thierry Reding 2014-06-19 11:37 ` Thierry Reding [not found] ` <1403177830-28595-2-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2014-06-30 16:04 ` Stephen Warren 2014-06-30 16:04 ` Stephen Warren [not found] ` <53B18A87.7040305-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> 2014-07-07 14:26 ` Linus Walleij 2014-07-07 14:26 ` Linus Walleij 2014-06-19 11:37 ` Thierry Reding [this message] 2014-06-19 11:37 ` [PATCH v5 3/4] ARM: tegra: tegra124: Add XUSB pad controller Thierry Reding [not found] ` <1403177830-28595-3-git-send-email-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2014-07-11 12:59 ` Thierry Reding 2014-07-11 12:59 ` Thierry Reding 2014-06-19 11:37 ` [PATCH v5 4/4] ARM: tegra: jetson-tk1: " Thierry Reding 2014-06-19 11:37 ` Thierry Reding 2014-07-11 12:58 ` [PATCH v5 1/4] of: Add NVIDIA Tegra XUSB pad controller binding Thierry Reding 2014-07-11 12:58 ` Thierry Reding
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