From: Chanwoo Choi <cw00.choi@samsung.com> To: linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: kgene.kim@samsung.com, mark.rutland@arm.com, arnd@arndb.de, olof@lixom.net, catalin.marinas@arm.com, will.deacon@arm.com, s.nawrocki@samsung.com, tomasz.figa@gmail.com, thomas.abraham@linaro.org, linus.walleij@linaro.org, kyungmin.park@samsung.com, inki.dae@samsung.com, chanho61.park@samsung.com, geunsik.lim@samsung.com, sw0312.kim@samsung.com, jh80.chung@samsung.com, cw00.choi@samsung.com, a.kesavan@samsung.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 02/19] clk: samsung: Add binding documentation for Exynos5433 clock controller Date: Thu, 27 Nov 2014 16:34:59 +0900 [thread overview] Message-ID: <1417073716-22997-3-git-send-email-cw00.choi@samsung.com> (raw) In-Reply-To: <1417073716-22997-1-git-send-email-cw00.choi@samsung.com> This patch add binding documentation for Exynos5433 clock controller. Exynos5433 has various clock domains So, this documentation explains the detailed clock domains ans usage guide. Cc: Sylwester Nawrocki <s.nawrocki@samsung.com> Cc: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Acked-by: Geunsik Lim <geunsik.lim@samsung.com> --- .../devicetree/bindings/clock/exynos5433-clock.txt | 106 +++++++++++++++++++++ 1 file changed, 106 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/exynos5433-clock.txt diff --git a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt new file mode 100644 index 0000000..72cd0ba --- /dev/null +++ b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt @@ -0,0 +1,106 @@ +* Samsung Exynos5433 CMU (Clock Management Units) + +The Exynos5433 clock controller generates and supplies clock to various +controllers within the Exynos5433 SoC. + +Required Properties: + +- compatible: should be one of the following. + - "samsung,exynos5433-cmu-top" - clock controller compatible for CMU_TOP + which generates clocks for IMEM/FSYS/G3D/GSCL/HEVC/MSCL/G2D/MFC/PERIC/PERIS + domains and bus clocks. + - "samsung,exynos5433-cmu-cpif" - clock controller compatible for CMU_CPIF + which generates clocks for LLI (Low Latency Interface) IP. + - "samsung,exynos5433-cmu-mif" - clock controller compatible for CMU_MIF + which generates clocks for DRAM Memory Controller domain. + - "samsung,exynos5433-cmu-peric" - clock controller compatible for CMU_PERIC + which generates clocks for UART/I2C/SPI/I2S/PCM/SPDIF/PWM/SLIMBUS IPs. + - "samsung,exynos5433-cmu-peris" - clock controller compatible for CMU_PERIS + which generates clocks for PMU/TMU/MCT/WDT/RTC/SECKEY/TZPC IPs. + - "samsung,exynos5433-cmu-fsys" - clock controller compatible for CMU_FSYS + which generates clocks for USB/UFS/SDMMC/TSI/PDMA IPs. + +- reg: physical base address of the controller and length of memory mapped + region. + +- #clock-cells: should be 1. + +Each clock is assigned an identifier and client nodes can use this identifier +to specify the clock which they consume. + +All available clocks are defined as preprocessor macros in +dt-bindings/clock/exynos5433.h header and can be used in device +tree sources. + +Example 1: Examples of clock controller nodes are listed below. + + cmu_top: clock-controller@0x10030000 { + compatible = "samsung,exynos5433-cmu-top"; + reg = <0x10030000 0x0c04>; + #clock-cells = <1>; + }; + + cmu_cpif: clock-controller@0x10fc0000 { + compatible = "samsung,exynos5433-cmu-cpif"; + reg = <0x10fc0000 0x0c04>; + #clock-cells = <1>; + }; + + cmu_mif: clock-controller@0x105b0000 { + compatible = "samsung,exynos5433-cmu-mif"; + reg = <0x105b0000 0x100c>; + #clock-cells = <1>; + }; + + cmu_peric: clock-controller@0x14c80000 { + compatible = "samsung,exynos5433-cmu-peric"; + reg = <0x14c80000 0x0b08>; + #clock-cells = <1>; + }; + + cmu_peris: clock-controller@0x10040000 { + compatible = "samsung,exynos5433-cmu-peris"; + reg = <0x10040000 0x0b20>; + #clock-cells = <1>; + }; + + cmu_fsys: clock-controller@0x156e0000 { + compatible = "samsung,exynos5433-cmu-fsys"; + reg = <0x156e0000 0x0b04>; + #clock-cells = <1>; + }; + +Example 2: UART controller node that consumes the clock generated by the clock + controller. + + serial_0: serial@14C10000 { + compatible = "samsung,exynos5433-uart"; + reg = <0x14C10000 0x100>; + interrupts = <0 421 0>; + clocks = <&cmu_peric CLK_PCLK_UART0>, + <&cmu_peric CLK_SCLK_UART0>; + clock-names = "uart", "clk_uart_baud0"; + pinctrl-names = "default"; + pinctrl-0 = <&uart0_bus>; + status = "disabled"; + }; + +Example 3: SPI controller node that consumes the clock generated by the clock + controller. + + spi_0: spi@14d20000 { + compatible = "samsung,exynos7-spi"; + reg = <0x14d20000 0x100>; + interrupts = <0 432 0>; + dmas = <&pdma0 9>, <&pdma0 8>; + dma-names = "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&cmu_peric CLK_PCLK_SPI0>, + <&cmu_top CLK_SCLK_SPI0_PERIC>; + clock-names = "spi", "spi_busclk0"; + samsung,spi-src-clk = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&spi0_bus>; + status = "disabled"; + }; -- 1.8.5.5
WARNING: multiple messages have this Message-ID (diff)
From: cw00.choi@samsung.com (Chanwoo Choi) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 02/19] clk: samsung: Add binding documentation for Exynos5433 clock controller Date: Thu, 27 Nov 2014 16:34:59 +0900 [thread overview] Message-ID: <1417073716-22997-3-git-send-email-cw00.choi@samsung.com> (raw) In-Reply-To: <1417073716-22997-1-git-send-email-cw00.choi@samsung.com> This patch add binding documentation for Exynos5433 clock controller. Exynos5433 has various clock domains So, this documentation explains the detailed clock domains ans usage guide. Cc: Sylwester Nawrocki <s.nawrocki@samsung.com> Cc: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Acked-by: Geunsik Lim <geunsik.lim@samsung.com> --- .../devicetree/bindings/clock/exynos5433-clock.txt | 106 +++++++++++++++++++++ 1 file changed, 106 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/exynos5433-clock.txt diff --git a/Documentation/devicetree/bindings/clock/exynos5433-clock.txt b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt new file mode 100644 index 0000000..72cd0ba --- /dev/null +++ b/Documentation/devicetree/bindings/clock/exynos5433-clock.txt @@ -0,0 +1,106 @@ +* Samsung Exynos5433 CMU (Clock Management Units) + +The Exynos5433 clock controller generates and supplies clock to various +controllers within the Exynos5433 SoC. + +Required Properties: + +- compatible: should be one of the following. + - "samsung,exynos5433-cmu-top" - clock controller compatible for CMU_TOP + which generates clocks for IMEM/FSYS/G3D/GSCL/HEVC/MSCL/G2D/MFC/PERIC/PERIS + domains and bus clocks. + - "samsung,exynos5433-cmu-cpif" - clock controller compatible for CMU_CPIF + which generates clocks for LLI (Low Latency Interface) IP. + - "samsung,exynos5433-cmu-mif" - clock controller compatible for CMU_MIF + which generates clocks for DRAM Memory Controller domain. + - "samsung,exynos5433-cmu-peric" - clock controller compatible for CMU_PERIC + which generates clocks for UART/I2C/SPI/I2S/PCM/SPDIF/PWM/SLIMBUS IPs. + - "samsung,exynos5433-cmu-peris" - clock controller compatible for CMU_PERIS + which generates clocks for PMU/TMU/MCT/WDT/RTC/SECKEY/TZPC IPs. + - "samsung,exynos5433-cmu-fsys" - clock controller compatible for CMU_FSYS + which generates clocks for USB/UFS/SDMMC/TSI/PDMA IPs. + +- reg: physical base address of the controller and length of memory mapped + region. + +- #clock-cells: should be 1. + +Each clock is assigned an identifier and client nodes can use this identifier +to specify the clock which they consume. + +All available clocks are defined as preprocessor macros in +dt-bindings/clock/exynos5433.h header and can be used in device +tree sources. + +Example 1: Examples of clock controller nodes are listed below. + + cmu_top: clock-controller at 0x10030000 { + compatible = "samsung,exynos5433-cmu-top"; + reg = <0x10030000 0x0c04>; + #clock-cells = <1>; + }; + + cmu_cpif: clock-controller at 0x10fc0000 { + compatible = "samsung,exynos5433-cmu-cpif"; + reg = <0x10fc0000 0x0c04>; + #clock-cells = <1>; + }; + + cmu_mif: clock-controller at 0x105b0000 { + compatible = "samsung,exynos5433-cmu-mif"; + reg = <0x105b0000 0x100c>; + #clock-cells = <1>; + }; + + cmu_peric: clock-controller at 0x14c80000 { + compatible = "samsung,exynos5433-cmu-peric"; + reg = <0x14c80000 0x0b08>; + #clock-cells = <1>; + }; + + cmu_peris: clock-controller at 0x10040000 { + compatible = "samsung,exynos5433-cmu-peris"; + reg = <0x10040000 0x0b20>; + #clock-cells = <1>; + }; + + cmu_fsys: clock-controller at 0x156e0000 { + compatible = "samsung,exynos5433-cmu-fsys"; + reg = <0x156e0000 0x0b04>; + #clock-cells = <1>; + }; + +Example 2: UART controller node that consumes the clock generated by the clock + controller. + + serial_0: serial at 14C10000 { + compatible = "samsung,exynos5433-uart"; + reg = <0x14C10000 0x100>; + interrupts = <0 421 0>; + clocks = <&cmu_peric CLK_PCLK_UART0>, + <&cmu_peric CLK_SCLK_UART0>; + clock-names = "uart", "clk_uart_baud0"; + pinctrl-names = "default"; + pinctrl-0 = <&uart0_bus>; + status = "disabled"; + }; + +Example 3: SPI controller node that consumes the clock generated by the clock + controller. + + spi_0: spi at 14d20000 { + compatible = "samsung,exynos7-spi"; + reg = <0x14d20000 0x100>; + interrupts = <0 432 0>; + dmas = <&pdma0 9>, <&pdma0 8>; + dma-names = "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&cmu_peric CLK_PCLK_SPI0>, + <&cmu_top CLK_SCLK_SPI0_PERIC>; + clock-names = "spi", "spi_busclk0"; + samsung,spi-src-clk = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&spi0_bus>; + status = "disabled"; + }; -- 1.8.5.5
next prev parent reply other threads:[~2014-11-27 7:35 UTC|newest] Thread overview: 133+ messages / expand[flat|nested] mbox.gz Atom feed top 2014-11-27 7:34 [PATCH 00/19] arm64: Add the support for new 64-bit Exynos5433 SoC Chanwoo Choi 2014-11-27 7:34 ` Chanwoo Choi 2014-11-27 7:34 ` Chanwoo Choi 2014-11-27 7:34 ` [PATCH 01/19] pinctrl: exynos: Add support for Exynos5433 Chanwoo Choi 2014-11-27 7:34 ` Chanwoo Choi 2014-11-27 7:34 ` Chanwoo Choi 2014-11-27 10:26 ` [01/19] " Pankaj Dubey 2014-11-27 10:26 ` Pankaj Dubey 2014-11-27 10:49 ` Chanwoo Choi 2014-11-27 10:49 ` Chanwoo Choi 2014-11-27 11:45 ` [PATCH 01/19] " Arnd Bergmann 2014-11-27 11:45 ` Arnd Bergmann 2014-11-27 12:14 ` Tomasz Figa 2014-11-27 12:14 ` Tomasz Figa 2014-11-27 12:14 ` Tomasz Figa 2014-11-27 12:36 ` Arnd Bergmann 2014-11-27 12:36 ` Arnd Bergmann 2014-11-27 12:36 ` Arnd Bergmann 2014-12-28 11:21 ` Tomasz Figa 2014-12-28 11:21 ` Tomasz Figa 2014-12-28 23:33 ` Chanwoo Choi 2014-12-28 23:33 ` Chanwoo Choi 2014-11-27 7:34 ` Chanwoo Choi [this message] 2014-11-27 7:34 ` [PATCH 02/19] clk: samsung: Add binding documentation for Exynos5433 clock controller Chanwoo Choi 2014-11-27 11:21 ` Mark Rutland 2014-11-27 11:21 ` Mark Rutland 2014-11-27 11:21 ` Mark Rutland 2014-11-27 11:29 ` Chanwoo Choi 2014-11-27 11:29 ` Chanwoo Choi 2014-11-27 11:29 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 03/19] clk: samsung: exynos5433: Add clocks using common clock framework Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 11:48 ` [03/19] " Pankaj Dubey 2014-11-27 11:48 ` Pankaj Dubey 2014-11-27 12:53 ` Chanwoo Choi 2014-11-27 12:53 ` Chanwoo Choi 2014-11-28 1:57 ` Chanwoo Choi 2014-11-28 1:57 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 04/19] clk: samsung: exynos5433: Add MUX clocks of CMU_TOP domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 05/19] clk: samsung: exynos5433: Add clocks for CMU_PERIC domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 06/19] clk: samsung: exynos5433: Add clocks for CMU_PERIS domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 07/19] clk: samsung: exynos5433: Add clocks for CMU_G2D domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 08/19] clk: samsung: exynos5433: Add clocks for CMU_MIF domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 09/19] clk: samsung: exynos5433: Add clocks for CMU_DISP domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 10/19] clk: samsung: exynos5433: Add clocks for CMU_AUD domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 11/19] clk: samsung: exynos5433: Add clocks for CMU_BUS{0|1|2} domains Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 11:41 ` Arnd Bergmann 2014-11-27 11:41 ` Arnd Bergmann 2014-11-27 11:56 ` Chanwoo Choi 2014-11-27 11:56 ` Chanwoo Choi 2014-11-27 12:12 ` Sylwester Nawrocki 2014-11-27 12:12 ` Sylwester Nawrocki 2014-11-27 12:12 ` Sylwester Nawrocki 2014-11-27 12:14 ` Chanwoo Choi 2014-11-27 12:14 ` Chanwoo Choi 2014-11-27 12:35 ` Arnd Bergmann 2014-11-27 12:35 ` Arnd Bergmann 2014-11-27 12:58 ` Chanwoo Choi 2014-11-27 12:58 ` Chanwoo Choi 2014-11-27 13:15 ` Arnd Bergmann 2014-11-27 13:15 ` Arnd Bergmann [not found] ` <CAGTfZH3KmwhJNFdmeWnujbbUbtLf5vSi6i2dbV62DeCtV7n4TQ@mail.gmail.com> 2014-11-27 14:02 ` Arnd Bergmann 2014-11-27 14:02 ` Arnd Bergmann 2014-11-27 14:02 ` Arnd Bergmann 2014-11-27 15:17 ` Chanwoo Choi 2014-11-27 15:17 ` Chanwoo Choi 2014-11-27 15:17 ` Chanwoo Choi 2014-11-27 15:33 ` Arnd Bergmann 2014-11-27 15:33 ` Arnd Bergmann 2014-11-27 15:33 ` Arnd Bergmann 2014-11-27 15:44 ` Chanwoo Choi 2014-11-27 15:44 ` Chanwoo Choi 2014-11-27 15:44 ` Chanwoo Choi 2014-11-27 15:51 ` Arnd Bergmann 2014-11-27 15:51 ` Arnd Bergmann 2014-11-27 15:51 ` Arnd Bergmann 2014-11-27 15:58 ` Chanwoo Choi 2014-11-27 15:58 ` Chanwoo Choi 2014-11-27 15:58 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 12/19] clk: samsung: exynos5433: Add missing clocks for CMU_FSYS domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 13/19] clk: samsung: exynos5433: Add clocks for CMU_G3D domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 14/19] clk: samsung: exynos5433: Add clocks for CMU_GSCL domain Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 15/19] arm64: exynos5433: Enable ARMv8-based Exynos5433 SoC support Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 11:18 ` Catalin Marinas 2014-11-27 11:18 ` Catalin Marinas 2014-11-27 11:18 ` Catalin Marinas 2014-11-27 11:22 ` Chanwoo Choi 2014-11-27 11:22 ` Chanwoo Choi 2014-11-27 11:22 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 16/19] arm64: dts: exynos: Add dts files for 64-bit Exynos5433 SoC Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 10:26 ` Marc Zyngier 2014-11-27 10:26 ` Marc Zyngier 2014-11-27 10:26 ` Marc Zyngier 2014-11-28 13:51 ` Chanwoo Choi 2014-11-28 13:51 ` Chanwoo Choi 2014-11-28 13:51 ` Chanwoo Choi 2014-11-27 11:18 ` Mark Rutland 2014-11-27 11:18 ` Mark Rutland 2014-11-27 11:18 ` Mark Rutland 2014-11-28 13:18 ` Chanwoo Choi 2014-11-28 13:18 ` Chanwoo Choi 2014-11-28 13:18 ` Chanwoo Choi 2014-11-28 14:00 ` Mark Rutland 2014-11-28 14:00 ` Mark Rutland 2014-11-28 14:00 ` Mark Rutland 2014-12-01 2:21 ` Chanwoo Choi 2014-12-01 2:21 ` Chanwoo Choi 2014-12-01 2:21 ` Chanwoo Choi 2014-12-02 10:42 ` Mark Rutland 2014-12-02 10:42 ` Mark Rutland 2014-12-02 10:42 ` Mark Rutland 2014-11-27 7:35 ` [PATCH 17/19] arm64: dts: exynos: Add MSHC dt node for Exynos5433 Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 18/19] arm64: dts: exynos: Add SPI/PDMA " Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi 2014-11-27 7:35 ` [PATCH 19/19] serial: samsung: Add the support for Exynos5433 SoC Chanwoo Choi 2014-11-27 7:35 ` Chanwoo Choi
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