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From: Hanjun Guo <hanjun.guo@linaro.org>
To: Catalin Marinas <catalin.marinas@arm.com>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	Olof Johansson <olof@lixom.net>, Arnd Bergmann <arnd@arndb.de>,
	Mark Rutland <mark.rutland@arm.com>,
	Grant Likely <grant.likely@linaro.org>,
	Will Deacon <will.deacon@arm.com>
Cc: Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>,
	Graeme Gregory <graeme.gregory@linaro.org>,
	Sudeep Holla <Sudeep.Holla@arm.com>, Jon Masters <jcm@redhat.com>,
	Jason Cooper <jason@lakedaemon.net>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Mark Brown <broonie@kernel.org>, Rob Herring <robh@kernel.org>,
	Robert Richter <rric@kernel.org>,
	Randy Dunlap <rdunlap@infradead.org>,
	Charles.Garcia-Tobin@arm.com, phoenix.liyi@huawei.com,
	Timur Tabi <timur@codeaurora.org>,
	suravee.suthikulpanit@amd.com, linux-acpi@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linaro-acpi@lists.linaro.org,
	Hanjun Guo <hanjun.guo@linaro.org>
Subject: [PATCH v6 12/17] ARM64 / ACPI: Introduce ACPI_IRQ_MODEL_GIC and register device's gsi
Date: Sun,  4 Jan 2015 18:55:13 +0800	[thread overview]
Message-ID: <1420368918-5086-13-git-send-email-hanjun.guo@linaro.org> (raw)
In-Reply-To: <1420368918-5086-1-git-send-email-hanjun.guo@linaro.org>

Introduce ACPI_IRQ_MODEL_GIC which is needed for ARM64 as GIC is
used, and then register device's gsi with the core IRQ subsystem.

acpi_register_gsi() is similar to DT based irq_of_parse_and_map(),
since gsi is unique in the system, so use hwirq number directly
for the mapping.

Originally-by: Amit Daniel Kachhap <amit.daniel@samsung.com>
Tested-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
---
 arch/arm64/kernel/acpi.c | 73 ++++++++++++++++++++++++++++++++++++++++++++++++
 drivers/acpi/bus.c       |  3 ++
 include/linux/acpi.h     |  1 +
 3 files changed, 77 insertions(+)

diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c
index e8bb9eb..d6d83ea 100644
--- a/arch/arm64/kernel/acpi.c
+++ b/arch/arm64/kernel/acpi.c
@@ -37,6 +37,12 @@ EXPORT_SYMBOL(acpi_pci_disabled);
 static int enabled_cpus;	/* Processors (GICC) with enabled flag in MADT */
 
 /*
+ * Since we're on ARM, the default interrupt routing model
+ * clearly has to be GIC.
+ */
+enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_GIC;
+
+/*
  * __acpi_map_table() will be called before page_init(), so early_ioremap()
  * or early_memremap() should be called here to for ACPI table mapping.
  */
@@ -184,6 +190,73 @@ void __init acpi_smp_init_cpus(void)
 	pr_info("%d CPUs enabled, %d CPUs total\n", enabled_cpus, total_cpus);
 }
 
+int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)
+{
+	*irq = irq_find_mapping(NULL, gsi);
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(acpi_gsi_to_irq);
+
+/*
+ * success: return IRQ number (>0)
+ * failure: return =< 0
+ */
+int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity)
+{
+	unsigned int irq;
+	unsigned int irq_type;
+
+	/*
+	 * ACPI have no bindings to indicate SPI or PPI, so we
+	 * use different mappings from DT in ACPI.
+	 *
+	 * For FDT
+	 * PPI interrupt: in the range [0, 15];
+	 * SPI interrupt: in the range [0, 987];
+	 *
+	 * For ACPI, GSI should be unique so using
+	 * the hwirq directly for the mapping:
+	 * PPI interrupt: in the range [16, 31];
+	 * SPI interrupt: in the range [32, 1019];
+	 */
+
+	if (trigger == ACPI_EDGE_SENSITIVE &&
+				polarity == ACPI_ACTIVE_LOW)
+		irq_type = IRQ_TYPE_EDGE_FALLING;
+	else if (trigger == ACPI_EDGE_SENSITIVE &&
+				polarity == ACPI_ACTIVE_HIGH)
+		irq_type = IRQ_TYPE_EDGE_RISING;
+	else if (trigger == ACPI_LEVEL_SENSITIVE &&
+				polarity == ACPI_ACTIVE_LOW)
+		irq_type = IRQ_TYPE_LEVEL_LOW;
+	else if (trigger == ACPI_LEVEL_SENSITIVE &&
+				polarity == ACPI_ACTIVE_HIGH)
+		irq_type = IRQ_TYPE_LEVEL_HIGH;
+	else
+		irq_type = IRQ_TYPE_NONE;
+
+	/*
+	 * Since only one GIC is supported in ACPI 5.0, we can
+	 * create mapping refer to the default domain
+	 */
+	irq = irq_create_mapping(NULL, gsi);
+	if (!irq)
+		return irq;
+
+	/* Set irq type if specified and different than the current one */
+	if (irq_type != IRQ_TYPE_NONE &&
+		irq_type != irq_get_trigger_type(irq))
+		irq_set_irq_type(irq, irq_type);
+	return irq;
+}
+EXPORT_SYMBOL_GPL(acpi_register_gsi);
+
+void acpi_unregister_gsi(u32 gsi)
+{
+}
+EXPORT_SYMBOL_GPL(acpi_unregister_gsi);
+
 static int __init acpi_parse_fadt(struct acpi_table_header *table)
 {
 	struct acpi_table_fadt *fadt = (struct acpi_table_fadt *)table;
diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c
index 8b67bd0..c412fdb 100644
--- a/drivers/acpi/bus.c
+++ b/drivers/acpi/bus.c
@@ -448,6 +448,9 @@ static int __init acpi_bus_init_irq(void)
 	case ACPI_IRQ_MODEL_IOSAPIC:
 		message = "IOSAPIC";
 		break;
+	case ACPI_IRQ_MODEL_GIC:
+		message = "GIC";
+		break;
 	case ACPI_IRQ_MODEL_PLATFORM:
 		message = "platform specific model";
 		break;
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index d459cd1..87f365e 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -72,6 +72,7 @@ enum acpi_irq_model_id {
 	ACPI_IRQ_MODEL_IOAPIC,
 	ACPI_IRQ_MODEL_IOSAPIC,
 	ACPI_IRQ_MODEL_PLATFORM,
+	ACPI_IRQ_MODEL_GIC,
 	ACPI_IRQ_MODEL_COUNT
 };
 
-- 
1.9.1

WARNING: multiple messages have this Message-ID (diff)
From: hanjun.guo@linaro.org (Hanjun Guo)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v6 12/17] ARM64 / ACPI: Introduce ACPI_IRQ_MODEL_GIC and register device's gsi
Date: Sun,  4 Jan 2015 18:55:13 +0800	[thread overview]
Message-ID: <1420368918-5086-13-git-send-email-hanjun.guo@linaro.org> (raw)
In-Reply-To: <1420368918-5086-1-git-send-email-hanjun.guo@linaro.org>

Introduce ACPI_IRQ_MODEL_GIC which is needed for ARM64 as GIC is
used, and then register device's gsi with the core IRQ subsystem.

acpi_register_gsi() is similar to DT based irq_of_parse_and_map(),
since gsi is unique in the system, so use hwirq number directly
for the mapping.

Originally-by: Amit Daniel Kachhap <amit.daniel@samsung.com>
Tested-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
---
 arch/arm64/kernel/acpi.c | 73 ++++++++++++++++++++++++++++++++++++++++++++++++
 drivers/acpi/bus.c       |  3 ++
 include/linux/acpi.h     |  1 +
 3 files changed, 77 insertions(+)

diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c
index e8bb9eb..d6d83ea 100644
--- a/arch/arm64/kernel/acpi.c
+++ b/arch/arm64/kernel/acpi.c
@@ -37,6 +37,12 @@ EXPORT_SYMBOL(acpi_pci_disabled);
 static int enabled_cpus;	/* Processors (GICC) with enabled flag in MADT */
 
 /*
+ * Since we're on ARM, the default interrupt routing model
+ * clearly has to be GIC.
+ */
+enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_GIC;
+
+/*
  * __acpi_map_table() will be called before page_init(), so early_ioremap()
  * or early_memremap() should be called here to for ACPI table mapping.
  */
@@ -184,6 +190,73 @@ void __init acpi_smp_init_cpus(void)
 	pr_info("%d CPUs enabled, %d CPUs total\n", enabled_cpus, total_cpus);
 }
 
+int acpi_gsi_to_irq(u32 gsi, unsigned int *irq)
+{
+	*irq = irq_find_mapping(NULL, gsi);
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(acpi_gsi_to_irq);
+
+/*
+ * success: return IRQ number (>0)
+ * failure: return =< 0
+ */
+int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity)
+{
+	unsigned int irq;
+	unsigned int irq_type;
+
+	/*
+	 * ACPI have no bindings to indicate SPI or PPI, so we
+	 * use different mappings from DT in ACPI.
+	 *
+	 * For FDT
+	 * PPI interrupt: in the range [0, 15];
+	 * SPI interrupt: in the range [0, 987];
+	 *
+	 * For ACPI, GSI should be unique so using
+	 * the hwirq directly for the mapping:
+	 * PPI interrupt: in the range [16, 31];
+	 * SPI interrupt: in the range [32, 1019];
+	 */
+
+	if (trigger == ACPI_EDGE_SENSITIVE &&
+				polarity == ACPI_ACTIVE_LOW)
+		irq_type = IRQ_TYPE_EDGE_FALLING;
+	else if (trigger == ACPI_EDGE_SENSITIVE &&
+				polarity == ACPI_ACTIVE_HIGH)
+		irq_type = IRQ_TYPE_EDGE_RISING;
+	else if (trigger == ACPI_LEVEL_SENSITIVE &&
+				polarity == ACPI_ACTIVE_LOW)
+		irq_type = IRQ_TYPE_LEVEL_LOW;
+	else if (trigger == ACPI_LEVEL_SENSITIVE &&
+				polarity == ACPI_ACTIVE_HIGH)
+		irq_type = IRQ_TYPE_LEVEL_HIGH;
+	else
+		irq_type = IRQ_TYPE_NONE;
+
+	/*
+	 * Since only one GIC is supported in ACPI 5.0, we can
+	 * create mapping refer to the default domain
+	 */
+	irq = irq_create_mapping(NULL, gsi);
+	if (!irq)
+		return irq;
+
+	/* Set irq type if specified and different than the current one */
+	if (irq_type != IRQ_TYPE_NONE &&
+		irq_type != irq_get_trigger_type(irq))
+		irq_set_irq_type(irq, irq_type);
+	return irq;
+}
+EXPORT_SYMBOL_GPL(acpi_register_gsi);
+
+void acpi_unregister_gsi(u32 gsi)
+{
+}
+EXPORT_SYMBOL_GPL(acpi_unregister_gsi);
+
 static int __init acpi_parse_fadt(struct acpi_table_header *table)
 {
 	struct acpi_table_fadt *fadt = (struct acpi_table_fadt *)table;
diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c
index 8b67bd0..c412fdb 100644
--- a/drivers/acpi/bus.c
+++ b/drivers/acpi/bus.c
@@ -448,6 +448,9 @@ static int __init acpi_bus_init_irq(void)
 	case ACPI_IRQ_MODEL_IOSAPIC:
 		message = "IOSAPIC";
 		break;
+	case ACPI_IRQ_MODEL_GIC:
+		message = "GIC";
+		break;
 	case ACPI_IRQ_MODEL_PLATFORM:
 		message = "platform specific model";
 		break;
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index d459cd1..87f365e 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -72,6 +72,7 @@ enum acpi_irq_model_id {
 	ACPI_IRQ_MODEL_IOAPIC,
 	ACPI_IRQ_MODEL_IOSAPIC,
 	ACPI_IRQ_MODEL_PLATFORM,
+	ACPI_IRQ_MODEL_GIC,
 	ACPI_IRQ_MODEL_COUNT
 };
 
-- 
1.9.1

  parent reply	other threads:[~2015-01-04 10:55 UTC|newest]

Thread overview: 87+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-01-04 10:55 [PATCH v6 00/17] Introduce ACPI for ARM64 based on ACPI 5.1 Hanjun Guo
2015-01-04 10:55 ` Hanjun Guo
2015-01-04 10:55 ` [PATCH v6 01/17] ACPI / processor: Convert apic_id to phys_id to make it arch agnostic Hanjun Guo
2015-01-04 10:55   ` Hanjun Guo
2015-01-07  1:50   ` Rafael J. Wysocki
2015-01-07  1:50     ` Rafael J. Wysocki
2015-01-07  1:50     ` Rafael J. Wysocki
2015-01-07  9:49     ` Hanjun Guo
2015-01-07  9:49       ` Hanjun Guo
2015-01-07  9:49       ` Hanjun Guo
2015-01-04 10:55 ` [PATCH v6 02/17] ACPI / processor: Rename acpi_(un)map_lsapic() to acpi_(un)map_cpu() Hanjun Guo
2015-01-04 10:55   ` Hanjun Guo
2015-01-04 10:55 ` [PATCH v6 03/17] ARM64 / ACPI: Get RSDP and ACPI boot-time tables Hanjun Guo
2015-01-04 10:55   ` Hanjun Guo
2015-01-04 10:55 ` [PATCH v6 04/17] ARM64 / ACPI: Introduce sleep-arm.c Hanjun Guo
2015-01-04 10:55   ` Hanjun Guo
2015-01-04 10:55 ` [PATCH v6 05/17] ARM64 / ACPI: Introduce early_param for "acpi" and pass acpi=force to enable ACPI Hanjun Guo
2015-01-04 10:55   ` Hanjun Guo
2015-01-04 10:55 ` [PATCH v6 06/17] ARM64 / ACPI: If we chose to boot from acpi then disable FDT Hanjun Guo
2015-01-04 10:55   ` Hanjun Guo
2015-01-04 10:55 ` [PATCH v6 07/17] ARM64 / ACPI: Make PCI optional for ACPI on ARM64 Hanjun Guo
2015-01-04 10:55   ` Hanjun Guo
2015-01-04 10:55 ` [PATCH v6 08/17] ARM64 / ACPI: Parse FADT table to get PSCI flags for PSCI init Hanjun Guo
2015-01-04 10:55   ` Hanjun Guo
2015-01-04 10:55   ` Hanjun Guo
2015-01-09 19:04   ` Lorenzo Pieralisi
2015-01-09 19:04     ` Lorenzo Pieralisi
2015-01-09 19:04     ` Lorenzo Pieralisi
2015-01-12  4:26     ` Hanjun Guo
2015-01-12  4:26       ` Hanjun Guo
2015-01-12  4:26       ` Hanjun Guo
2015-01-12 11:41       ` Lorenzo Pieralisi
2015-01-12 11:41         ` Lorenzo Pieralisi
2015-01-12 11:41         ` Lorenzo Pieralisi
2015-01-13  6:54         ` Hanjun Guo
2015-01-13  6:54           ` Hanjun Guo
2015-01-13  6:54           ` Hanjun Guo
2015-01-04 10:55 ` [PATCH v6 09/17] ACPI / table: Print GIC information when MADT is parsed Hanjun Guo
2015-01-04 10:55   ` Hanjun Guo
2015-01-04 10:55 ` [PATCH v6 10/17] ARM64 / ACPI: Parse MADT for SMP initialization Hanjun Guo
2015-01-04 10:55   ` Hanjun Guo
2015-01-04 10:55 ` [PATCH v6 11/17] ACPI / processor: Make it possible to get CPU hardware ID via GICC Hanjun Guo
2015-01-04 10:55   ` Hanjun Guo
2015-01-04 10:55 ` Hanjun Guo [this message]
2015-01-04 10:55   ` [PATCH v6 12/17] ARM64 / ACPI: Introduce ACPI_IRQ_MODEL_GIC and register device's gsi Hanjun Guo
2015-01-04 10:55 ` [PATCH v6 13/17] ARM64 / ACPI: Add GICv2 specific ACPI boot support Hanjun Guo
2015-01-04 10:55   ` Hanjun Guo
2015-01-04 10:55 ` [PATCH v6 14/17] ARM64 / ACPI: Parse GTDT to initialize arch timer Hanjun Guo
2015-01-04 10:55   ` Hanjun Guo
2015-01-05  7:55   ` Suthikulpanit, Suravee
2015-01-05  7:55     ` Suthikulpanit, Suravee
2015-01-05  7:55     ` Suthikulpanit, Suravee
2015-01-05  8:59     ` Hanjun Guo
2015-01-05  8:59       ` Hanjun Guo
2015-01-05  8:59       ` Hanjun Guo
2015-01-04 10:55 ` [PATCH v6 15/17] ARM64 / ACPI: Select ACPI_REDUCED_HARDWARE_ONLY if ACPI is enabled on ARM64 Hanjun Guo
2015-01-04 10:55   ` Hanjun Guo
2015-01-04 10:55 ` [PATCH v6 16/17] ARM64 / ACPI: Enable ARM64 in Kconfig Hanjun Guo
2015-01-04 10:55   ` Hanjun Guo
2015-01-04 10:55 ` [PATCH v6 17/17] Documentation: ACPI for ARM64 Hanjun Guo
2015-01-04 10:55   ` Hanjun Guo
2015-01-06  9:52   ` 答复: " liyi 00215672
2015-01-06  9:52     ` liyi 00215672
2015-01-06 11:21     ` Hanjun Guo
2015-01-06 11:21       ` Hanjun Guo
2015-01-06 11:21       ` Hanjun Guo
2015-01-06 20:49     ` Arnd Bergmann
2015-01-06 20:49       ` Arnd Bergmann
2015-01-06 20:49       ` Arnd Bergmann
2015-01-19 20:33   ` Christoffer Dall
2015-01-19 20:33     ` Christoffer Dall
2015-01-19 20:33     ` Christoffer Dall
2015-01-21 12:37     ` Hanjun Guo
2015-01-21 12:37       ` Hanjun Guo
2015-01-21 12:37       ` Hanjun Guo
2015-01-21 13:03       ` Stefano Stabellini
2015-01-21 13:03         ` Stefano Stabellini
2015-01-21 13:03         ` Stefano Stabellini
2015-01-21 16:04       ` Christoffer Dall
2015-01-21 16:04         ` Christoffer Dall
2015-01-21 16:04         ` Christoffer Dall
2015-01-06  7:05 ` [PATCH v6 00/17] Introduce ACPI for ARM64 based on ACPI 5.1 Yijing Wang
2015-01-06  7:05   ` Yijing Wang
2015-01-06  7:05   ` Yijing Wang
2015-01-06 11:17   ` Hanjun Guo
2015-01-06 11:17     ` Hanjun Guo
2015-01-06 11:17     ` Hanjun Guo

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