From: Wei Yang <weiyang@linux.vnet.ibm.com> To: gwshan@linux.vnet.ibm.com, bhelgaas@google.com Cc: linuxppc-dev@lists.ozlabs.org, linux-pci@vger.kernel.org, Wei Yang <weiyang@linux.vnet.ibm.com> Subject: [PATCH V3 4/9] powerpc/eeh: cache address range just for normal device Date: Mon, 4 May 2015 15:07:33 +0800 [thread overview] Message-ID: <1430723258-21299-5-git-send-email-weiyang@linux.vnet.ibm.com> (raw) In-Reply-To: <1430723258-21299-1-git-send-email-weiyang@linux.vnet.ibm.com> The address cache is used to find the related eeh_dev for a given MMIO address. From the definition of pci_dev.resource[], it keeps MMIO address in following order: 6 normal BAR, ROM BAR, 6 IOV BAR, 4 Bridge window. In the address cache, first it doesn't cache bridge device, second the IOV BAR range should map to their own VFs separately. This means it just need to cache the first 7 BARs for a normal device. This patch restricts the address cache to save the first 7 BARs for a pci device. Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com> Acked-by: Gavin Shan <gwshan@linux.vnet.ibm.com> --- arch/powerpc/kernel/eeh_cache.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/kernel/eeh_cache.c b/arch/powerpc/kernel/eeh_cache.c index a1e86e1..f0ce2a3 100644 --- a/arch/powerpc/kernel/eeh_cache.c +++ b/arch/powerpc/kernel/eeh_cache.c @@ -196,7 +196,7 @@ static void __eeh_addr_cache_insert_dev(struct pci_dev *dev) } /* Walk resources on this device, poke them into the tree */ - for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { + for (i = 0; i <= PCI_ROM_RESOURCE; i++) { resource_size_t start = pci_resource_start(dev,i); resource_size_t end = pci_resource_end(dev,i); unsigned long flags = pci_resource_flags(dev,i); -- 1.7.9.5
WARNING: multiple messages have this Message-ID (diff)
From: Wei Yang <weiyang@linux.vnet.ibm.com> To: gwshan@linux.vnet.ibm.com, bhelgaas@google.com Cc: linux-pci@vger.kernel.org, Wei Yang <weiyang@linux.vnet.ibm.com>, linuxppc-dev@lists.ozlabs.org Subject: [PATCH V3 4/9] powerpc/eeh: cache address range just for normal device Date: Mon, 4 May 2015 15:07:33 +0800 [thread overview] Message-ID: <1430723258-21299-5-git-send-email-weiyang@linux.vnet.ibm.com> (raw) In-Reply-To: <1430723258-21299-1-git-send-email-weiyang@linux.vnet.ibm.com> The address cache is used to find the related eeh_dev for a given MMIO address. From the definition of pci_dev.resource[], it keeps MMIO address in following order: 6 normal BAR, ROM BAR, 6 IOV BAR, 4 Bridge window. In the address cache, first it doesn't cache bridge device, second the IOV BAR range should map to their own VFs separately. This means it just need to cache the first 7 BARs for a normal device. This patch restricts the address cache to save the first 7 BARs for a pci device. Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com> Acked-by: Gavin Shan <gwshan@linux.vnet.ibm.com> --- arch/powerpc/kernel/eeh_cache.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/kernel/eeh_cache.c b/arch/powerpc/kernel/eeh_cache.c index a1e86e1..f0ce2a3 100644 --- a/arch/powerpc/kernel/eeh_cache.c +++ b/arch/powerpc/kernel/eeh_cache.c @@ -196,7 +196,7 @@ static void __eeh_addr_cache_insert_dev(struct pci_dev *dev) } /* Walk resources on this device, poke them into the tree */ - for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { + for (i = 0; i <= PCI_ROM_RESOURCE; i++) { resource_size_t start = pci_resource_start(dev,i); resource_size_t end = pci_resource_end(dev,i); unsigned long flags = pci_resource_flags(dev,i); -- 1.7.9.5
next prev parent reply other threads:[~2015-05-04 7:09 UTC|newest] Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-05-04 7:07 [PATCH V3 0/9] VF EEH on Power8 Wei Yang 2015-05-04 7:07 ` Wei Yang 2015-05-04 7:07 ` [PATCH V3 1/9] pci/iov: rename and export virtfn_add/virtfn_remove Wei Yang 2015-05-04 7:07 ` Wei Yang 2015-05-11 2:13 ` Gavin Shan 2015-05-11 2:13 ` Gavin Shan 2015-05-04 7:07 ` [PATCH V3 2/9] powerpc/pci_dn: cache vf_index in pci_dn Wei Yang 2015-05-04 7:07 ` Wei Yang 2015-05-11 2:21 ` Gavin Shan 2015-05-11 2:21 ` Gavin Shan 2015-05-11 5:54 ` Wei Yang 2015-05-11 5:54 ` Wei Yang 2015-05-12 6:15 ` Gavin Shan 2015-05-12 6:15 ` Gavin Shan 2015-05-12 7:29 ` Wei Yang 2015-05-12 7:29 ` Wei Yang 2015-05-04 7:07 ` [PATCH V3 3/9] powerpc/pci: remove PCI devices in reverse order Wei Yang 2015-05-04 7:07 ` Wei Yang 2015-05-04 7:07 ` Wei Yang [this message] 2015-05-04 7:07 ` [PATCH V3 4/9] powerpc/eeh: cache address range just for normal device Wei Yang 2015-05-04 7:07 ` [PATCH V3 5/9] powerpc/eeh: create EEH_PE_VF for VF PE Wei Yang 2015-05-04 7:07 ` Wei Yang 2015-05-11 2:37 ` Gavin Shan 2015-05-11 2:37 ` Gavin Shan 2015-05-11 6:25 ` Wei Yang 2015-05-11 6:25 ` Wei Yang 2015-05-12 6:28 ` Gavin Shan 2015-05-12 6:28 ` Gavin Shan 2015-05-12 7:52 ` Wei Yang 2015-05-12 7:52 ` Wei Yang 2015-05-04 7:07 ` [PATCH V3 6/9] powerpc/powernv: create/release eeh_dev for VF Wei Yang 2015-05-04 7:07 ` Wei Yang 2015-05-11 2:48 ` Gavin Shan 2015-05-11 2:48 ` Gavin Shan 2015-05-12 8:06 ` Wei Yang 2015-05-12 8:06 ` Wei Yang 2015-05-12 23:09 ` Gavin Shan 2015-05-12 23:09 ` Gavin Shan 2015-05-04 7:07 ` [PATCH V3 7/9] powerpc/powernv: Support EEH reset for VFs Wei Yang 2015-05-04 7:07 ` Wei Yang 2015-05-11 3:03 ` Gavin Shan 2015-05-11 3:03 ` Gavin Shan 2015-05-04 7:07 ` [PATCH V3 8/9] powerpc/powernv: Support PCI config restore " Wei Yang 2015-05-04 7:07 ` Wei Yang 2015-05-11 4:22 ` Gavin Shan 2015-05-11 4:22 ` Gavin Shan 2015-05-12 1:31 ` Wei Yang 2015-05-12 1:31 ` Wei Yang 2015-05-12 6:34 ` Gavin Shan 2015-05-12 6:34 ` Gavin Shan 2015-05-12 8:16 ` Wei Yang 2015-05-12 8:16 ` Wei Yang 2015-05-12 23:16 ` Gavin Shan 2015-05-12 23:16 ` Gavin Shan 2015-05-04 7:07 ` [PATCH V3 9/9] powerpc/eeh: handle VF PE properly Wei Yang 2015-05-04 7:07 ` Wei Yang 2015-05-13 1:16 ` Gavin Shan 2015-05-13 1:16 ` Gavin Shan 2015-05-14 9:35 ` Wei Yang 2015-05-14 9:35 ` Wei Yang 2015-05-14 12:15 ` Gavin Shan 2015-05-14 12:15 ` Gavin Shan 2015-05-14 10:02 ` Wei Yang 2015-05-14 10:02 ` Wei Yang 2015-05-14 12:30 ` Gavin Shan 2015-05-14 12:30 ` Gavin Shan
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