[PATCH 3/6] drm/i915/skl: Restrict the ring frequency table programming to SKL

From: akash.goel@intel.com
To: intel-gfx@lists.freedesktop.org
Cc: Akash Goel <akash.goel@intel.com>
Subject: [PATCH 3/6] drm/i915/skl: Restrict the ring frequency table programming to SKL
Date: Fri, 19 Jun 2015 23:07:28 +0530	[thread overview]
Message-ID: <1434735451-12063-4-git-send-email-akash.goel@intel.com> (raw)
In-Reply-To: <1434735451-12063-1-git-send-email-akash.goel@intel.com>

From: Akash Goel <akash.goel@intel.com>

Ring frequency table programming is not required on BXT. Added separate
checks to enable the programming only for SKL & skip for BXT.

Issue: VIZ-5144
Signed-off-by: Akash Goel <akash.goel@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 89c1b73..31d2fa0 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4696,7 +4696,7 @@ void gen6_update_ring_freq(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 
-	if (INTEL_INFO(dev)->gen < 6 || IS_VALLEYVIEW(dev))
+	if (INTEL_INFO(dev)->gen < 6 || IS_VALLEYVIEW(dev) || IS_BROXTON(dev))
 		return;
 
 	mutex_lock(&dev_priv->rps.hw_lock);
@@ -5811,7 +5811,8 @@ static void intel_gen6_powersave_work(struct work_struct *work)
 	} else if (INTEL_INFO(dev)->gen >= 9) {
 		gen9_enable_rc6(dev);
 		gen9_enable_rps(dev);
-		__gen6_update_ring_freq(dev);
+		if (IS_SKYLAKE(dev))
+			__gen6_update_ring_freq(dev);
 	} else if (IS_BROADWELL(dev)) {
 		gen8_enable_rps(dev);
 		__gen6_update_ring_freq(dev);
-- 
1.9.2

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