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From: Daniel Vetter <daniel@ffwll.ch>
To: akash.goel@intel.com
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 4/6] drm/i915: Corrected the platform checks in i915_ring_freq_table function
Date: Mon, 22 Jun 2015 17:43:54 +0200	[thread overview]
Message-ID: <20150622154354.GA25769@phenom.ffwll.local> (raw)
In-Reply-To: <1434735451-12063-5-git-send-email-akash.goel@intel.com>

On Fri, Jun 19, 2015 at 11:07:29PM +0530, akash.goel@intel.com wrote:
> From: Akash Goel <akash.goel@intel.com>
> 
> Corrected the platform checks in i915_ring_freq_table debugfs function
> so as to allow the read of ring frequency table for BDW and disallow for VLV
> 
> v2: Simplified the checks to avoid the double negation (Daniel)
> 
> Issue: VIZ-5144
> Signed-off-by: Akash Goel <akash.goel@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_debugfs.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index c49fe2a..438c10b 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -1746,7 +1746,8 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused)
>  	int ret = 0;
>  	int gpu_freq, ia_freq;
>  
> -	if (!(IS_GEN6(dev) || IS_GEN7(dev))) {
> +	if (!(IS_GEN6(dev) || (IS_GEN7(dev) && !IS_VALLEYVIEW(dev)) ||
> +	      IS_BROADWELL(dev))) {

Still complicated and also duplicated. What about a HAS_CORE_RING_FREQ()
feature macro, maybe even as a bitmask somewhere? We have them for rps
too, so lots of precendence.
-Daniel

>  		seq_puts(m, "unsupported on this chipset\n");
>  		return 0;
>  	}
> -- 
> 1.9.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2015-06-22 15:41 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-19 17:37 [PATCH v2 0/6] Ring frequency & Rpe changes for SKL akash.goel
2015-06-19 17:37 ` [PATCH 1/6] drm/i915/skl: Retrieve the Rpe value from Pcode akash.goel
2015-06-19 17:37 ` [PATCH 2/6] drm/i915/skl: Ring frequency table programming changes akash.goel
2015-06-19 17:37 ` [PATCH 3/6] drm/i915/skl: Restrict the ring frequency table programming to SKL akash.goel
2015-06-19 17:37 ` [PATCH 4/6] drm/i915: Corrected the platform checks in i915_ring_freq_table function akash.goel
2015-06-22 15:43   ` Daniel Vetter [this message]
2015-06-23 12:49     ` Akash Goel
2015-06-19 17:37 ` [PATCH 5/6] drm/i915/skl: Updated the i915_ring_freq_table debugfs function akash.goel
2015-06-19 17:37 ` [PATCH 6/6] drm/i915: Added BXT check in i915_ring_freq_table function akash.goel
2015-06-22 15:45   ` Daniel Vetter
2015-06-28 22:51   ` shuang.he

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