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From: Yong Wu <yong.wu@mediatek.com>
To: Will Deacon <will.deacon@arm.com>
Cc: Joerg Roedel <joro@8bytes.org>,
	Thierry Reding <treding@nvidia.com>,
	Mark Rutland <Mark.Rutland@arm.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Robin Murphy <Robin.Murphy@arm.com>,
	Daniel Kurtz <djkurtz@google.com>, Tomasz Figa <tfiga@google.com>,
	Lucas Stach <l.stach@pengutronix.de>,
	Rob Herring <robh+dt@kernel.org>,
	Catalin Marinas <Catalin.Marinas@arm.com>,
	"linux-mediatek@lists.infradead.org" 
	<linux-mediatek@lists.infradead.org>,
	Sasha Hauer <kernel@pengutronix.de>,
	"srv_heupstream@mediatek.com" <srv_heupstream@mediatek.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"iommu@lists.linux-foundation.org"
	<iommu@lists.linux-foundation.org>,
	"pebolle@tiscali.nl" <pebolle@tiscali.nl>,
	"arnd@arndb.de" <arnd@arndb.de>,
	"mitchelh@codeaurora.org" <mitchelh@codeaurora.org>,
	"cloud.chou@mediatek.com" <cloud.chou@mediatek.com>,
	"frederic.chen@mediatek.com" <frederic.chen@mediatek.com>
Subject: Re: [PATCH v3 5/6] iommu/mediatek: Add mt8173 IOMMU driver
Date: Fri, 24 Jul 2015 13:43:13 +0800	[thread overview]
Message-ID: <1437716593.23932.73.camel@mhfsdcap03> (raw)
In-Reply-To: <20150721145910.GG31095@arm.com>

On Tue, 2015-07-21 at 15:59 +0100, Will Deacon wrote:
> Hi Yong Wu,
> 
> On Thu, Jul 16, 2015 at 10:04:34AM +0100, Yong Wu wrote:
> > This patch adds support for mediatek m4u (MultiMedia Memory Management
> > Unit).
> 
> [...]
> 
> > +static void mtk_iommu_tlb_flush_all(void *cookie)
> > +{
> > +       struct mtk_iommu_domain *domain = cookie;
> > +       void __iomem *base;
> > +
> > +       base = domain->data->base;
> > +       writel(F_INVLD_EN1 | F_INVLD_EN0, base + REG_MMU_INV_SEL);
> > +       writel(F_ALL_INVLD, base + REG_MMU_INVALIDATE);
> 
> This needs to be synchronous, so you probably want to call
> mtk_iommu_tlb_sync at the end.

>From our spec, we have to wait until HW done after tlb flush range.
But it don't need wait after tlb flush all.
so It isn't necessary to add mtk_iommu_tlb_sync in tlb_flush_all here.

> 
> > +}
> > +
> > +static void mtk_iommu_tlb_add_flush(unsigned long iova, size_t size,
> > +                                   bool leaf, void *cookie)
> > +{
> > +       struct mtk_iommu_domain *domain = cookie;
> > +       void __iomem *base = domain->data->base;
> > +       unsigned int iova_start = iova, iova_end = iova + size - 1;
> > +
> > +       writel(F_INVLD_EN1 | F_INVLD_EN0, base + REG_MMU_INV_SEL);
> > +
> > +       writel(iova_start, base + REG_MMU_INVLD_START_A);
> > +       writel(iova_end, base + REG_MMU_INVLD_END_A);
> > +       writel(F_MMU_INV_RANGE, base + REG_MMU_INVALIDATE);
> 
> Why are you using writel instead of writel_relaxed? I asked this before
> but I don't think you replied.

Sorry, I didn't notice _relax last time. I will improve in next version.
Thanks very much.

> 
> Will



WARNING: multiple messages have this Message-ID (diff)
From: Yong Wu <yong.wu-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
To: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
Cc: Mark Rutland <Mark.Rutland-5wv7dgnIgG8@public.gmane.org>,
	Catalin Marinas <Catalin.Marinas-5wv7dgnIgG8@public.gmane.org>,
	"cloud.chou-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org"
	<cloud.chou-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>,
	"frederic.chen-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org"
	<frederic.chen-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>,
	"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"arnd-r2nGTMty4D4@public.gmane.org"
	<arnd-r2nGTMty4D4@public.gmane.org>,
	Tomasz Figa <tfiga-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>,
	Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	"linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
	<linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	Matthias Brugger
	<matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
	<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	"pebolle-IWqWACnzNjzz+pZb47iToQ@public.gmane.org"
	<pebolle-IWqWACnzNjzz+pZb47iToQ@public.gmane.org>,
	Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
	"srv_heupstream-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org"
	<srv_heupstream-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>,
	"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org"
	<iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org>,
	Daniel Kurtz <djkurtz-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>,
	Sasha Hauer <kernel@pen>
Subject: Re: [PATCH v3 5/6] iommu/mediatek: Add mt8173 IOMMU driver
Date: Fri, 24 Jul 2015 13:43:13 +0800	[thread overview]
Message-ID: <1437716593.23932.73.camel@mhfsdcap03> (raw)
In-Reply-To: <20150721145910.GG31095-5wv7dgnIgG8@public.gmane.org>

On Tue, 2015-07-21 at 15:59 +0100, Will Deacon wrote:
> Hi Yong Wu,
> 
> On Thu, Jul 16, 2015 at 10:04:34AM +0100, Yong Wu wrote:
> > This patch adds support for mediatek m4u (MultiMedia Memory Management
> > Unit).
> 
> [...]
> 
> > +static void mtk_iommu_tlb_flush_all(void *cookie)
> > +{
> > +       struct mtk_iommu_domain *domain = cookie;
> > +       void __iomem *base;
> > +
> > +       base = domain->data->base;
> > +       writel(F_INVLD_EN1 | F_INVLD_EN0, base + REG_MMU_INV_SEL);
> > +       writel(F_ALL_INVLD, base + REG_MMU_INVALIDATE);
> 
> This needs to be synchronous, so you probably want to call
> mtk_iommu_tlb_sync at the end.

>From our spec, we have to wait until HW done after tlb flush range.
But it don't need wait after tlb flush all.
so It isn't necessary to add mtk_iommu_tlb_sync in tlb_flush_all here.

> 
> > +}
> > +
> > +static void mtk_iommu_tlb_add_flush(unsigned long iova, size_t size,
> > +                                   bool leaf, void *cookie)
> > +{
> > +       struct mtk_iommu_domain *domain = cookie;
> > +       void __iomem *base = domain->data->base;
> > +       unsigned int iova_start = iova, iova_end = iova + size - 1;
> > +
> > +       writel(F_INVLD_EN1 | F_INVLD_EN0, base + REG_MMU_INV_SEL);
> > +
> > +       writel(iova_start, base + REG_MMU_INVLD_START_A);
> > +       writel(iova_end, base + REG_MMU_INVLD_END_A);
> > +       writel(F_MMU_INV_RANGE, base + REG_MMU_INVALIDATE);
> 
> Why are you using writel instead of writel_relaxed? I asked this before
> but I don't think you replied.

Sorry, I didn't notice _relax last time. I will improve in next version.
Thanks very much.

> 
> Will

WARNING: multiple messages have this Message-ID (diff)
From: yong.wu@mediatek.com (Yong Wu)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 5/6] iommu/mediatek: Add mt8173 IOMMU driver
Date: Fri, 24 Jul 2015 13:43:13 +0800	[thread overview]
Message-ID: <1437716593.23932.73.camel@mhfsdcap03> (raw)
In-Reply-To: <20150721145910.GG31095@arm.com>

On Tue, 2015-07-21 at 15:59 +0100, Will Deacon wrote:
> Hi Yong Wu,
> 
> On Thu, Jul 16, 2015 at 10:04:34AM +0100, Yong Wu wrote:
> > This patch adds support for mediatek m4u (MultiMedia Memory Management
> > Unit).
> 
> [...]
> 
> > +static void mtk_iommu_tlb_flush_all(void *cookie)
> > +{
> > +       struct mtk_iommu_domain *domain = cookie;
> > +       void __iomem *base;
> > +
> > +       base = domain->data->base;
> > +       writel(F_INVLD_EN1 | F_INVLD_EN0, base + REG_MMU_INV_SEL);
> > +       writel(F_ALL_INVLD, base + REG_MMU_INVALIDATE);
> 
> This needs to be synchronous, so you probably want to call
> mtk_iommu_tlb_sync at the end.

>From our spec, we have to wait until HW done after tlb flush range.
But it don't need wait after tlb flush all.
so It isn't necessary to add mtk_iommu_tlb_sync in tlb_flush_all here.

> 
> > +}
> > +
> > +static void mtk_iommu_tlb_add_flush(unsigned long iova, size_t size,
> > +                                   bool leaf, void *cookie)
> > +{
> > +       struct mtk_iommu_domain *domain = cookie;
> > +       void __iomem *base = domain->data->base;
> > +       unsigned int iova_start = iova, iova_end = iova + size - 1;
> > +
> > +       writel(F_INVLD_EN1 | F_INVLD_EN0, base + REG_MMU_INV_SEL);
> > +
> > +       writel(iova_start, base + REG_MMU_INVLD_START_A);
> > +       writel(iova_end, base + REG_MMU_INVLD_END_A);
> > +       writel(F_MMU_INV_RANGE, base + REG_MMU_INVALIDATE);
> 
> Why are you using writel instead of writel_relaxed? I asked this before
> but I don't think you replied.

Sorry, I didn't notice _relax last time. I will improve in next version.
Thanks very much.

> 
> Will

  reply	other threads:[~2015-07-24  5:43 UTC|newest]

Thread overview: 103+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-16  9:04 [PATCH v3 0/6] MT8173 IOMMU SUPPORT Yong Wu
2015-07-16  9:04 ` Yong Wu
2015-07-16  9:04 ` Yong Wu
2015-07-16  9:04 ` [PATCH v3 1/6] dt-bindings: iommu: Add binding for mediatek IOMMU Yong Wu
2015-07-16  9:04   ` Yong Wu
2015-07-16  9:04   ` Yong Wu
2015-07-16  9:04 ` [PATCH v3 2/6] dt-bindings: mediatek: Add smi dts binding Yong Wu
2015-07-16  9:04   ` Yong Wu
2015-07-16  9:04   ` Yong Wu
2015-07-16  9:04 ` [PATCH v3 3/6] iommu: add ARM short descriptor page table allocator Yong Wu
2015-07-16  9:04   ` Yong Wu
2015-07-16  9:04   ` Yong Wu
2015-07-21 17:11   ` Will Deacon
2015-07-21 17:11     ` Will Deacon
2015-07-21 17:11     ` Will Deacon
2015-07-24  5:24     ` Yong Wu
2015-07-24  5:24       ` Yong Wu
2015-07-24  5:24       ` Yong Wu
2015-07-24 16:53       ` Will Deacon
2015-07-24 16:53         ` Will Deacon
2015-07-24 16:53         ` Will Deacon
2015-07-27  4:21         ` Yong Wu
2015-07-27  4:21           ` Yong Wu
2015-07-27  4:21           ` Yong Wu
2015-07-27 14:05           ` Robin Murphy
2015-07-27 14:05             ` Robin Murphy
2015-07-27 14:05             ` Robin Murphy
2015-07-27 14:11             ` Will Deacon
2015-07-27 14:11               ` Will Deacon
2015-07-27 14:11               ` Will Deacon
2015-07-28  5:08               ` Yong Wu
2015-07-28  5:08                 ` Yong Wu
2015-07-28  5:08                 ` Yong Wu
2015-07-28 11:00                 ` Will Deacon
2015-07-28 11:00                   ` Will Deacon
2015-07-28 11:00                   ` Will Deacon
2015-07-28 13:37                   ` Yong Wu
2015-07-28 13:37                     ` Yong Wu
2015-07-28 13:37                     ` Yong Wu
2015-07-28 13:47                     ` Will Deacon
2015-07-28 13:47                       ` Will Deacon
2015-07-28 13:47                       ` Will Deacon
2015-07-31  7:55           ` Yong Wu
2015-07-31 11:32             ` Will Deacon
2015-07-31 11:32               ` Will Deacon
2015-07-31 11:32               ` Will Deacon
2015-09-14 12:25     ` Yong Wu
2015-09-14 12:25       ` Yong Wu
2015-09-14 12:25       ` Yong Wu
2015-09-16 12:55       ` Will Deacon
2015-09-16 12:55         ` Will Deacon
2015-09-16 12:55         ` Will Deacon
2015-09-17  2:38         ` Yong Wu
2015-09-17  2:38           ` Yong Wu
2015-09-17  2:38           ` Yong Wu
2015-07-16  9:04 ` [PATCH v3 4/6] memory: mediatek: Add SMI driver Yong Wu
2015-07-16  9:04   ` Yong Wu
2015-07-16  9:04   ` Yong Wu
2015-07-16  9:04 ` [PATCH v3 5/6] iommu/mediatek: Add mt8173 IOMMU driver Yong Wu
2015-07-16  9:04   ` Yong Wu
2015-07-16  9:04   ` Yong Wu
2015-07-21 14:59   ` Will Deacon
2015-07-21 14:59     ` Will Deacon
2015-07-21 14:59     ` Will Deacon
2015-07-24  5:43     ` Yong Wu [this message]
2015-07-24  5:43       ` Yong Wu
2015-07-24  5:43       ` Yong Wu
2015-07-24 16:55       ` Will Deacon
2015-07-24 16:55         ` Will Deacon
2015-07-24 16:55         ` Will Deacon
2015-07-27  4:24         ` Yong Wu
2015-07-27  4:24           ` Yong Wu
2015-07-27  4:24           ` Yong Wu
2015-07-27 15:48           ` Will Deacon
2015-07-27 15:48             ` Will Deacon
2015-07-27 15:48             ` Will Deacon
2015-07-27 13:23   ` Robin Murphy
2015-07-27 13:23     ` Robin Murphy
2015-07-27 13:23     ` Robin Murphy
2015-07-27 15:31     ` Russell King - ARM Linux
2015-07-27 15:31       ` Russell King - ARM Linux
2015-07-27 15:31       ` Russell King - ARM Linux
2015-07-27 15:49       ` Robin Murphy
2015-07-27 15:49         ` Robin Murphy
2015-07-27 15:49         ` Robin Murphy
2015-07-29  5:41         ` Yong Wu
2015-07-29  5:41           ` Yong Wu
2015-07-29  5:41           ` Yong Wu
2015-07-29 10:31           ` Will Deacon
2015-07-29 10:31             ` Will Deacon
2015-07-29 10:31             ` Will Deacon
2015-07-29  6:32     ` Yong Wu
2015-07-29  6:32       ` Yong Wu
2015-07-29  6:32       ` Yong Wu
2015-07-16  9:04 ` [PATCH v3 6/6] dts: mt8173: Add iommu/smi nodes for mt8173 Yong Wu
2015-07-16  9:04   ` Yong Wu
2015-07-16  9:04   ` Yong Wu
2015-07-23 14:40   ` Daniel Kurtz
2015-07-23 14:40     ` Daniel Kurtz
2015-07-23 14:40     ` Daniel Kurtz
2015-07-29  7:29     ` Yong Wu
2015-07-29  7:29       ` Yong Wu
2015-07-29  7:29       ` Yong Wu

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