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From: Rajendra Nayak <rnayak@codeaurora.org>
To: sboyd@codeaurora.org, mturquette@baylibre.com
Cc: linux-arm-msm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org,
	georgi.djakov@linaro.org, svarbanov@mm-sol.com,
	srinivas.kandagatla@linaro.org, sviau@codeaurora.org,
	Rajendra Nayak <rnayak@codeaurora.org>
Subject: [PATCH v8 13/13] clk: qcom: gdsc: Manage clocks with !CONFIG_PM
Date: Thu,  6 Aug 2015 16:07:54 +0530	[thread overview]
Message-ID: <1438857474-20262-14-git-send-email-rnayak@codeaurora.org> (raw)
In-Reply-To: <1438857474-20262-1-git-send-email-rnayak@codeaurora.org>

With CONFIG_PM disabled, turn the devices clocks on during
driver binding to the device, and turn them off when the
driver is unbound from the device. Platforms can specify
all the clocks that need to be managed in !CONFIG_PM case
using qcom_pm_add_notifier().

The use of pm_clk_add_notifier() isn't appropriate here since we need
to only manage clocks with valid power domain associations done via
DT, instead of what pm_clk_add_notifier() does, which is manage clocks
for all on SoC/off SoC devices associating all of them to a dummy power
domain instead

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
---
 drivers/clk/qcom/gdsc.c | 74 +++++++++++++++++++++++++++++++++++++++++++++++++
 drivers/clk/qcom/gdsc.h |  8 ++++++
 2 files changed, 82 insertions(+)

diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c
index 20965fc..afc0b15 100644
--- a/drivers/clk/qcom/gdsc.c
+++ b/drivers/clk/qcom/gdsc.c
@@ -17,6 +17,7 @@
 #include <linux/err.h>
 #include <linux/jiffies.h>
 #include <linux/kernel.h>
+#include <linux/platform_device.h>
 #include <linux/pm_clock.h>
 #include <linux/pm_domain.h>
 #include <linux/regmap.h>
@@ -303,3 +304,76 @@ void gdsc_unregister(struct device *dev)
 {
 	of_genpd_del_provider(dev->of_node);
 }
+
+#ifndef CONFIG_PM
+static void enable_clock(struct of_phandle_args *clkspec)
+{
+	struct clk *clk;
+
+	clk = of_clk_get_from_provider(clkspec);
+	if (!IS_ERR(clk)) {
+		clk_prepare_enable(clk);
+		clk_put(clk);
+	}
+}
+
+static void disable_clock(struct of_phandle_args *clkspec)
+{
+	struct clk *clk;
+
+	clk = of_clk_get_from_provider(clkspec);
+	if (!IS_ERR(clk)) {
+		clk_disable_unprepare(clk);
+		clk_put(clk);
+	}
+}
+
+static int clk_notify(struct notifier_block *nb, unsigned long action,
+		      void *data)
+{
+	int sz, i = 0;
+	struct device *dev = data;
+	struct gdsc_notifier_block *gdsc_nb;
+	struct of_phandle_args clkspec;
+	struct device_node *np = dev->of_node;
+
+	if (!of_find_property(dev->of_node, "power-domains", &sz))
+		return 0;
+
+	gdsc_nb = container_of(nb, struct gdsc_notifier_block, nb);
+
+	if (!gdsc_nb->clock_count)
+		return 0;
+
+	switch (action) {
+	case BUS_NOTIFY_BIND_DRIVER:
+		while (!of_parse_phandle_with_args(np, "clocks", "#clock-cells",
+						   i, &clkspec)) {
+			if (match(clkspec.args[0], gdsc_nb->clocks,
+				  gdsc_nb->clock_count))
+				enable_clock(&clkspec);
+			i++;
+		}
+		break;
+	case BUS_NOTIFY_UNBOUND_DRIVER:
+		while (!of_parse_phandle_with_args(np, "clocks", "#clock-cells",
+						   i, &clkspec)) {
+			if (match(clkspec.args[0], gdsc_nb->clocks,
+				  gdsc_nb->clock_count))
+				disable_clock(&clkspec);
+			i++;
+		}
+		break;
+	}
+	return 0;
+}
+
+void qcom_pm_add_notifier(struct gdsc_notifier_block *gdsc_nb)
+{
+	if (!gdsc_nb)
+		return;
+
+	gdsc_nb->nb.notifier_call = clk_notify,
+	bus_register_notifier(&platform_bus_type, &gdsc_nb->nb);
+}
+#endif
diff --git a/drivers/clk/qcom/gdsc.h b/drivers/clk/qcom/gdsc.h
index 0b958a6..b0a36ed 100644
--- a/drivers/clk/qcom/gdsc.h
+++ b/drivers/clk/qcom/gdsc.h
@@ -76,4 +76,12 @@ static inline int gdsc_register(struct device *d, struct gdsc **g, size_t n,
 
 static inline void gdsc_unregister(struct device *d) {};
 #endif /* CONFIG_QCOM_GDSC */
+#ifndef CONFIG_PM
+struct gdsc_notifier_block {
+	struct notifier_block nb;
+	unsigned int	*clocks;
+	unsigned int	clock_count;
+};
+void qcom_pm_add_notifier(struct gdsc_notifier_block *);
+#endif /* !CONFIG_PM */
 #endif /* __QCOM_GDSC_H__ */
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation


WARNING: multiple messages have this Message-ID (diff)
From: rnayak@codeaurora.org (Rajendra Nayak)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v8 13/13] clk: qcom: gdsc: Manage clocks with !CONFIG_PM
Date: Thu,  6 Aug 2015 16:07:54 +0530	[thread overview]
Message-ID: <1438857474-20262-14-git-send-email-rnayak@codeaurora.org> (raw)
In-Reply-To: <1438857474-20262-1-git-send-email-rnayak@codeaurora.org>

With CONFIG_PM disabled, turn the devices clocks on during
driver binding to the device, and turn them off when the
driver is unbound from the device. Platforms can specify
all the clocks that need to be managed in !CONFIG_PM case
using qcom_pm_add_notifier().

The use of pm_clk_add_notifier() isn't appropriate here since we need
to only manage clocks with valid power domain associations done via
DT, instead of what pm_clk_add_notifier() does, which is manage clocks
for all on SoC/off SoC devices associating all of them to a dummy power
domain instead

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
---
 drivers/clk/qcom/gdsc.c | 74 +++++++++++++++++++++++++++++++++++++++++++++++++
 drivers/clk/qcom/gdsc.h |  8 ++++++
 2 files changed, 82 insertions(+)

diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c
index 20965fc..afc0b15 100644
--- a/drivers/clk/qcom/gdsc.c
+++ b/drivers/clk/qcom/gdsc.c
@@ -17,6 +17,7 @@
 #include <linux/err.h>
 #include <linux/jiffies.h>
 #include <linux/kernel.h>
+#include <linux/platform_device.h>
 #include <linux/pm_clock.h>
 #include <linux/pm_domain.h>
 #include <linux/regmap.h>
@@ -303,3 +304,76 @@ void gdsc_unregister(struct device *dev)
 {
 	of_genpd_del_provider(dev->of_node);
 }
+
+#ifndef CONFIG_PM
+static void enable_clock(struct of_phandle_args *clkspec)
+{
+	struct clk *clk;
+
+	clk = of_clk_get_from_provider(clkspec);
+	if (!IS_ERR(clk)) {
+		clk_prepare_enable(clk);
+		clk_put(clk);
+	}
+}
+
+static void disable_clock(struct of_phandle_args *clkspec)
+{
+	struct clk *clk;
+
+	clk = of_clk_get_from_provider(clkspec);
+	if (!IS_ERR(clk)) {
+		clk_disable_unprepare(clk);
+		clk_put(clk);
+	}
+}
+
+static int clk_notify(struct notifier_block *nb, unsigned long action,
+		      void *data)
+{
+	int sz, i = 0;
+	struct device *dev = data;
+	struct gdsc_notifier_block *gdsc_nb;
+	struct of_phandle_args clkspec;
+	struct device_node *np = dev->of_node;
+
+	if (!of_find_property(dev->of_node, "power-domains", &sz))
+		return 0;
+
+	gdsc_nb = container_of(nb, struct gdsc_notifier_block, nb);
+
+	if (!gdsc_nb->clock_count)
+		return 0;
+
+	switch (action) {
+	case BUS_NOTIFY_BIND_DRIVER:
+		while (!of_parse_phandle_with_args(np, "clocks", "#clock-cells",
+						   i, &clkspec)) {
+			if (match(clkspec.args[0], gdsc_nb->clocks,
+				  gdsc_nb->clock_count))
+				enable_clock(&clkspec);
+			i++;
+		}
+		break;
+	case BUS_NOTIFY_UNBOUND_DRIVER:
+		while (!of_parse_phandle_with_args(np, "clocks", "#clock-cells",
+						   i, &clkspec)) {
+			if (match(clkspec.args[0], gdsc_nb->clocks,
+				  gdsc_nb->clock_count))
+				disable_clock(&clkspec);
+			i++;
+		}
+		break;
+	}
+	return 0;
+}
+
+void qcom_pm_add_notifier(struct gdsc_notifier_block *gdsc_nb)
+{
+	if (!gdsc_nb)
+		return;
+
+	gdsc_nb->nb.notifier_call = clk_notify,
+	bus_register_notifier(&platform_bus_type, &gdsc_nb->nb);
+}
+#endif
diff --git a/drivers/clk/qcom/gdsc.h b/drivers/clk/qcom/gdsc.h
index 0b958a6..b0a36ed 100644
--- a/drivers/clk/qcom/gdsc.h
+++ b/drivers/clk/qcom/gdsc.h
@@ -76,4 +76,12 @@ static inline int gdsc_register(struct device *d, struct gdsc **g, size_t n,
 
 static inline void gdsc_unregister(struct device *d) {};
 #endif /* CONFIG_QCOM_GDSC */
+#ifndef CONFIG_PM
+struct gdsc_notifier_block {
+	struct notifier_block nb;
+	unsigned int	*clocks;
+	unsigned int	clock_count;
+};
+void qcom_pm_add_notifier(struct gdsc_notifier_block *);
+#endif /* !CONFIG_PM */
 #endif /* __QCOM_GDSC_H__ */
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation

  parent reply	other threads:[~2015-08-06 10:37 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-08-06 10:37 [PATCH v8 00/13] qcom: Add support for GDSCs Rajendra Nayak
2015-08-06 10:37 ` Rajendra Nayak
2015-08-06 10:37 ` [PATCH v8 01/13] clk: " Rajendra Nayak
2015-08-06 10:37   ` Rajendra Nayak
2015-08-11  6:59   ` Stephen Boyd
2015-08-11  6:59     ` Stephen Boyd
2015-08-06 10:37 ` [PATCH v8 02/13] clk: qcom: gdsc: Prepare common clk probe to register gdscs Rajendra Nayak
2015-08-06 10:37   ` Rajendra Nayak
2015-08-11  6:59   ` Stephen Boyd
2015-08-11  6:59     ` Stephen Boyd
2015-08-06 10:37 ` [PATCH v8 03/13] clk: qcom: gdsc: Add support for Memory RET/OFF Rajendra Nayak
2015-08-06 10:37   ` Rajendra Nayak
2015-08-11  6:59   ` Stephen Boyd
2015-08-11  6:59     ` Stephen Boyd
2015-08-06 10:37 ` [PATCH v8 04/13] clk: qcom: gdsc: Add support for ON only state Rajendra Nayak
2015-08-06 10:37   ` Rajendra Nayak
2015-08-11  6:59   ` Stephen Boyd
2015-08-11  6:59     ` Stephen Boyd
2015-08-06 10:37 ` [PATCH v8 05/13] clk: qcom: gdsc: Add GDSCs in msm8916 GCC Rajendra Nayak
2015-08-06 10:37   ` Rajendra Nayak
2015-08-11  6:59   ` Stephen Boyd
2015-08-11  6:59     ` Stephen Boyd
2015-08-06 10:37 ` [PATCH v8 06/13] clk: qcom: gdsc: Add GDSCs in msm8974 GCC Rajendra Nayak
2015-08-06 10:37   ` Rajendra Nayak
2015-08-11  6:59   ` Stephen Boyd
2015-08-11  6:59     ` Stephen Boyd
2015-08-06 10:37 ` [PATCH v8 07/13] clk: qcom: gdsc: Add GDSCs in msm8974 MMCC Rajendra Nayak
2015-08-06 10:37   ` Rajendra Nayak
2015-08-11  6:59   ` Stephen Boyd
2015-08-11  6:59     ` Stephen Boyd
2015-08-06 10:37 ` [PATCH v8 08/13] clk: qcom: gdsc: Add GDSCs in apq8084 GCC Rajendra Nayak
2015-08-06 10:37   ` Rajendra Nayak
2015-08-11  7:01   ` Stephen Boyd
2015-08-11  7:01     ` Stephen Boyd
2015-08-06 10:37 ` [PATCH v8 09/13] clk: qcom: gdsc: Add GDSCs in apq8084 MMCC Rajendra Nayak
2015-08-06 10:37   ` Rajendra Nayak
2015-08-11  7:02   ` Stephen Boyd
2015-08-11  7:02     ` Stephen Boyd
2015-08-06 10:37 ` [PATCH v8 10/13] arm: dts: qcom: Add #power-domain-cells property Rajendra Nayak
2015-08-06 10:37   ` Rajendra Nayak
2015-08-11  6:53   ` Stephen Boyd
2015-08-11  6:53     ` Stephen Boyd
2015-08-13  4:24     ` Rajendra Nayak
2015-08-13  4:24       ` Rajendra Nayak
2015-08-14  1:44       ` Stephen Boyd
2015-08-14  1:44         ` Stephen Boyd
2015-08-06 10:37 ` [PATCH v8 11/13] clk: qcom: gdsc: Use PM clocks to control gdsc clocks Rajendra Nayak
2015-08-06 10:37   ` Rajendra Nayak
2015-08-11  6:52   ` Stephen Boyd
2015-08-11  6:52     ` Stephen Boyd
2015-08-13  4:23     ` Rajendra Nayak
2015-08-13  4:23       ` Rajendra Nayak
2015-11-27  8:29     ` Rajendra Nayak
2015-11-27  8:29       ` Rajendra Nayak
2015-12-01  8:59       ` Stephen Boyd
2015-12-01  8:59         ` Stephen Boyd
2015-08-06 10:37 ` [PATCH v8 12/13] clk: qcom: gdsc: Enable an RCG before turing on the gdsc Rajendra Nayak
2015-08-06 10:37   ` Rajendra Nayak
2015-08-06 10:37 ` Rajendra Nayak [this message]
2015-08-06 10:37   ` [PATCH v8 13/13] clk: qcom: gdsc: Manage clocks with !CONFIG_PM Rajendra Nayak

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