From: Leilk Liu <leilk.liu@mediatek.com>
To: Mark Brown <broonie@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
Sascha Hauer <s.hauer@pengutronix.de>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-spi@vger.kernel.org>, <linux-mediatek@lists.infradead.org>,
Leilk Liu <leilk.liu@mediatek.com>
Subject: [PATCH v2 3/4] spi: mediatek: use BIT() to instead of SPI_CMD_*_OFFSET
Date: Thu, 20 Aug 2015 17:19:08 +0800 [thread overview]
Message-ID: <1440062349-25513-4-git-send-email-leilk.liu@mediatek.com> (raw)
In-Reply-To: <1440062349-25513-1-git-send-email-leilk.liu@mediatek.com>
This patch removes SPI_CMD_*_OFFSET defines, and uses the BIT(x)
defines instead.
Signed-off-by: Leilk Liu <leilk.liu@mediatek.com>
---
drivers/spi/spi-mt65xx.c | 37 ++++++++++++++++++++-----------------
1 file changed, 20 insertions(+), 17 deletions(-)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 4fa4332..43c1dd5 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -48,15 +48,8 @@
#define SPI_CFG1_PACKET_LOOP_MASK 0xff00
#define SPI_CFG1_PACKET_LENGTH_MASK 0x3ff0000
-#define SPI_CMD_ACT_OFFSET 0
-#define SPI_CMD_RESUME_OFFSET 1
-#define SPI_CMD_CPHA_OFFSET 8
-#define SPI_CMD_CPOL_OFFSET 9
-#define SPI_CMD_TXMSBF_OFFSET 12
-#define SPI_CMD_RXMSBF_OFFSET 13
-#define SPI_CMD_RX_ENDIAN_OFFSET 14
-#define SPI_CMD_TX_ENDIAN_OFFSET 15
-
+#define SPI_CMD_ACT BIT(0)
+#define SPI_CMD_RESUME BIT(1)
#define SPI_CMD_RST BIT(2)
#define SPI_CMD_PAUSE_EN BIT(4)
#define SPI_CMD_DEASSERT BIT(5)
@@ -143,9 +136,14 @@ static void mtk_spi_config(struct mtk_spi *mdata,
reg_val = readl(mdata->base + SPI_CMD_REG);
/* set the mlsbx and mlsbtx */
- reg_val &= ~(SPI_CMD_TXMSBF | SPI_CMD_RXMSBF);
- reg_val |= (chip_config->tx_mlsb << SPI_CMD_TXMSBF_OFFSET);
- reg_val |= (chip_config->rx_mlsb << SPI_CMD_RXMSBF_OFFSET);
+ if (chip_config->tx_mlsb)
+ reg_val |= SPI_CMD_TXMSBF;
+ else
+ reg_val &= ~SPI_CMD_TXMSBF;
+ if (chip_config->rx_mlsb)
+ reg_val |= SPI_CMD_RXMSBF;
+ else
+ reg_val &= ~SPI_CMD_RXMSBF;
/* set the tx/rx endian */
#ifdef __LITTLE_ENDIAN
@@ -201,9 +199,14 @@ static int mtk_spi_prepare_message(struct spi_master *master,
cpol = spi->mode & SPI_CPOL ? 1 : 0;
reg_val = readl(mdata->base + SPI_CMD_REG);
- reg_val &= ~(SPI_CMD_CPHA | SPI_CMD_CPOL);
- reg_val |= (cpha << SPI_CMD_CPHA_OFFSET);
- reg_val |= (cpol << SPI_CMD_CPOL_OFFSET);
+ if (cpha)
+ reg_val |= SPI_CMD_CPHA;
+ else
+ reg_val &= ~SPI_CMD_CPHA;
+ if (cpol)
+ reg_val |= SPI_CMD_CPOL;
+ else
+ reg_val &= ~SPI_CMD_CPOL;
writel(reg_val, mdata->base + SPI_CMD_REG);
chip_config = spi->controller_data;
@@ -282,9 +285,9 @@ static void mtk_spi_enable_transfer(struct spi_master *master)
cmd = readl(mdata->base + SPI_CMD_REG);
if (mdata->state == MTK_SPI_IDLE)
- cmd |= 1 << SPI_CMD_ACT_OFFSET;
+ cmd |= SPI_CMD_ACT;
else
- cmd |= 1 << SPI_CMD_RESUME_OFFSET;
+ cmd |= SPI_CMD_RESUME;
writel(cmd, mdata->base + SPI_CMD_REG);
}
--
1.8.1.1.dirty
WARNING: multiple messages have this Message-ID (diff)
From: Leilk Liu <leilk.liu@mediatek.com>
To: Mark Brown <broonie@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
Sascha Hauer <s.hauer@pengutronix.de>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org,
linux-mediatek@lists.infradead.org,
Leilk Liu <leilk.liu@mediatek.com>
Subject: [PATCH v2 3/4] spi: mediatek: use BIT() to instead of SPI_CMD_*_OFFSET
Date: Thu, 20 Aug 2015 17:19:08 +0800 [thread overview]
Message-ID: <1440062349-25513-4-git-send-email-leilk.liu@mediatek.com> (raw)
In-Reply-To: <1440062349-25513-1-git-send-email-leilk.liu@mediatek.com>
This patch removes SPI_CMD_*_OFFSET defines, and uses the BIT(x)
defines instead.
Signed-off-by: Leilk Liu <leilk.liu@mediatek.com>
---
drivers/spi/spi-mt65xx.c | 37 ++++++++++++++++++++-----------------
1 file changed, 20 insertions(+), 17 deletions(-)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 4fa4332..43c1dd5 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -48,15 +48,8 @@
#define SPI_CFG1_PACKET_LOOP_MASK 0xff00
#define SPI_CFG1_PACKET_LENGTH_MASK 0x3ff0000
-#define SPI_CMD_ACT_OFFSET 0
-#define SPI_CMD_RESUME_OFFSET 1
-#define SPI_CMD_CPHA_OFFSET 8
-#define SPI_CMD_CPOL_OFFSET 9
-#define SPI_CMD_TXMSBF_OFFSET 12
-#define SPI_CMD_RXMSBF_OFFSET 13
-#define SPI_CMD_RX_ENDIAN_OFFSET 14
-#define SPI_CMD_TX_ENDIAN_OFFSET 15
-
+#define SPI_CMD_ACT BIT(0)
+#define SPI_CMD_RESUME BIT(1)
#define SPI_CMD_RST BIT(2)
#define SPI_CMD_PAUSE_EN BIT(4)
#define SPI_CMD_DEASSERT BIT(5)
@@ -143,9 +136,14 @@ static void mtk_spi_config(struct mtk_spi *mdata,
reg_val = readl(mdata->base + SPI_CMD_REG);
/* set the mlsbx and mlsbtx */
- reg_val &= ~(SPI_CMD_TXMSBF | SPI_CMD_RXMSBF);
- reg_val |= (chip_config->tx_mlsb << SPI_CMD_TXMSBF_OFFSET);
- reg_val |= (chip_config->rx_mlsb << SPI_CMD_RXMSBF_OFFSET);
+ if (chip_config->tx_mlsb)
+ reg_val |= SPI_CMD_TXMSBF;
+ else
+ reg_val &= ~SPI_CMD_TXMSBF;
+ if (chip_config->rx_mlsb)
+ reg_val |= SPI_CMD_RXMSBF;
+ else
+ reg_val &= ~SPI_CMD_RXMSBF;
/* set the tx/rx endian */
#ifdef __LITTLE_ENDIAN
@@ -201,9 +199,14 @@ static int mtk_spi_prepare_message(struct spi_master *master,
cpol = spi->mode & SPI_CPOL ? 1 : 0;
reg_val = readl(mdata->base + SPI_CMD_REG);
- reg_val &= ~(SPI_CMD_CPHA | SPI_CMD_CPOL);
- reg_val |= (cpha << SPI_CMD_CPHA_OFFSET);
- reg_val |= (cpol << SPI_CMD_CPOL_OFFSET);
+ if (cpha)
+ reg_val |= SPI_CMD_CPHA;
+ else
+ reg_val &= ~SPI_CMD_CPHA;
+ if (cpol)
+ reg_val |= SPI_CMD_CPOL;
+ else
+ reg_val &= ~SPI_CMD_CPOL;
writel(reg_val, mdata->base + SPI_CMD_REG);
chip_config = spi->controller_data;
@@ -282,9 +285,9 @@ static void mtk_spi_enable_transfer(struct spi_master *master)
cmd = readl(mdata->base + SPI_CMD_REG);
if (mdata->state == MTK_SPI_IDLE)
- cmd |= 1 << SPI_CMD_ACT_OFFSET;
+ cmd |= SPI_CMD_ACT;
else
- cmd |= 1 << SPI_CMD_RESUME_OFFSET;
+ cmd |= SPI_CMD_RESUME;
writel(cmd, mdata->base + SPI_CMD_REG);
}
--
1.8.1.1.dirty
WARNING: multiple messages have this Message-ID (diff)
From: leilk.liu@mediatek.com (Leilk Liu)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 3/4] spi: mediatek: use BIT() to instead of SPI_CMD_*_OFFSET
Date: Thu, 20 Aug 2015 17:19:08 +0800 [thread overview]
Message-ID: <1440062349-25513-4-git-send-email-leilk.liu@mediatek.com> (raw)
In-Reply-To: <1440062349-25513-1-git-send-email-leilk.liu@mediatek.com>
This patch removes SPI_CMD_*_OFFSET defines, and uses the BIT(x)
defines instead.
Signed-off-by: Leilk Liu <leilk.liu@mediatek.com>
---
drivers/spi/spi-mt65xx.c | 37 ++++++++++++++++++++-----------------
1 file changed, 20 insertions(+), 17 deletions(-)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 4fa4332..43c1dd5 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -48,15 +48,8 @@
#define SPI_CFG1_PACKET_LOOP_MASK 0xff00
#define SPI_CFG1_PACKET_LENGTH_MASK 0x3ff0000
-#define SPI_CMD_ACT_OFFSET 0
-#define SPI_CMD_RESUME_OFFSET 1
-#define SPI_CMD_CPHA_OFFSET 8
-#define SPI_CMD_CPOL_OFFSET 9
-#define SPI_CMD_TXMSBF_OFFSET 12
-#define SPI_CMD_RXMSBF_OFFSET 13
-#define SPI_CMD_RX_ENDIAN_OFFSET 14
-#define SPI_CMD_TX_ENDIAN_OFFSET 15
-
+#define SPI_CMD_ACT BIT(0)
+#define SPI_CMD_RESUME BIT(1)
#define SPI_CMD_RST BIT(2)
#define SPI_CMD_PAUSE_EN BIT(4)
#define SPI_CMD_DEASSERT BIT(5)
@@ -143,9 +136,14 @@ static void mtk_spi_config(struct mtk_spi *mdata,
reg_val = readl(mdata->base + SPI_CMD_REG);
/* set the mlsbx and mlsbtx */
- reg_val &= ~(SPI_CMD_TXMSBF | SPI_CMD_RXMSBF);
- reg_val |= (chip_config->tx_mlsb << SPI_CMD_TXMSBF_OFFSET);
- reg_val |= (chip_config->rx_mlsb << SPI_CMD_RXMSBF_OFFSET);
+ if (chip_config->tx_mlsb)
+ reg_val |= SPI_CMD_TXMSBF;
+ else
+ reg_val &= ~SPI_CMD_TXMSBF;
+ if (chip_config->rx_mlsb)
+ reg_val |= SPI_CMD_RXMSBF;
+ else
+ reg_val &= ~SPI_CMD_RXMSBF;
/* set the tx/rx endian */
#ifdef __LITTLE_ENDIAN
@@ -201,9 +199,14 @@ static int mtk_spi_prepare_message(struct spi_master *master,
cpol = spi->mode & SPI_CPOL ? 1 : 0;
reg_val = readl(mdata->base + SPI_CMD_REG);
- reg_val &= ~(SPI_CMD_CPHA | SPI_CMD_CPOL);
- reg_val |= (cpha << SPI_CMD_CPHA_OFFSET);
- reg_val |= (cpol << SPI_CMD_CPOL_OFFSET);
+ if (cpha)
+ reg_val |= SPI_CMD_CPHA;
+ else
+ reg_val &= ~SPI_CMD_CPHA;
+ if (cpol)
+ reg_val |= SPI_CMD_CPOL;
+ else
+ reg_val &= ~SPI_CMD_CPOL;
writel(reg_val, mdata->base + SPI_CMD_REG);
chip_config = spi->controller_data;
@@ -282,9 +285,9 @@ static void mtk_spi_enable_transfer(struct spi_master *master)
cmd = readl(mdata->base + SPI_CMD_REG);
if (mdata->state == MTK_SPI_IDLE)
- cmd |= 1 << SPI_CMD_ACT_OFFSET;
+ cmd |= SPI_CMD_ACT;
else
- cmd |= 1 << SPI_CMD_RESUME_OFFSET;
+ cmd |= SPI_CMD_RESUME;
writel(cmd, mdata->base + SPI_CMD_REG);
}
--
1.8.1.1.dirty
next prev parent reply other threads:[~2015-08-20 9:20 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-20 9:19 [PATCH v2 0/4] Fixup mediatek spi driver Leilk Liu
2015-08-20 9:19 ` Leilk Liu
2015-08-20 9:19 ` Leilk Liu
2015-08-20 9:19 ` Leilk Liu
2015-08-20 9:19 ` [PATCH v2 1/4] spi: mediatek: fix spi incorrect endian usage Leilk Liu
2015-08-20 9:19 ` Leilk Liu
2015-08-20 9:19 ` Leilk Liu
2015-08-20 9:19 ` Leilk Liu
[not found] ` <1440062349-25513-2-git-send-email-leilk.liu-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
2015-08-20 18:34 ` Applied "spi: mediatek: fix spi incorrect endian usage" to the spi tree Mark Brown
2015-08-20 9:19 ` [PATCH v2 2/4] spi: medaitek: revise quirks compatibility style Leilk Liu
2015-08-20 9:19 ` Leilk Liu
2015-08-20 9:19 ` Leilk Liu
[not found] ` <1440062349-25513-3-git-send-email-leilk.liu-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
2015-08-20 18:34 ` Applied "spi: medaitek: revise quirks compatibility style" to the spi tree Mark Brown
2015-08-20 9:19 ` Leilk Liu [this message]
2015-08-20 9:19 ` [PATCH v2 3/4] spi: mediatek: use BIT() to instead of SPI_CMD_*_OFFSET Leilk Liu
2015-08-20 9:19 ` Leilk Liu
[not found] ` <1440062349-25513-4-git-send-email-leilk.liu-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
2015-08-20 18:34 ` Applied "spi: mediatek: use BIT() to instead of SPI_CMD_*_OFFSET" to the spi tree Mark Brown
2015-08-20 9:19 ` [PATCH v2 4/4] spi: mediatek: revise coding style Leilk Liu
2015-08-20 9:19 ` Leilk Liu
2015-08-20 9:19 ` Leilk Liu
2015-08-20 9:19 ` Leilk Liu
2015-08-20 18:17 ` Mark Brown
2015-08-20 18:17 ` Mark Brown
2015-08-20 18:17 ` Mark Brown
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