[PATCH 4/4] drm/i915: Program vactive & hactive display size for both ports

From: Gaurav K Singh <gaurav.k.singh@intel.com>
To: intel-gfx <intel-gfx@lists.freedesktop.org>
Cc: rakshmi.bhatia@intel.com
Subject: [PATCH 4/4] drm/i915: Program vactive & hactive display size for both ports
Date: Wed, 16 Sep 2015 14:48:41 +0530	[thread overview]
Message-ID: <1442395121-19251-5-git-send-email-gaurav.k.singh@intel.com> (raw)
In-Reply-To: <1442395121-19251-1-git-send-email-gaurav.k.singh@intel.com>

Program the required mmio regs for hactive and vactive display size.

Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c |   37 ++++++++++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index ab9f06a..0285af9 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -7653,6 +7653,7 @@ static void intel_get_pipe_timings(struct intel_crtc *crtc,
 	struct drm_device *dev = crtc->base.dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
+	bool is_dsi = intel_pipe_has_type(crtc, INTEL_OUTPUT_DSI);
 	uint32_t tmp;
 
 	tmp = I915_READ(HTOTAL(cpu_transcoder));
@@ -7681,6 +7682,25 @@ static void intel_get_pipe_timings(struct intel_crtc *crtc,
 		pipe_config->base.adjusted_mode.crtc_vblank_end += 1;
 	}
 
+	 if (IS_BROXTON(dev) && is_dsi) {
+		struct intel_encoder *encoder;
+
+		for_each_encoder_on_crtc(dev, &crtc->base, encoder) {
+			struct intel_dsi *intel_dsi =
+				enc_to_intel_dsi(&encoder->base);
+			enum port port;
+
+			for_each_dsi_port(port, intel_dsi->ports) {
+				pipe_config->base.adjusted_mode.crtc_hdisplay =
+						I915_READ(BXT_MIPI_TRANS_HACTIVE(port));
+				pipe_config->base.adjusted_mode.crtc_vdisplay =
+						I915_READ(BXT_MIPI_TRANS_VACTIVE(port));
+				pipe_config->base.adjusted_mode.crtc_vtotal =
+						I915_READ(BXT_MIPI_TRANS_VTOTAL(port));
+			}
+		}
+	}
+
 	tmp = I915_READ(PIPESRC(crtc->pipe));
 	pipe_config->pipe_src_h = (tmp & 0xffff) + 1;
 	pipe_config->pipe_src_w = ((tmp >> 16) & 0xffff) + 1;
@@ -10569,6 +10589,7 @@ struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
 	int vtot = I915_READ(VTOTAL(cpu_transcoder));
 	int vsync = I915_READ(VSYNC(cpu_transcoder));
 	enum pipe pipe = intel_crtc->pipe;
+	bool is_dsi = intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_DSI);
 
 	mode = kzalloc(sizeof(*mode), GFP_KERNEL);
 	if (!mode)
@@ -10598,6 +10619,22 @@ struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
 	mode->vsync_start = (vsync & 0xffff) + 1;
 	mode->vsync_end = ((vsync & 0xffff0000) >> 16) + 1;
 
+	if (IS_BROXTON(dev) && is_dsi) {
+		struct intel_encoder *encoder;
+
+		for_each_encoder_on_crtc(dev, &intel_crtc->base, encoder) {
+			struct intel_dsi *intel_dsi =
+						enc_to_intel_dsi(&encoder->base);
+			enum port port;
+
+			for_each_dsi_port(port, intel_dsi->ports) {
+				mode->vtotal = I915_READ(BXT_MIPI_TRANS_VTOTAL(port));
+				mode->hdisplay = I915_READ(BXT_MIPI_TRANS_HACTIVE(port));
+				mode->vdisplay = I915_READ(BXT_MIPI_TRANS_VACTIVE(port));
+			}
+		}
+	}
+
 	drm_mode_set_name(mode);
 
 	return mode;
-- 
1.7.9.5

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