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From: Mathieu Poirier <mathieu.poirier@linaro.org>
To: gregkh@linuxfoundation.org, a.p.zijlstra@chello.nl,
	alexander.shishkin@linux.intel.com, acme@kernel.org,
	mingo@redhat.com, corbet@lwn.net, nicolas.pitre@linaro.org
Cc: adrian.hunter@intel.com, zhang.chunyan@linaro.org,
	mike.leach@arm.com, tor@ti.com, al.grant@arm.com,
	pawel.moll@arm.com, linux-arm-kernel@lists.infradead.org,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	mathieu.poirier@linaro.org
Subject: [PATCH V2 08/30] coresight: etm3x: implementing 'cpu_id()' API
Date: Sun, 18 Oct 2015 12:24:25 -0600	[thread overview]
Message-ID: <1445192687-24112-9-git-send-email-mathieu.poirier@linaro.org> (raw)
In-Reply-To: <1445192687-24112-1-git-send-email-mathieu.poirier@linaro.org>

Adding an interface to lookup the CPU a tracer has been affined
to along with a source operation allowing external customers to
access it.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
 drivers/hwtracing/coresight/coresight-etm3x.c | 8 ++++++++
 include/linux/coresight.h                     | 3 +++
 2 files changed, 11 insertions(+)

diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c
index 3fe6433764d4..e199746bba05 100644
--- a/drivers/hwtracing/coresight/coresight-etm3x.c
+++ b/drivers/hwtracing/coresight/coresight-etm3x.c
@@ -312,6 +312,13 @@ static void etm_enable_hw(void *info)
 	dev_dbg(drvdata->dev, "cpu: %d enable smp call done\n", drvdata->cpu);
 }
 
+static int etm_cpu_id(struct coresight_device *csdev)
+{
+	struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+
+	return drvdata->cpu;
+}
+
 int etm_get_trace_id(struct etm_drvdata *drvdata)
 {
 	unsigned long flags;
@@ -444,6 +451,7 @@ static void sysfs_etm_disable(struct coresight_device *csdev)
 }
 
 static const struct coresight_ops_source etm_source_ops = {
+	.cpu_id		= etm_cpu_id,
 	.trace_id	= etm_trace_id,
 	.sysfs_enable	= sysfs_etm_enable,
 	.sysfs_disable	= sysfs_etm_disable,
diff --git a/include/linux/coresight.h b/include/linux/coresight.h
index 97155527dbdd..f9210df15f03 100644
--- a/include/linux/coresight.h
+++ b/include/linux/coresight.h
@@ -205,12 +205,15 @@ struct coresight_ops_link {
 /**
  * struct coresight_ops_source - basic operations for a source
  * Operations available for sources.
+ * @cpu_id:		returns the value of the CPU number this component
+ *			is associated to.
  * @trace_id:		returns the value of the component's trace ID as known
 			to the HW.
  * @sysfs_enable:	enables tracing for a source, from sysFS.
  * @sysfs_disable:	disables tracing for a source, from sysFS.
  */
 struct coresight_ops_source {
+	int (*cpu_id)(struct coresight_device *csdev);
 	int (*trace_id)(struct coresight_device *csdev);
 	int (*sysfs_enable)(struct coresight_device *csdev);
 	void (*sysfs_disable)(struct coresight_device *csdev);
-- 
1.9.1


WARNING: multiple messages have this Message-ID (diff)
From: mathieu.poirier@linaro.org (Mathieu Poirier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V2 08/30] coresight: etm3x: implementing 'cpu_id()' API
Date: Sun, 18 Oct 2015 12:24:25 -0600	[thread overview]
Message-ID: <1445192687-24112-9-git-send-email-mathieu.poirier@linaro.org> (raw)
In-Reply-To: <1445192687-24112-1-git-send-email-mathieu.poirier@linaro.org>

Adding an interface to lookup the CPU a tracer has been affined
to along with a source operation allowing external customers to
access it.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
---
 drivers/hwtracing/coresight/coresight-etm3x.c | 8 ++++++++
 include/linux/coresight.h                     | 3 +++
 2 files changed, 11 insertions(+)

diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c
index 3fe6433764d4..e199746bba05 100644
--- a/drivers/hwtracing/coresight/coresight-etm3x.c
+++ b/drivers/hwtracing/coresight/coresight-etm3x.c
@@ -312,6 +312,13 @@ static void etm_enable_hw(void *info)
 	dev_dbg(drvdata->dev, "cpu: %d enable smp call done\n", drvdata->cpu);
 }
 
+static int etm_cpu_id(struct coresight_device *csdev)
+{
+	struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
+
+	return drvdata->cpu;
+}
+
 int etm_get_trace_id(struct etm_drvdata *drvdata)
 {
 	unsigned long flags;
@@ -444,6 +451,7 @@ static void sysfs_etm_disable(struct coresight_device *csdev)
 }
 
 static const struct coresight_ops_source etm_source_ops = {
+	.cpu_id		= etm_cpu_id,
 	.trace_id	= etm_trace_id,
 	.sysfs_enable	= sysfs_etm_enable,
 	.sysfs_disable	= sysfs_etm_disable,
diff --git a/include/linux/coresight.h b/include/linux/coresight.h
index 97155527dbdd..f9210df15f03 100644
--- a/include/linux/coresight.h
+++ b/include/linux/coresight.h
@@ -205,12 +205,15 @@ struct coresight_ops_link {
 /**
  * struct coresight_ops_source - basic operations for a source
  * Operations available for sources.
+ * @cpu_id:		returns the value of the CPU number this component
+ *			is associated to.
  * @trace_id:		returns the value of the component's trace ID as known
 			to the HW.
  * @sysfs_enable:	enables tracing for a source, from sysFS.
  * @sysfs_disable:	disables tracing for a source, from sysFS.
  */
 struct coresight_ops_source {
+	int (*cpu_id)(struct coresight_device *csdev);
 	int (*trace_id)(struct coresight_device *csdev);
 	int (*sysfs_enable)(struct coresight_device *csdev);
 	void (*sysfs_disable)(struct coresight_device *csdev);
-- 
1.9.1

  parent reply	other threads:[~2015-10-18 18:32 UTC|newest]

Thread overview: 86+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-18 18:24 [PATCH V2 00/30] Coresight integration with perf Mathieu Poirier
2015-10-18 18:24 ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 01/30] coresight: etm3x: moving etm_readl/writel to header file Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-19 18:37   ` Greg KH
2015-10-19 18:37     ` Greg KH
2015-10-18 18:24 ` [PATCH V2 02/30] coresight: etm3x: moving sysFS entries to dedicated file Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 03/30] coresight: etm3x: unlocking tracers in default arch init Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 04/30] coresight: etm3x: splitting struct etm_drvdata Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 05/30] coresight: etm3x: set progbit to stop trace collection Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 06/30] coresight: clearly labeling source operarions Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 07/30] coresight: etm3x: moving etm_drvdata::enable to atomic field Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` Mathieu Poirier [this message]
2015-10-18 18:24   ` [PATCH V2 08/30] coresight: etm3x: implementing 'cpu_id()' API Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 09/30] coresight: etm3x: changing default trace configuration Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 10/30] coresight: etm3x: consolidating initial config Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 11/30] coresight: etm3x: implementing user/kernel mode tracing Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 12/30] coresight: etm3x: adding perf_get/set_config() API Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 13/30] coresight: etm3x: implementing perf_enable/disable() API Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 14/30] coresight: etm3x: implementing perf_start/stop() API Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 15/30] coresight: making coresight_build_paths() public Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 16/30] coresight: keeping track of enabled sink buffers Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 17/30] perf: changing pmu::setup_aux() parameter to include event Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-19 13:34   ` Alexander Shishkin
2015-10-19 13:34     ` Alexander Shishkin
2015-10-18 18:24 ` [PATCH V2 18/30] coresight: etb10: moving to local atomic operations Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 19/30] coresight: etb10: implementing the setup_aux() API Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-19 13:44   ` Alexander Shishkin
2015-10-19 13:44     ` Alexander Shishkin
2015-10-20 16:40     ` Mathieu Poirier
2015-10-20 16:40       ` Mathieu Poirier
2015-10-20 11:37   ` Alexander Shishkin
2015-10-20 11:37     ` Alexander Shishkin
2015-10-18 18:24 ` [PATCH V2 20/30] coresight: etb10: implementing buffer set/reset() API Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-20  9:56   ` Alexander Shishkin
2015-10-20  9:56     ` Alexander Shishkin
2015-10-20 17:30     ` Mathieu Poirier
2015-10-20 17:30       ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 21/30] coresight: etb10: implementing buffer update API Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 22/30] coresight: etm-perf: new PMU driver for ETM tracers Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-19 15:37   ` Alexander Shishkin
2015-10-19 15:37     ` Alexander Shishkin
2015-10-20 16:43     ` Mathieu Poirier
2015-10-20 16:43       ` Mathieu Poirier
2015-10-20  9:34   ` Alexander Shishkin
2015-10-20  9:34     ` Alexander Shishkin
2015-10-20 19:15     ` Mathieu Poirier
2015-10-20 19:15       ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 23/30] coresight: updating documentation to reflect integration with perf Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 24/30] perf tools: making function set_max_cpu_num() non static Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 25/30] perf tools: adding perf_session to *info_prive_size() Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 26/30] perf tools: making source devices path broadly accessible Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 27/30] perf build: adding X86 auxiliary specific flags Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-19 10:40   ` Adrian Hunter
2015-10-19 10:40     ` Adrian Hunter
2015-10-18 18:24 ` [PATCH V2 28/30] perf tools: making coresight PMU listable Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 29/30] perf tools: adding coresight define for auxtrace Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier
2015-10-18 18:24 ` [PATCH V2 30/30] perf tools: adding coresight etm PMU record capabilities Mathieu Poirier
2015-10-18 18:24   ` Mathieu Poirier

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