From: Chen-Yu Tsai <wens@csie.org>
To: Ulf Hansson <ulf.hansson@linaro.org>,
Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Chen-Yu Tsai <wens@csie.org>, Hans de Goede <hdegoede@redhat.com>,
linux-mmc@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com
Subject: [PATCH 3/3] mmc: sunxi: Enable eMMC HS-DDR (MMC_CAP_1_8V_DDR) support
Date: Sat, 30 Jan 2016 01:21:48 +0800 [thread overview]
Message-ID: <1454088108-2332-4-git-send-email-wens@csie.org> (raw)
In-Reply-To: <1454088108-2332-1-git-send-email-wens@csie.org>
Now that clock delay settings for 8 bit DDR are correct, and vqmmc
support is available, we can enable MMC_CAP_1_8V_DDR support. This
enables MMC HS-DDR at up to 52 MHz, even if signal voltage switching
is not available.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
There was discussion about an alternative: setting this capability
in the DT to preserve DT backwards compatibility. However just setting
it in the DT without the driver updates also breaks it. Furthermore,
Maxime's latest "clk: sunxi: Refactor A31 PLL6 so that it can be reused"
patch will break DT compatility. Given the above, I see no reason to
try and maintain compatibility only to fail.
---
drivers/mmc/host/sunxi-mmc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c
index bb4592696046..2aee17cd85ae 100644
--- a/drivers/mmc/host/sunxi-mmc.c
+++ b/drivers/mmc/host/sunxi-mmc.c
@@ -1131,6 +1131,7 @@ static int sunxi_mmc_probe(struct platform_device *pdev)
mmc->f_min = 400000;
mmc->f_max = 52000000;
mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
+ MMC_CAP_1_8V_DDR |
MMC_CAP_ERASE | MMC_CAP_SDIO_IRQ;
ret = mmc_of_parse(mmc);
--
2.7.0
WARNING: multiple messages have this Message-ID (diff)
From: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
To: Ulf Hansson <ulf.hansson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Maxime Ripard
<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Cc: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>,
Hans de Goede <hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>,
linux-mmc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org
Subject: [PATCH 3/3] mmc: sunxi: Enable eMMC HS-DDR (MMC_CAP_1_8V_DDR) support
Date: Sat, 30 Jan 2016 01:21:48 +0800 [thread overview]
Message-ID: <1454088108-2332-4-git-send-email-wens@csie.org> (raw)
In-Reply-To: <1454088108-2332-1-git-send-email-wens-jdAy2FN1RRM@public.gmane.org>
Now that clock delay settings for 8 bit DDR are correct, and vqmmc
support is available, we can enable MMC_CAP_1_8V_DDR support. This
enables MMC HS-DDR at up to 52 MHz, even if signal voltage switching
is not available.
Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
---
There was discussion about an alternative: setting this capability
in the DT to preserve DT backwards compatibility. However just setting
it in the DT without the driver updates also breaks it. Furthermore,
Maxime's latest "clk: sunxi: Refactor A31 PLL6 so that it can be reused"
patch will break DT compatility. Given the above, I see no reason to
try and maintain compatibility only to fail.
---
drivers/mmc/host/sunxi-mmc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c
index bb4592696046..2aee17cd85ae 100644
--- a/drivers/mmc/host/sunxi-mmc.c
+++ b/drivers/mmc/host/sunxi-mmc.c
@@ -1131,6 +1131,7 @@ static int sunxi_mmc_probe(struct platform_device *pdev)
mmc->f_min = 400000;
mmc->f_max = 52000000;
mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
+ MMC_CAP_1_8V_DDR |
MMC_CAP_ERASE | MMC_CAP_SDIO_IRQ;
ret = mmc_of_parse(mmc);
--
2.7.0
WARNING: multiple messages have this Message-ID (diff)
From: wens@csie.org (Chen-Yu Tsai)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/3] mmc: sunxi: Enable eMMC HS-DDR (MMC_CAP_1_8V_DDR) support
Date: Sat, 30 Jan 2016 01:21:48 +0800 [thread overview]
Message-ID: <1454088108-2332-4-git-send-email-wens@csie.org> (raw)
In-Reply-To: <1454088108-2332-1-git-send-email-wens@csie.org>
Now that clock delay settings for 8 bit DDR are correct, and vqmmc
support is available, we can enable MMC_CAP_1_8V_DDR support. This
enables MMC HS-DDR at up to 52 MHz, even if signal voltage switching
is not available.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
There was discussion about an alternative: setting this capability
in the DT to preserve DT backwards compatibility. However just setting
it in the DT without the driver updates also breaks it. Furthermore,
Maxime's latest "clk: sunxi: Refactor A31 PLL6 so that it can be reused"
patch will break DT compatility. Given the above, I see no reason to
try and maintain compatibility only to fail.
---
drivers/mmc/host/sunxi-mmc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c
index bb4592696046..2aee17cd85ae 100644
--- a/drivers/mmc/host/sunxi-mmc.c
+++ b/drivers/mmc/host/sunxi-mmc.c
@@ -1131,6 +1131,7 @@ static int sunxi_mmc_probe(struct platform_device *pdev)
mmc->f_min = 400000;
mmc->f_max = 52000000;
mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
+ MMC_CAP_1_8V_DDR |
MMC_CAP_ERASE | MMC_CAP_SDIO_IRQ;
ret = mmc_of_parse(mmc);
--
2.7.0
next prev parent reply other threads:[~2016-01-29 17:22 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-29 17:21 [PATCH 0/3] mmc: sunxi: Support eMMC DDR modes Chen-Yu Tsai
2016-01-29 17:21 ` Chen-Yu Tsai
2016-01-29 17:21 ` Chen-Yu Tsai
2016-01-29 17:21 ` [PATCH 1/3] mmc: sunxi: Support MMC_DDR52 timing modes Chen-Yu Tsai
2016-01-29 17:21 ` Chen-Yu Tsai
2016-01-29 17:21 ` [PATCH 2/3] mmc: sunxi: Support 8 bit eMMC DDR transfer modes Chen-Yu Tsai
2016-01-29 17:21 ` Chen-Yu Tsai
2016-01-29 17:21 ` Chen-Yu Tsai
2016-01-29 17:21 ` Chen-Yu Tsai [this message]
2016-01-29 17:21 ` [PATCH 3/3] mmc: sunxi: Enable eMMC HS-DDR (MMC_CAP_1_8V_DDR) support Chen-Yu Tsai
2016-01-29 17:21 ` Chen-Yu Tsai
2016-01-31 9:40 ` [linux-sunxi] [PATCH 0/3] mmc: sunxi: Support eMMC DDR modes Hans de Goede
2016-01-31 9:40 ` Hans de Goede
2016-01-31 9:40 ` Hans de Goede
2016-02-02 13:11 ` Ulf Hansson
2016-02-02 13:11 ` Ulf Hansson
2016-02-02 13:11 ` Ulf Hansson
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