From: Sascha Hauer <s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> To: linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>, Shawn Guo <shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>, Anton Bondarenko <anton.bondarenko.sama-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Subject: [PATCH 01/13] spi: imx: allow only WML aligned transfers to use DMA Date: Wed, 17 Feb 2016 14:28:47 +0100 [thread overview] Message-ID: <1455715739-25161-2-git-send-email-s.hauer@pengutronix.de> (raw) In-Reply-To: <1455715739-25161-1-git-send-email-s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> From: Anton Bondarenko <anton.bondarenko.sama-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> RX DMA tail data handling doesn't work correctly in many cases with current implementation. It happens because SPI core was setup to generates both RX and RX TAIL events. And RX TAIL event does not work correctly. This can be easily verified by sending SPI transaction with size modulus WML(32 in our case) not equal 0. Also removing change introduced in f6ee9b582d2db652497b73c1f117591dfb6d3a90 since this change only fix usecases with transfer size from 33 to 128 bytes and doesn't fix 129 bytes and bigger. This is output from transaction with len 138 bytes in loopback mode at 10Mhz: TX0000: a3 97 a2 55 53 be f1 fc f9 79 6b 52 14 13 e9 e2 TX0010: 2d 51 8e 1f 56 08 57 27 a7 05 d4 d0 52 82 77 75 TX0020: 1b 99 4a ed 58 3d 6a 52 36 d5 24 4a 68 8e ad 95 TX0030: 5f 3c 35 b5 c4 8c dd 6c 11 32 3d e2 b4 b4 59 cf TX0040: ce 23 3d 27 df a7 f9 96 fc 1e e0 66 2c 0e 7b 8c TX0050: ca 30 42 8f bc 9f 7b ce d1 b8 b1 87 ec 8a d6 bb TX0060: 2e 15 63 0e 3c dc a4 3a 7a 06 20 a7 93 1b 34 dd TX0070: 4c f5 ec 88 96 68 d6 68 a0 09 6f 8e 93 47 c9 41 TX0080: db ac cf 97 89 f3 51 05 79 71 RX0000: a3 97 a2 55 53 be f1 fc f9 79 6b 52 14 13 e9 e2 RX0010: 2d 51 8e 1f 56 08 57 27 a7 05 d4 d0 52 82 77 75 RX0020: 1b 99 4a ed 58 3d 6a 52 36 d5 24 4a 68 8e ad 95 RX0030: 5f 3c 35 00 00 b5 00 00 00 c4 00 00 8c 00 00 dd RX0040: 6c 11 32 3d e2 b4 b4 59 cf ce 23 3d 27 df a7 f9 RX0050: 96 fc 1e e0 66 2c 0e 7b 8c ca 30 42 8f 1f 1f bc RX0060: 9f 7b ce d1 b8 b1 87 ec 8a d6 bb 2e 15 63 0e ed RX0070: ed 3c 58 58 58 dc 3d 3d a4 6a 6a 3a 52 52 7a 36 RX0080: 06 20 a7 93 1b 34 dd 4c f5 ec Zeros at offset 33 and 34 caused by reading empty RX FIFO which not possible if DMA RX read was triggered by RX event. This mean DMA was triggered by RX TAIL event. Signed-off-by: Anton Bondarenko <anton.bondarenko.sama-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Signed-off--by: Sascha Hauer <s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> --- drivers/spi/spi-imx.c | 17 ++--------------- 1 file changed, 2 insertions(+), 15 deletions(-) diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index d98c33c..08492d6 100644 --- a/drivers/spi/spi-imx.c +++ b/drivers/spi/spi-imx.c @@ -204,8 +204,8 @@ static bool spi_imx_can_dma(struct spi_master *master, struct spi_device *spi, { struct spi_imx_data *spi_imx = spi_master_get_devdata(master); - if (spi_imx->dma_is_inited && - transfer->len > spi_imx->wml * sizeof(u32)) + if (spi_imx->dma_is_inited && transfer->len >= spi_imx->wml && + (transfer->len % spi_imx->wml) == 0) return true; return false; } @@ -919,8 +919,6 @@ static int spi_imx_dma_transfer(struct spi_imx_data *spi_imx, struct dma_async_tx_descriptor *desc_tx = NULL, *desc_rx = NULL; int ret; unsigned long timeout; - u32 dma; - int left; struct spi_master *master = spi_imx->bitbang.master; struct sg_table *tx = &transfer->tx_sg, *rx = &transfer->rx_sg; @@ -954,13 +952,6 @@ static int spi_imx_dma_transfer(struct spi_imx_data *spi_imx, /* Trigger the cspi module. */ spi_imx->dma_finished = 0; - dma = readl(spi_imx->base + MX51_ECSPI_DMA); - dma = dma & (~MX51_ECSPI_DMA_RXT_WML_MASK); - /* Change RX_DMA_LENGTH trigger dma fetch tail data */ - left = transfer->len % spi_imx->wml; - if (left) - writel(dma | (left << MX51_ECSPI_DMA_RXT_WML_OFFSET), - spi_imx->base + MX51_ECSPI_DMA); /* * Set these order to avoid potential RX overflow. The overflow may * happen if we enable SPI HW before starting RX DMA due to rescheduling @@ -992,10 +983,6 @@ static int spi_imx_dma_transfer(struct spi_imx_data *spi_imx, spi_imx->devtype_data->reset(spi_imx); dmaengine_terminate_all(master->dma_rx); } - dma &= ~MX51_ECSPI_DMA_RXT_WML_MASK; - writel(dma | - spi_imx->wml << MX51_ECSPI_DMA_RXT_WML_OFFSET, - spi_imx->base + MX51_ECSPI_DMA); } spi_imx->dma_finished = 1; -- 2.7.0 -- To unsubscribe from this list: send the line "unsubscribe linux-spi" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html
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From: s.hauer@pengutronix.de (Sascha Hauer) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 01/13] spi: imx: allow only WML aligned transfers to use DMA Date: Wed, 17 Feb 2016 14:28:47 +0100 [thread overview] Message-ID: <1455715739-25161-2-git-send-email-s.hauer@pengutronix.de> (raw) In-Reply-To: <1455715739-25161-1-git-send-email-s.hauer@pengutronix.de> From: Anton Bondarenko <anton.bondarenko.sama@gmail.com> RX DMA tail data handling doesn't work correctly in many cases with current implementation. It happens because SPI core was setup to generates both RX and RX TAIL events. And RX TAIL event does not work correctly. This can be easily verified by sending SPI transaction with size modulus WML(32 in our case) not equal 0. Also removing change introduced in f6ee9b582d2db652497b73c1f117591dfb6d3a90 since this change only fix usecases with transfer size from 33 to 128 bytes and doesn't fix 129 bytes and bigger. This is output from transaction with len 138 bytes in loopback mode at 10Mhz: TX0000: a3 97 a2 55 53 be f1 fc f9 79 6b 52 14 13 e9 e2 TX0010: 2d 51 8e 1f 56 08 57 27 a7 05 d4 d0 52 82 77 75 TX0020: 1b 99 4a ed 58 3d 6a 52 36 d5 24 4a 68 8e ad 95 TX0030: 5f 3c 35 b5 c4 8c dd 6c 11 32 3d e2 b4 b4 59 cf TX0040: ce 23 3d 27 df a7 f9 96 fc 1e e0 66 2c 0e 7b 8c TX0050: ca 30 42 8f bc 9f 7b ce d1 b8 b1 87 ec 8a d6 bb TX0060: 2e 15 63 0e 3c dc a4 3a 7a 06 20 a7 93 1b 34 dd TX0070: 4c f5 ec 88 96 68 d6 68 a0 09 6f 8e 93 47 c9 41 TX0080: db ac cf 97 89 f3 51 05 79 71 RX0000: a3 97 a2 55 53 be f1 fc f9 79 6b 52 14 13 e9 e2 RX0010: 2d 51 8e 1f 56 08 57 27 a7 05 d4 d0 52 82 77 75 RX0020: 1b 99 4a ed 58 3d 6a 52 36 d5 24 4a 68 8e ad 95 RX0030: 5f 3c 35 00 00 b5 00 00 00 c4 00 00 8c 00 00 dd RX0040: 6c 11 32 3d e2 b4 b4 59 cf ce 23 3d 27 df a7 f9 RX0050: 96 fc 1e e0 66 2c 0e 7b 8c ca 30 42 8f 1f 1f bc RX0060: 9f 7b ce d1 b8 b1 87 ec 8a d6 bb 2e 15 63 0e ed RX0070: ed 3c 58 58 58 dc 3d 3d a4 6a 6a 3a 52 52 7a 36 RX0080: 06 20 a7 93 1b 34 dd 4c f5 ec Zeros at offset 33 and 34 caused by reading empty RX FIFO which not possible if DMA RX read was triggered by RX event. This mean DMA was triggered by RX TAIL event. Signed-off-by: Anton Bondarenko <anton.bondarenko.sama@gmail.com> Signed-off--by: Sascha Hauer <s.hauer@pengutronix.de> --- drivers/spi/spi-imx.c | 17 ++--------------- 1 file changed, 2 insertions(+), 15 deletions(-) diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index d98c33c..08492d6 100644 --- a/drivers/spi/spi-imx.c +++ b/drivers/spi/spi-imx.c @@ -204,8 +204,8 @@ static bool spi_imx_can_dma(struct spi_master *master, struct spi_device *spi, { struct spi_imx_data *spi_imx = spi_master_get_devdata(master); - if (spi_imx->dma_is_inited && - transfer->len > spi_imx->wml * sizeof(u32)) + if (spi_imx->dma_is_inited && transfer->len >= spi_imx->wml && + (transfer->len % spi_imx->wml) == 0) return true; return false; } @@ -919,8 +919,6 @@ static int spi_imx_dma_transfer(struct spi_imx_data *spi_imx, struct dma_async_tx_descriptor *desc_tx = NULL, *desc_rx = NULL; int ret; unsigned long timeout; - u32 dma; - int left; struct spi_master *master = spi_imx->bitbang.master; struct sg_table *tx = &transfer->tx_sg, *rx = &transfer->rx_sg; @@ -954,13 +952,6 @@ static int spi_imx_dma_transfer(struct spi_imx_data *spi_imx, /* Trigger the cspi module. */ spi_imx->dma_finished = 0; - dma = readl(spi_imx->base + MX51_ECSPI_DMA); - dma = dma & (~MX51_ECSPI_DMA_RXT_WML_MASK); - /* Change RX_DMA_LENGTH trigger dma fetch tail data */ - left = transfer->len % spi_imx->wml; - if (left) - writel(dma | (left << MX51_ECSPI_DMA_RXT_WML_OFFSET), - spi_imx->base + MX51_ECSPI_DMA); /* * Set these order to avoid potential RX overflow. The overflow may * happen if we enable SPI HW before starting RX DMA due to rescheduling @@ -992,10 +983,6 @@ static int spi_imx_dma_transfer(struct spi_imx_data *spi_imx, spi_imx->devtype_data->reset(spi_imx); dmaengine_terminate_all(master->dma_rx); } - dma &= ~MX51_ECSPI_DMA_RXT_WML_MASK; - writel(dma | - spi_imx->wml << MX51_ECSPI_DMA_RXT_WML_OFFSET, - spi_imx->base + MX51_ECSPI_DMA); } spi_imx->dma_finished = 1; -- 2.7.0
next prev parent reply other threads:[~2016-02-17 13:28 UTC|newest] Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-02-17 13:28 [PATCH] i.MX SPI DMA cleanup Sascha Hauer 2016-02-17 13:28 ` Sascha Hauer [not found] ` <1455715739-25161-1-git-send-email-s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> 2016-02-17 13:28 ` Sascha Hauer [this message] 2016-02-17 13:28 ` [PATCH 01/13] spi: imx: allow only WML aligned transfers to use DMA Sascha Hauer [not found] ` <1455715739-25161-2-git-send-email-s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> 2016-02-17 14:16 ` Mark Brown 2016-02-17 14:16 ` Mark Brown [not found] ` <20160217141619.GR7544-GFdadSzt00ze9xe1eoZjHA@public.gmane.org> 2016-02-17 15:01 ` Sascha Hauer 2016-02-17 15:01 ` Sascha Hauer [not found] ` <20160217150146.GC3939-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> 2016-02-17 16:05 ` Mark Brown 2016-02-17 16:05 ` Mark Brown 2016-02-17 19:13 ` Applied "spi: imx: allow only WML aligned transfers to use DMA" to the spi tree Mark Brown 2016-02-17 13:28 ` [PATCH 02/13] spi: imx: use proper dev_* functions for driver messages Sascha Hauer 2016-02-17 13:28 ` Sascha Hauer [not found] ` <1455715739-25161-3-git-send-email-s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> 2016-02-17 19:13 ` Applied "spi: imx: use proper dev_* functions for driver messages" to the spi tree Mark Brown 2016-02-17 13:28 ` [PATCH 03/13] spi: imx: replace fixed timeout with calculated Sascha Hauer 2016-02-17 13:28 ` Sascha Hauer [not found] ` <1455715739-25161-4-git-send-email-s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> 2016-02-17 14:22 ` Mark Brown 2016-02-17 14:22 ` Mark Brown 2016-02-20 18:11 ` Applied "spi: imx: replace fixed timeout with calculated" to the spi tree Mark Brown 2016-02-17 13:28 ` [PATCH 04/13] spi: imx: drop fallback to PIO Sascha Hauer 2016-02-17 13:28 ` Sascha Hauer 2016-02-17 13:28 ` [PATCH 05/13] spi: imx: initialize usedma earlier Sascha Hauer 2016-02-17 13:28 ` Sascha Hauer [not found] ` <1455715739-25161-6-git-send-email-s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> 2016-02-26 2:48 ` Applied "spi: imx: initialize usedma earlier" to the spi tree Mark Brown 2016-02-17 13:28 ` [PATCH 06/13] spi: imx: drop unnecessary read/modify/write Sascha Hauer 2016-02-17 13:28 ` Sascha Hauer [not found] ` <1455715739-25161-7-git-send-email-s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> 2016-02-26 2:48 ` Applied "spi: imx: drop unnecessary read/modify/write" to the spi tree Mark Brown 2016-02-17 13:28 ` [PATCH 07/13] spi: imx: drop unncessary dma_is_inited variable Sascha Hauer 2016-02-17 13:28 ` Sascha Hauer [not found] ` <1455715739-25161-8-git-send-email-s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> 2016-02-26 2:47 ` Applied "spi: imx: drop unncessary dma_is_inited variable" to the spi tree Mark Brown 2016-02-17 13:28 ` [PATCH 08/13] spi: imx: add support for all SPI word width for DMA Sascha Hauer 2016-02-17 13:28 ` Sascha Hauer [not found] ` <1455715739-25161-9-git-send-email-s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> 2016-02-26 2:47 ` Applied "spi: imx: add support for all SPI word width for DMA" to the spi tree Mark Brown 2016-02-17 13:28 ` [PATCH 09/13] spi: imx: remove unnecessary bit clearing in mx51_ecspi_config Sascha Hauer 2016-02-17 13:28 ` Sascha Hauer [not found] ` <1455715739-25161-10-git-send-email-s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> 2016-02-26 2:47 ` Applied "spi: imx: remove unnecessary bit clearing in mx51_ecspi_config" to the spi tree Mark Brown 2016-02-17 13:28 ` [PATCH 10/13] spi: imx: make some register defines simpler Sascha Hauer 2016-02-17 13:28 ` Sascha Hauer [not found] ` <1455715739-25161-11-git-send-email-s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> 2016-02-26 2:47 ` Applied "spi: imx: make some register defines simpler" to the spi tree Mark Brown 2016-02-17 13:28 ` [PATCH 11/13] spi: imx: set MX51_ECSPI_CTRL_SMC bit in setup function Sascha Hauer 2016-02-17 13:28 ` Sascha Hauer [not found] ` <1455715739-25161-12-git-send-email-s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> 2016-02-26 2:47 ` Applied "spi: imx: set MX51_ECSPI_CTRL_SMC bit in setup function" to the spi tree Mark Brown 2016-02-17 13:28 ` [PATCH 12/13] spi: imx: drop bogus tests for rx/tx bufs in DMA transfer Sascha Hauer 2016-02-17 13:28 ` Sascha Hauer 2016-02-17 13:28 ` [PATCH 13/13] ARM: dts: imx6: Use correct SDMA script for SPI cores Sascha Hauer 2016-02-17 13:28 ` Sascha Hauer 2016-02-17 13:42 ` [PATCH] i.MX SPI DMA cleanup Dirk Behme 2016-02-17 13:42 ` Dirk Behme [not found] ` <56C478C9.6050706-V5te9oGctAVWk0Htik3J/w@public.gmane.org> 2016-02-17 13:54 ` Sascha Hauer 2016-02-17 13:54 ` Sascha Hauer [not found] ` <20160217135441.GA3939-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> 2016-02-17 14:10 ` Dirk Behme 2016-02-17 14:10 ` Dirk Behme [not found] ` <56C47F64.1080706-V5te9oGctAVWk0Htik3J/w@public.gmane.org> 2016-02-17 14:59 ` Sascha Hauer 2016-02-17 14:59 ` Sascha Hauer [not found] ` <20160217145944.GB3939-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org> 2016-02-17 15:33 ` Dirk Behme 2016-02-17 15:33 ` Dirk Behme [not found] ` <56C492DB.6000405-V5te9oGctAVWk0Htik3J/w@public.gmane.org> 2016-02-17 15:40 ` Fabio Estevam 2016-02-17 15:40 ` Fabio Estevam 2016-02-18 14:47 ` Shawn Guo 2016-02-18 14:47 ` Shawn Guo
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