[PATCH v8 05/10] drm/i915: Introduce host graphics memory partition for GVT-g

From: Zhi Wang <zhi.a.wang@intel.com>
To: chris@chris-wilson.co.uk, zhiyuan.lv@intel.com,
	kevin.tian@intel.com, tvrtko.ursulin@linux.intel.com,
	intel-gfx@lists.freedesktop.org
Subject: [PATCH v8 05/10] drm/i915: Introduce host graphics memory partition for GVT-g
Date: Wed,  8 Jun 2016 11:30:23 -0400	[thread overview]
Message-ID: <1465399828-17082-6-git-send-email-zhi.a.wang@intel.com> (raw)
In-Reply-To: <1465399828-17082-1-git-send-email-zhi.a.wang@intel.com>

From: Bing Niu <bing.niu@intel.com>

This patch introduces host graphics memory partition when GVT-g
is enabled.

Under GVT-g, i915 host driver only owned limited graphics resources,
others are managed by GVT-g resource allocator and kept for other vGPUs.

v7:

- Add comments about low/high GM size for host. (Joonas)

v6:

- Remove kernel parameters used to configure GGTT owned by host. (Chris)
- Other coding style comments from Chris.
- Add more comments for reviewer.

v3:

- Remove fence partition, will use i915 fence stealing in future.(Kevin)
- Santinize GVT host gm kernel parameters. (Joonas)

v2:
- Address all coding-style comments from Joonas previously.
- Fix errors and warnning reported by checkpatch.pl. (Joonas)
- Move the graphs into the header files. (Daniel)

Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Kevin Tian <kevin.tian@intel.com>
Cc: Daniel Vetter <daniel@ffwll.ch>
Signed-off-by: Bing Niu <bing.niu@intel.com>
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
---
 drivers/gpu/drm/i915/i915_vgpu.c | 23 +++++++++++++++++------
 drivers/gpu/drm/i915/intel_gvt.h | 36 ++++++++++++++++++++++++++++++++++++
 2 files changed, 53 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_vgpu.c b/drivers/gpu/drm/i915/i915_vgpu.c
index f6acb5a..019db98 100644
--- a/drivers/gpu/drm/i915/i915_vgpu.c
+++ b/drivers/gpu/drm/i915/i915_vgpu.c
@@ -189,14 +189,25 @@ int intel_vgt_balloon(struct drm_i915_private *dev_priv)
 	unsigned long unmappable_base, unmappable_size, unmappable_end;
 	int ret;
 
-	if (!intel_vgpu_active(dev_priv))
+	if (intel_gvt_active(dev_priv)) {
+		/* Retrieve GGTT partition information from macros */
+		mappable_base = 0;
+		mappable_size = INTEL_GVT_HOST_LOW_GM_SIZE;
+		unmappable_base = dev_priv->ggtt.mappable_end;
+		unmappable_size = INTEL_GVT_HOST_HIGH_GM_SIZE;
+	} else if (intel_vgpu_active(dev_priv)) {
+		/* Retrieve GGTT partition information from PVINFO */
+		mappable_base = I915_READ(
+				vgtif_reg(avail_rs.mappable_gmadr.base));
+		mappable_size = I915_READ(
+				vgtif_reg(avail_rs.mappable_gmadr.size));
+		unmappable_base = I915_READ(
+				vgtif_reg(avail_rs.nonmappable_gmadr.base));
+		unmappable_size = I915_READ(
+				vgtif_reg(avail_rs.nonmappable_gmadr.size));
+	} else
 		return 0;
 
-	mappable_base = I915_READ(vgtif_reg(avail_rs.mappable_gmadr.base));
-	mappable_size = I915_READ(vgtif_reg(avail_rs.mappable_gmadr.size));
-	unmappable_base = I915_READ(vgtif_reg(avail_rs.nonmappable_gmadr.base));
-	unmappable_size = I915_READ(vgtif_reg(avail_rs.nonmappable_gmadr.size));
-
 	mappable_end = mappable_base + mappable_size;
 	unmappable_end = unmappable_base + unmappable_size;
 
diff --git a/drivers/gpu/drm/i915/intel_gvt.h b/drivers/gpu/drm/i915/intel_gvt.h
index 91e129f..d0d71d1 100644
--- a/drivers/gpu/drm/i915/intel_gvt.h
+++ b/drivers/gpu/drm/i915/intel_gvt.h
@@ -26,6 +26,42 @@
 
 #include "gvt/gvt.h"
 
+/*
+ * Under GVT-g, i915 host driver only owned limited graphics resources,
+ * others are managed by GVT-g resource allocator and kept for other vGPUs.
+ *
+ * For graphics memory space partition, a typical layout looks like:
+ *
+ * +-------+-----------------------+------+-----------------------+
+ * |* Host |   *GVT-g Resource     |* Host|   *GVT-g Resource     |
+ * | Owned |   Allocator Managed   | Owned|   Allocator Managed   |
+ * |       |                       |      |                       |
+ * +---------------+-------+----------------------+-------+-------+
+ * |       |       |       |       |      |       |       |       |
+ * | i915  | vm 1  | vm 2  | vm 3  | i915 | vm 1  | vm 2  | vm 3  |
+ * |       |       |       |       |      |       |       |       |
+ * +-------+-------+-------+--------------+-------+-------+-------+
+ * |           Aperture            |            Hidden            |
+ * +-------------------------------+------------------------------+
+ * |                       GGTT memory space                      |
+ * +--------------------------------------------------------------+
+ */
+
+/* GGTT memory space owned by host */
+/*
+ * This amount is heavily related to the max screen resolution / multiple
+ * display in *host*. If you are using a 4K monitor or multiple display
+ * monitor, probably you should enlarge the low gm size.
+ */
+#define INTEL_GVT_HOST_LOW_GM_SIZE (96 * 1024 * 1024)
+
+/*
+ * This amount is related to the GPU workload in host. If you wish to run
+ * heavy workload like 3D gaming, media transcoding *in host* and encounter
+ * performance drops, probably you should enlarge the high gm size.
+ */
+#define INTEL_GVT_HOST_HIGH_GM_SIZE (384 * 1024 * 1024)
+
 #ifdef CONFIG_DRM_I915_GVT
 extern int intel_gvt_init(struct drm_i915_private *dev_priv);
 extern void intel_gvt_cleanup(struct drm_i915_private *dev_priv);
-- 
1.9.1

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