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From: CK Hu <ck.hu@mediatek.com>
To: Horng-Shyang Liao <hs.liao@mediatek.com>
Cc: Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Daniel Kurtz <djkurtz@chromium.org>,
	"Sascha Hauer" <s.hauer@pengutronix.de>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-mediatek@lists.infradead.org>,
	<srv_heupstream@mediatek.com>,
	"Sascha Hauer" <kernel@pengutronix.de>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Nicolas Boichat <drinkcat@chromium.org>,
	cawa cheng <cawa.cheng@mediatek.com>,
	Bibby Hsieh <bibby.hsieh@mediatek.com>,
	YT Shen <yt.shen@mediatek.com>,
	Daoyuan Huang <daoyuan.huang@mediatek.com>,
	"Damon Chu" <damon.chu@mediatek.com>,
	Josh-YC Liu <josh-yc.liu@mediatek.com>,
	"Glory Hung" <glory.hung@mediatek.com>,
	Jiaguang Zhang <jiaguang.zhang@mediatek.com>,
	Dennis-YC Hsieh <dennis-yc.hsieh@mediatek.com>,
	Monica Wang <monica.wang@mediatek.com>
Subject: Re: [PATCH v8 2/3] CMDQ: Mediatek CMDQ driver
Date: Thu, 23 Jun 2016 19:44:11 +0800	[thread overview]
Message-ID: <1466682251.12354.0.camel@mtksdaap41> (raw)
In-Reply-To: <1466668480.12124.15.camel@mtksdaap41>

On Thu, 2016-06-23 at 15:54 +0800, Horng-Shyang Liao wrote:
> Hi CK,
> 
> On Thu, 2016-06-23 at 14:03 +0800, CK Hu wrote:
> > Hi, HS:
> > 
> > On Mon, 2016-05-30 at 11:19 +0800, HS Liao wrote:
> > [...]
> > 
> > > +
> > > +/* events for CMDQ and display */
> > > +enum cmdq_event {
> > > +	/* Display start of frame(SOF) events */
> > > +	CMDQ_EVENT_DISP_OVL0_SOF = 11,
> > > +	CMDQ_EVENT_DISP_OVL1_SOF = 12,
> > > +	CMDQ_EVENT_DISP_RDMA0_SOF = 13,
> > > +	CMDQ_EVENT_DISP_RDMA1_SOF = 14,
> > > +	CMDQ_EVENT_DISP_RDMA2_SOF = 15,
> > > +	CMDQ_EVENT_DISP_WDMA0_SOF = 16,
> > > +	CMDQ_EVENT_DISP_WDMA1_SOF = 17,
> > > +	/* Display end of frame(EOF) events */
> > > +	CMDQ_EVENT_DISP_OVL0_EOF = 39,
> > > +	CMDQ_EVENT_DISP_OVL1_EOF = 40,
> > > +	CMDQ_EVENT_DISP_RDMA0_EOF = 41,
> > > +	CMDQ_EVENT_DISP_RDMA1_EOF = 42,
> > > +	CMDQ_EVENT_DISP_RDMA2_EOF = 43,
> > > +	CMDQ_EVENT_DISP_WDMA0_EOF = 44,
> > > +	CMDQ_EVENT_DISP_WDMA1_EOF = 45,
> > > +	/* Mutex end of frame(EOF) events */
> > > +	CMDQ_EVENT_MUTEX0_STREAM_EOF = 53,
> > > +	CMDQ_EVENT_MUTEX1_STREAM_EOF = 54,
> > > +	CMDQ_EVENT_MUTEX2_STREAM_EOF = 55,
> > > +	CMDQ_EVENT_MUTEX3_STREAM_EOF = 56,
> > > +	CMDQ_EVENT_MUTEX4_STREAM_EOF = 57,
> > > +	/* Display underrun events */
> > > +	CMDQ_EVENT_DISP_RDMA0_UNDERRUN = 63,
> > > +	CMDQ_EVENT_DISP_RDMA1_UNDERRUN = 64,
> > > +	CMDQ_EVENT_DISP_RDMA2_UNDERRUN = 65,
> > > +	/* Keep this at the end of HW events */
> > > +	CMDQ_MAX_HW_EVENT_COUNT = 260,
> > > +};
> > 
> > The value of these symbol is just the GCE-HW-defined value. I think it's
> > not appropriate to expose HW-defined value to client. For another SoC
> > GCE HW, these definition may change.
> 
> Agree.
> 
> > One way to solve this problem is to translate symbol to value
> > internally. But these events looks like interrupt and the value may vary
> > by each SoC, to prevent driver modified frequently, it's better to place
> > the value definition in device tree. It may looks like:
> > 
> > mmsys: clock-controller@14000000 {
> > 	compatible = "mediatek,mt8173-mmsys";
> > 	mediatek,gce = <&gce>;
> > 	gce-events = <53 54>;
> 
> However, client still needs to know the HW-defined value by using
> this solution.
> 
> > 	gce-event-names = "MUTEX0_EOF","MUTEX1_EOF";
> > }
> > 
> > For cmdq driver, you just need modify interface from
> > 
> > int cmdq_rec_wfe(struct cmdq_rec *rec, enum cmdq_event event)
> > int cmdq_rec_clear_event(struct cmdq_rec *rec, enum cmdq_event event)
> > 
> > to
> > 
> > int cmdq_rec_wfe(struct cmdq_rec *rec, u32 event)
> > int cmdq_rec_clear_event(struct cmdq_rec *rec, u32 event)
> 
> I think an easy way for this issue is just removing HW-defined values
> from include/soc/mediatek/cmdq.h (but keeping enum), and then mapping
> abstract values into real values in driver.
> The benefit of this solution is that we can keep interface and leave SoC
> specific code into driver.
> What do you think?

Hi, HS:

OK, that's fine.

Regards,
CK

> 
> > Regards,
> > CK
> 
> Thanks,
> HS
> 
> 

WARNING: multiple messages have this Message-ID (diff)
From: CK Hu <ck.hu-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
To: Horng-Shyang Liao <hs.liao-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
Cc: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Matthias Brugger
	<matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Daniel Kurtz <djkurtz-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
	Sascha Hauer <s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	srv_heupstream-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org,
	Sascha Hauer <kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
	Philipp Zabel <p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
	Nicolas Boichat
	<drinkcat-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
	cawa cheng <cawa.cheng-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>,
	Bibby Hsieh <bibby.hsieh-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>,
	YT Shen <yt.shen-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>,
	Daoyuan Huang
	<daoyuan.huang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>,
	Damon Chu <damon.chu-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>,
	Josh-YC Liu <josh-yc.liu-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>,
	Glory Hung <glory.hung-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>,
	Jiaguang Zhang
	<jiaguang.zhang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>,
	Dennis-YC Hsieh
	<dennis-yc.hsieh-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>,
	Monica Wang <monica.wang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
Subject: Re: [PATCH v8 2/3] CMDQ: Mediatek CMDQ driver
Date: Thu, 23 Jun 2016 19:44:11 +0800	[thread overview]
Message-ID: <1466682251.12354.0.camel@mtksdaap41> (raw)
In-Reply-To: <1466668480.12124.15.camel@mtksdaap41>

On Thu, 2016-06-23 at 15:54 +0800, Horng-Shyang Liao wrote:
> Hi CK,
> 
> On Thu, 2016-06-23 at 14:03 +0800, CK Hu wrote:
> > Hi, HS:
> > 
> > On Mon, 2016-05-30 at 11:19 +0800, HS Liao wrote:
> > [...]
> > 
> > > +
> > > +/* events for CMDQ and display */
> > > +enum cmdq_event {
> > > +	/* Display start of frame(SOF) events */
> > > +	CMDQ_EVENT_DISP_OVL0_SOF = 11,
> > > +	CMDQ_EVENT_DISP_OVL1_SOF = 12,
> > > +	CMDQ_EVENT_DISP_RDMA0_SOF = 13,
> > > +	CMDQ_EVENT_DISP_RDMA1_SOF = 14,
> > > +	CMDQ_EVENT_DISP_RDMA2_SOF = 15,
> > > +	CMDQ_EVENT_DISP_WDMA0_SOF = 16,
> > > +	CMDQ_EVENT_DISP_WDMA1_SOF = 17,
> > > +	/* Display end of frame(EOF) events */
> > > +	CMDQ_EVENT_DISP_OVL0_EOF = 39,
> > > +	CMDQ_EVENT_DISP_OVL1_EOF = 40,
> > > +	CMDQ_EVENT_DISP_RDMA0_EOF = 41,
> > > +	CMDQ_EVENT_DISP_RDMA1_EOF = 42,
> > > +	CMDQ_EVENT_DISP_RDMA2_EOF = 43,
> > > +	CMDQ_EVENT_DISP_WDMA0_EOF = 44,
> > > +	CMDQ_EVENT_DISP_WDMA1_EOF = 45,
> > > +	/* Mutex end of frame(EOF) events */
> > > +	CMDQ_EVENT_MUTEX0_STREAM_EOF = 53,
> > > +	CMDQ_EVENT_MUTEX1_STREAM_EOF = 54,
> > > +	CMDQ_EVENT_MUTEX2_STREAM_EOF = 55,
> > > +	CMDQ_EVENT_MUTEX3_STREAM_EOF = 56,
> > > +	CMDQ_EVENT_MUTEX4_STREAM_EOF = 57,
> > > +	/* Display underrun events */
> > > +	CMDQ_EVENT_DISP_RDMA0_UNDERRUN = 63,
> > > +	CMDQ_EVENT_DISP_RDMA1_UNDERRUN = 64,
> > > +	CMDQ_EVENT_DISP_RDMA2_UNDERRUN = 65,
> > > +	/* Keep this at the end of HW events */
> > > +	CMDQ_MAX_HW_EVENT_COUNT = 260,
> > > +};
> > 
> > The value of these symbol is just the GCE-HW-defined value. I think it's
> > not appropriate to expose HW-defined value to client. For another SoC
> > GCE HW, these definition may change.
> 
> Agree.
> 
> > One way to solve this problem is to translate symbol to value
> > internally. But these events looks like interrupt and the value may vary
> > by each SoC, to prevent driver modified frequently, it's better to place
> > the value definition in device tree. It may looks like:
> > 
> > mmsys: clock-controller@14000000 {
> > 	compatible = "mediatek,mt8173-mmsys";
> > 	mediatek,gce = <&gce>;
> > 	gce-events = <53 54>;
> 
> However, client still needs to know the HW-defined value by using
> this solution.
> 
> > 	gce-event-names = "MUTEX0_EOF","MUTEX1_EOF";
> > }
> > 
> > For cmdq driver, you just need modify interface from
> > 
> > int cmdq_rec_wfe(struct cmdq_rec *rec, enum cmdq_event event)
> > int cmdq_rec_clear_event(struct cmdq_rec *rec, enum cmdq_event event)
> > 
> > to
> > 
> > int cmdq_rec_wfe(struct cmdq_rec *rec, u32 event)
> > int cmdq_rec_clear_event(struct cmdq_rec *rec, u32 event)
> 
> I think an easy way for this issue is just removing HW-defined values
> from include/soc/mediatek/cmdq.h (but keeping enum), and then mapping
> abstract values into real values in driver.
> The benefit of this solution is that we can keep interface and leave SoC
> specific code into driver.
> What do you think?

Hi, HS:

OK, that's fine.

Regards,
CK

> 
> > Regards,
> > CK
> 
> Thanks,
> HS
> 
> 


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WARNING: multiple messages have this Message-ID (diff)
From: ck.hu@mediatek.com (CK Hu)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v8 2/3] CMDQ: Mediatek CMDQ driver
Date: Thu, 23 Jun 2016 19:44:11 +0800	[thread overview]
Message-ID: <1466682251.12354.0.camel@mtksdaap41> (raw)
In-Reply-To: <1466668480.12124.15.camel@mtksdaap41>

On Thu, 2016-06-23 at 15:54 +0800, Horng-Shyang Liao wrote:
> Hi CK,
> 
> On Thu, 2016-06-23 at 14:03 +0800, CK Hu wrote:
> > Hi, HS:
> > 
> > On Mon, 2016-05-30 at 11:19 +0800, HS Liao wrote:
> > [...]
> > 
> > > +
> > > +/* events for CMDQ and display */
> > > +enum cmdq_event {
> > > +	/* Display start of frame(SOF) events */
> > > +	CMDQ_EVENT_DISP_OVL0_SOF = 11,
> > > +	CMDQ_EVENT_DISP_OVL1_SOF = 12,
> > > +	CMDQ_EVENT_DISP_RDMA0_SOF = 13,
> > > +	CMDQ_EVENT_DISP_RDMA1_SOF = 14,
> > > +	CMDQ_EVENT_DISP_RDMA2_SOF = 15,
> > > +	CMDQ_EVENT_DISP_WDMA0_SOF = 16,
> > > +	CMDQ_EVENT_DISP_WDMA1_SOF = 17,
> > > +	/* Display end of frame(EOF) events */
> > > +	CMDQ_EVENT_DISP_OVL0_EOF = 39,
> > > +	CMDQ_EVENT_DISP_OVL1_EOF = 40,
> > > +	CMDQ_EVENT_DISP_RDMA0_EOF = 41,
> > > +	CMDQ_EVENT_DISP_RDMA1_EOF = 42,
> > > +	CMDQ_EVENT_DISP_RDMA2_EOF = 43,
> > > +	CMDQ_EVENT_DISP_WDMA0_EOF = 44,
> > > +	CMDQ_EVENT_DISP_WDMA1_EOF = 45,
> > > +	/* Mutex end of frame(EOF) events */
> > > +	CMDQ_EVENT_MUTEX0_STREAM_EOF = 53,
> > > +	CMDQ_EVENT_MUTEX1_STREAM_EOF = 54,
> > > +	CMDQ_EVENT_MUTEX2_STREAM_EOF = 55,
> > > +	CMDQ_EVENT_MUTEX3_STREAM_EOF = 56,
> > > +	CMDQ_EVENT_MUTEX4_STREAM_EOF = 57,
> > > +	/* Display underrun events */
> > > +	CMDQ_EVENT_DISP_RDMA0_UNDERRUN = 63,
> > > +	CMDQ_EVENT_DISP_RDMA1_UNDERRUN = 64,
> > > +	CMDQ_EVENT_DISP_RDMA2_UNDERRUN = 65,
> > > +	/* Keep this at the end of HW events */
> > > +	CMDQ_MAX_HW_EVENT_COUNT = 260,
> > > +};
> > 
> > The value of these symbol is just the GCE-HW-defined value. I think it's
> > not appropriate to expose HW-defined value to client. For another SoC
> > GCE HW, these definition may change.
> 
> Agree.
> 
> > One way to solve this problem is to translate symbol to value
> > internally. But these events looks like interrupt and the value may vary
> > by each SoC, to prevent driver modified frequently, it's better to place
> > the value definition in device tree. It may looks like:
> > 
> > mmsys: clock-controller at 14000000 {
> > 	compatible = "mediatek,mt8173-mmsys";
> > 	mediatek,gce = <&gce>;
> > 	gce-events = <53 54>;
> 
> However, client still needs to know the HW-defined value by using
> this solution.
> 
> > 	gce-event-names = "MUTEX0_EOF","MUTEX1_EOF";
> > }
> > 
> > For cmdq driver, you just need modify interface from
> > 
> > int cmdq_rec_wfe(struct cmdq_rec *rec, enum cmdq_event event)
> > int cmdq_rec_clear_event(struct cmdq_rec *rec, enum cmdq_event event)
> > 
> > to
> > 
> > int cmdq_rec_wfe(struct cmdq_rec *rec, u32 event)
> > int cmdq_rec_clear_event(struct cmdq_rec *rec, u32 event)
> 
> I think an easy way for this issue is just removing HW-defined values
> from include/soc/mediatek/cmdq.h (but keeping enum), and then mapping
> abstract values into real values in driver.
> The benefit of this solution is that we can keep interface and leave SoC
> specific code into driver.
> What do you think?

Hi, HS:

OK, that's fine.

Regards,
CK

> 
> > Regards,
> > CK
> 
> Thanks,
> HS
> 
> 

  reply	other threads:[~2016-06-23 11:44 UTC|newest]

Thread overview: 125+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-30  3:19 [PATCH v8 0/3] Mediatek MT8173 CMDQ support HS Liao
2016-05-30  3:19 ` HS Liao
2016-05-30  3:19 ` HS Liao
2016-05-30  3:19 ` [PATCH v8 1/3] dt-bindings: soc: Add documentation for the MediaTek GCE unit HS Liao
2016-05-30  3:19   ` HS Liao
2016-05-30  3:19   ` HS Liao
2016-05-30  3:19 ` [PATCH v8 2/3] CMDQ: Mediatek CMDQ driver HS Liao
2016-05-30  3:19   ` HS Liao
2016-05-30  3:19   ` HS Liao
2016-05-30  6:49   ` CK Hu
2016-05-30  6:49     ` CK Hu
2016-05-30  6:49     ` CK Hu
2016-05-30  9:38     ` Horng-Shyang Liao
2016-05-30  9:38       ` Horng-Shyang Liao
2016-05-30  9:38       ` Horng-Shyang Liao
2016-05-30 15:31   ` Matthias Brugger
2016-05-30 15:31     ` Matthias Brugger
2016-05-31  8:36     ` Horng-Shyang Liao
2016-05-31  8:36       ` Horng-Shyang Liao
2016-05-31  8:36       ` Horng-Shyang Liao
2016-05-31 20:04       ` Matthias Brugger
2016-05-31 20:04         ` Matthias Brugger
2016-06-01  9:57         ` Horng-Shyang Liao
2016-06-01  9:57           ` Horng-Shyang Liao
2016-06-01  9:57           ` Horng-Shyang Liao
2016-06-02  8:46           ` Matthias Brugger
2016-06-02  8:46             ` Matthias Brugger
2016-06-02  8:46             ` Matthias Brugger
2016-06-03  6:12             ` Horng-Shyang Liao
2016-06-03  6:12               ` Horng-Shyang Liao
2016-06-03  6:12               ` Horng-Shyang Liao
2016-06-03 11:18               ` Matthias Brugger
2016-06-03 11:18                 ` Matthias Brugger
2016-06-03 12:13                 ` Horng-Shyang Liao
2016-06-03 12:13                   ` Horng-Shyang Liao
2016-06-03 12:13                   ` Horng-Shyang Liao
2016-06-03 13:11                   ` Matthias Brugger
2016-06-03 13:11                     ` Matthias Brugger
2016-06-03 13:11                     ` Matthias Brugger
2016-06-07 16:59                     ` Matthias Brugger
2016-06-07 16:59                       ` Matthias Brugger
2016-06-08  5:40                       ` Horng-Shyang Liao
2016-06-08  5:40                         ` Horng-Shyang Liao
2016-06-08  5:40                         ` Horng-Shyang Liao
2016-06-08 10:45                         ` Matthias Brugger
2016-06-08 10:45                           ` Matthias Brugger
2016-06-08 10:45                           ` Matthias Brugger
2016-06-08 12:25                           ` Horng-Shyang Liao
2016-06-08 12:25                             ` Horng-Shyang Liao
2016-06-08 12:25                             ` Horng-Shyang Liao
2016-06-08 15:35                             ` Matthias Brugger
2016-06-08 15:35                               ` Matthias Brugger
2016-06-14  7:44                               ` Horng-Shyang Liao
2016-06-14  7:44                                 ` Horng-Shyang Liao
2016-06-14  7:44                                 ` Horng-Shyang Liao
2016-06-14 10:17                                 ` Matthias Brugger
2016-06-14 10:17                                   ` Matthias Brugger
2016-06-14 12:07                                   ` Horng-Shyang Liao
2016-06-14 12:07                                     ` Horng-Shyang Liao
2016-06-14 12:07                                     ` Horng-Shyang Liao
2016-06-17  8:28                                     ` Horng-Shyang Liao
2016-06-17  8:28                                       ` Horng-Shyang Liao
2016-06-17  8:28                                       ` Horng-Shyang Liao
2016-06-17 15:57                                       ` Matthias Brugger
2016-06-17 15:57                                         ` Matthias Brugger
2016-06-17 15:57                                         ` Matthias Brugger
2016-06-21  5:52                                         ` Horng-Shyang Liao
2016-06-21  5:52                                           ` Horng-Shyang Liao
2016-06-21  5:52                                           ` Horng-Shyang Liao
2016-06-21 13:41                                           ` Matthias Brugger
2016-06-21 13:41                                             ` Matthias Brugger
2016-06-21 13:41                                             ` Matthias Brugger
2016-06-22  5:43                                             ` Horng-Shyang Liao
2016-06-22  5:43                                               ` Horng-Shyang Liao
2016-06-22  5:43                                               ` Horng-Shyang Liao
2016-06-22  9:58                                               ` Matthias Brugger
2016-06-22  9:58                                                 ` Matthias Brugger
2016-06-22  9:58                                                 ` Matthias Brugger
2016-06-17 16:14                                     ` Matthias Brugger
2016-06-17 16:14                                       ` Matthias Brugger
2016-06-03 13:11                 ` Jassi Brar
2016-06-03 13:11                   ` Jassi Brar
2016-06-03 13:11                   ` Jassi Brar
2016-06-06  9:33                   ` Horng-Shyang Liao
2016-06-06  9:33                     ` Horng-Shyang Liao
2016-06-06  9:33                     ` Horng-Shyang Liao
2016-06-06 13:17                     ` Jassi Brar
2016-06-07  2:45                   ` Horng-Shyang Liao
2016-06-07  2:45                     ` Horng-Shyang Liao
2016-06-07  2:45                     ` Horng-Shyang Liao
2016-06-07 17:04   ` Matthias Brugger
2016-06-07 17:04     ` Matthias Brugger
2016-06-08  5:09     ` Horng-Shyang Liao
2016-06-08  5:09       ` Horng-Shyang Liao
2016-06-08  5:09       ` Horng-Shyang Liao
2016-06-20 10:41   ` CK Hu
2016-06-20 10:41     ` CK Hu
2016-06-20 10:41     ` CK Hu
2016-06-20 11:22     ` Horng-Shyang Liao
2016-06-20 11:22       ` Horng-Shyang Liao
2016-06-20 11:22       ` Horng-Shyang Liao
2016-06-21  2:03       ` CK Hu
2016-06-21  2:03         ` CK Hu
2016-06-21  2:03         ` CK Hu
2016-06-21  7:46         ` Horng-Shyang Liao
2016-06-21  7:46           ` Horng-Shyang Liao
2016-06-21  7:46           ` Horng-Shyang Liao
2016-06-24 11:39           ` Horng-Shyang Liao
2016-06-24 11:39             ` Horng-Shyang Liao
2016-06-24 11:39             ` Horng-Shyang Liao
2016-06-27  2:00             ` CK Hu
2016-06-27  2:00               ` CK Hu
2016-06-27  2:00               ` CK Hu
2016-06-23  6:03   ` CK Hu
2016-06-23  6:03     ` CK Hu
2016-06-23  6:03     ` CK Hu
2016-06-23  7:54     ` Horng-Shyang Liao
2016-06-23  7:54       ` Horng-Shyang Liao
2016-06-23  7:54       ` Horng-Shyang Liao
2016-06-23 11:44       ` CK Hu [this message]
2016-06-23 11:44         ` CK Hu
2016-06-23 11:44         ` CK Hu
2016-05-30  3:19 ` [PATCH v8 3/3] arm64: dts: mt8173: Add GCE node HS Liao
2016-05-30  3:19   ` HS Liao
2016-05-30  3:19   ` HS Liao

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