From: Dinh Nguyen <dinguyen-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> To: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Cc: dinguyen-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Dinh Nguyen <dinguyen-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>, Dalon Westergreen <dwesterg-EIB2kfCEclfQT0dZR+AlfA@public.gmane.org>, Alan Tull <atull-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org> Subject: [PATCH 09/12] ARM: dts: socfpga: fpga manager data is 32 bits Date: Wed, 4 Jan 2017 18:21:31 -0600 [thread overview] Message-ID: <1483575694-29599-10-git-send-email-dinguyen@kernel.org> (raw) In-Reply-To: <1483575694-29599-1-git-send-email-dinguyen-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> Adjust regs property for the FPGA manager data register to properly reflect that it is a single 32 bit register. Signed-off-by: Dalon Westergreen <dwesterg-EIB2kfCEclfQT0dZR+AlfA@public.gmane.org> Signed-off-by: Alan Tull <atull-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org> Signed-off-by: Dinh Nguyen <dinguyen-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> --- arch/arm/boot/dts/socfpga.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index da68965..de29172 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -516,7 +516,7 @@ fpgamgr0: fpgamgr@ff706000 { compatible = "altr,socfpga-fpga-mgr"; reg = <0xff706000 0x1000 - 0xffb90000 0x1000>; + 0xffb90000 0x4>; interrupts = <0 175 4>; }; -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html
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From: dinguyen@kernel.org (Dinh Nguyen) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 09/12] ARM: dts: socfpga: fpga manager data is 32 bits Date: Wed, 4 Jan 2017 18:21:31 -0600 [thread overview] Message-ID: <1483575694-29599-10-git-send-email-dinguyen@kernel.org> (raw) In-Reply-To: <1483575694-29599-1-git-send-email-dinguyen@kernel.org> Adjust regs property for the FPGA manager data register to properly reflect that it is a single 32 bit register. Signed-off-by: Dalon Westergreen <dwesterg@altera.com> Signed-off-by: Alan Tull <atull@opensource.altera.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> --- arch/arm/boot/dts/socfpga.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index da68965..de29172 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -516,7 +516,7 @@ fpgamgr0: fpgamgr at ff706000 { compatible = "altr,socfpga-fpga-mgr"; reg = <0xff706000 0x1000 - 0xffb90000 0x1000>; + 0xffb90000 0x4>; interrupts = <0 175 4>; }; -- 2.7.4
next prev parent reply other threads:[~2017-01-05 0:21 UTC|newest] Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-01-05 0:21 [PATCH 00/12] ARM: dts: socfpga: enable a few hardware bits Dinh Nguyen 2017-01-05 0:21 ` Dinh Nguyen [not found] ` <1483575694-29599-1-git-send-email-dinguyen-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> 2017-01-05 0:21 ` [PATCH 01/12] ARM: dts: socfpga: enable GPIO and LEDs for Cyclone5 and Arria5 devkits Dinh Nguyen 2017-01-05 0:21 ` Dinh Nguyen 2017-01-05 0:21 ` [PATCH 02/12] ARM: dts: socfpga: set desired i2c clock on " Dinh Nguyen 2017-01-05 0:21 ` Dinh Nguyen 2017-01-05 0:21 ` [PATCH 03/12] ARM: dts: socfpga: Add Rohm DH2228FV DAC Dinh Nguyen 2017-01-05 0:21 ` Dinh Nguyen 2017-01-05 0:21 ` [PATCH 04/12] ARM: dts: socfpga: enable CAN on Cyclone5 devkit Dinh Nguyen 2017-01-05 0:21 ` Dinh Nguyen 2017-01-05 0:21 ` [PATCH 05/12] ARM: dts: socfpga: enable watchdog timer on Arria5 and Arria10 Dinh Nguyen 2017-01-05 0:21 ` Dinh Nguyen 2017-01-05 0:21 ` [PATCH 06/12] ARM: dts: socfpga: add the LTC2977 power monitor on Arria10 devkit Dinh Nguyen 2017-01-05 0:21 ` Dinh Nguyen 2017-01-05 0:21 ` [PATCH 07/12] ARM: dts: socfpga: add fpga-manager node for Arria10 Dinh Nguyen 2017-01-05 0:21 ` Dinh Nguyen 2017-01-05 0:21 ` [PATCH 08/12] ARM: dts: socfpga: Add NAND device tree " Dinh Nguyen 2017-01-05 0:21 ` Dinh Nguyen 2017-01-05 8:55 ` Steffen Trumtrar 2017-01-05 8:55 ` Steffen Trumtrar 2017-01-05 11:42 ` Dinh Nguyen 2017-01-05 11:42 ` Dinh Nguyen 2017-01-05 0:21 ` Dinh Nguyen [this message] 2017-01-05 0:21 ` [PATCH 09/12] ARM: dts: socfpga: fpga manager data is 32 bits Dinh Nguyen 2017-01-05 0:21 ` [PATCH 10/12] ARM: dts: socfpga: add base fpga region and fpga bridges Dinh Nguyen 2017-01-05 0:21 ` Dinh Nguyen 2017-01-05 16:28 ` Alan Tull 2017-01-05 16:28 ` Alan Tull [not found] ` <CANk1AXSbqohp73xHpp7e9-37d61ZB-dRAPAFc2eQGRYUnvB+0w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org> 2017-01-05 16:34 ` Alan Tull 2017-01-05 16:34 ` Alan Tull 2017-01-06 7:39 ` Dinh Nguyen 2017-01-06 7:39 ` Dinh Nguyen 2017-01-05 0:21 ` [PATCH 11/12] ARM: dts: socfpga: add fpga region support on Arria10 Dinh Nguyen 2017-01-05 0:21 ` Dinh Nguyen 2017-01-05 0:21 ` [PATCH 12/12] ARM: dts: socfpga: add missing compatible string for SDRAM controller Dinh Nguyen 2017-01-05 0:21 ` Dinh Nguyen
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