All of lore.kernel.org
 help / color / mirror / Atom feed
From: Jordan Crouse <jcrouse@codeaurora.org>
To: freedreno@lists.freedesktop.org
Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org
Subject: [PATCH 04/11] drm/msm: Remove idle function hook
Date: Mon,  6 Feb 2017 10:39:32 -0700	[thread overview]
Message-ID: <1486402779-9024-5-git-send-email-jcrouse@codeaurora.org> (raw)
In-Reply-To: <1486402779-9024-1-git-send-email-jcrouse@codeaurora.org>

There isn't any generic code that uses ->idle so remove it.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
---
 drivers/gpu/drm/msm/adreno/a3xx_gpu.c   | 4 ++--
 drivers/gpu/drm/msm/adreno/a4xx_gpu.c   | 4 ++--
 drivers/gpu/drm/msm/adreno/a5xx_gpu.c   | 9 ++++-----
 drivers/gpu/drm/msm/adreno/a5xx_gpu.h   | 1 +
 drivers/gpu/drm/msm/adreno/a5xx_power.c | 2 +-
 drivers/gpu/drm/msm/msm_gpu.h           | 1 -
 6 files changed, 10 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
index b999349..fc4fd2d 100644
--- a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
@@ -40,6 +40,7 @@
 extern bool hang_debug;
 
 static void a3xx_dump(struct msm_gpu *gpu);
+static bool a3xx_idle(struct msm_gpu *gpu);
 
 static bool a3xx_me_init(struct msm_gpu *gpu)
 {
@@ -65,7 +66,7 @@ static bool a3xx_me_init(struct msm_gpu *gpu)
 	OUT_RING(ring, 0x00000000);
 
 	gpu->funcs->flush(gpu);
-	return gpu->funcs->idle(gpu);
+	return a3xx_idle(gpu);
 }
 
 static int a3xx_hw_init(struct msm_gpu *gpu)
@@ -448,7 +449,6 @@ static void a3xx_dump(struct msm_gpu *gpu)
 		.last_fence = adreno_last_fence,
 		.submit = adreno_submit,
 		.flush = adreno_flush,
-		.idle = a3xx_idle,
 		.irq = a3xx_irq,
 		.destroy = a3xx_destroy,
 #ifdef CONFIG_DEBUG_FS
diff --git a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
index 511bc85..6bc948b 100644
--- a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
@@ -31,6 +31,7 @@
 
 extern bool hang_debug;
 static void a4xx_dump(struct msm_gpu *gpu);
+static bool a4xx_idle(struct msm_gpu *gpu);
 
 /*
  * a4xx_enable_hwcg() - Program the clock control registers
@@ -137,7 +138,7 @@ static bool a4xx_me_init(struct msm_gpu *gpu)
 	OUT_RING(ring, 0x00000000);
 
 	gpu->funcs->flush(gpu);
-	return gpu->funcs->idle(gpu);
+	return a4xx_idle(gpu);
 }
 
 static int a4xx_hw_init(struct msm_gpu *gpu)
@@ -538,7 +539,6 @@ static int a4xx_get_timestamp(struct msm_gpu *gpu, uint64_t *value)
 		.last_fence = adreno_last_fence,
 		.submit = adreno_submit,
 		.flush = adreno_flush,
-		.idle = a4xx_idle,
 		.irq = a4xx_irq,
 		.destroy = a4xx_destroy,
 #ifdef CONFIG_DEBUG_FS
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index 23eeed2..2074f64 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@ -391,7 +391,7 @@ static int a5xx_me_init(struct msm_gpu *gpu)
 
 	gpu->funcs->flush(gpu);
 
-	return gpu->funcs->idle(gpu) ? 0 : -EINVAL;
+	return a5xx_idle(gpu) ? 0 : -EINVAL;
 }
 
 static struct drm_gem_object *a5xx_ucode_load_bo(struct msm_gpu *gpu,
@@ -699,7 +699,7 @@ static int a5xx_hw_init(struct msm_gpu *gpu)
 		OUT_RING(gpu->rb, 0x0F);
 
 		gpu->funcs->flush(gpu);
-		if (!gpu->funcs->idle(gpu))
+		if (!a5xx_idle(gpu))
 			return -EINVAL;
 	}
 
@@ -716,7 +716,7 @@ static int a5xx_hw_init(struct msm_gpu *gpu)
 		OUT_RING(gpu->rb, 0x00000000);
 
 		gpu->funcs->flush(gpu);
-		if (!gpu->funcs->idle(gpu))
+		if (!a5xx_idle(gpu))
 			return -EINVAL;
 	} else {
 		/* Print a warning so if we die, we know why */
@@ -790,7 +790,7 @@ static inline bool _a5xx_check_idle(struct msm_gpu *gpu)
 		A5XX_RBBM_INT_0_MASK_MISC_HANG_DETECT);
 }
 
-static bool a5xx_idle(struct msm_gpu *gpu)
+bool a5xx_idle(struct msm_gpu *gpu)
 {
 	/* wait for CP to drain ringbuffer: */
 	if (!adreno_idle(gpu))
@@ -1091,7 +1091,6 @@ static void a5xx_show(struct msm_gpu *gpu, struct seq_file *m)
 		.last_fence = adreno_last_fence,
 		.submit = a5xx_submit,
 		.flush = adreno_flush,
-		.idle = a5xx_idle,
 		.irq = a5xx_irq,
 		.destroy = a5xx_destroy,
 		.show = a5xx_show,
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.h b/drivers/gpu/drm/msm/adreno/a5xx_gpu.h
index 1590f84..6b20f28 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.h
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.h
@@ -56,5 +56,6 @@ static inline int spin_usecs(struct msm_gpu *gpu, uint32_t usecs,
 	return -ETIMEDOUT;
 }
 
+bool a5xx_idle(struct msm_gpu *gpu);
 
 #endif /* __A5XX_GPU_H__ */
diff --git a/drivers/gpu/drm/msm/adreno/a5xx_power.c b/drivers/gpu/drm/msm/adreno/a5xx_power.c
index 72d52c7..ed0802e 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_power.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_power.c
@@ -194,7 +194,7 @@ static int a5xx_gpmu_init(struct msm_gpu *gpu)
 
 	gpu->funcs->flush(gpu);
 
-	if (!gpu->funcs->idle(gpu)) {
+	if (!a5xx_idle(gpu)) {
 		DRM_ERROR("%s: Unable to load GPMU firmware. GPMU will not be active\n",
 			gpu->name);
 		return -EINVAL;
diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h
index c4c39d3..267723f 100644
--- a/drivers/gpu/drm/msm/msm_gpu.h
+++ b/drivers/gpu/drm/msm/msm_gpu.h
@@ -50,7 +50,6 @@ struct msm_gpu_funcs {
 	void (*submit)(struct msm_gpu *gpu, struct msm_gem_submit *submit,
 			struct msm_file_private *ctx);
 	void (*flush)(struct msm_gpu *gpu);
-	bool (*idle)(struct msm_gpu *gpu);
 	irqreturn_t (*irq)(struct msm_gpu *irq);
 	uint32_t (*last_fence)(struct msm_gpu *gpu);
 	void (*recover)(struct msm_gpu *gpu);
-- 
1.9.1

  parent reply	other threads:[~2017-02-06 17:39 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-06 17:39 [PATCH 00/11] drm/msm: A5XX preemption Jordan Crouse
2017-02-06 17:39 ` [PATCH 03/11] drm/msm: Add hint to DRM_IOCTL_MSM_GEM_INFO to return an object IOVA Jordan Crouse
2017-02-06 19:20   ` Emil Velikov
     [not found]     ` <CACvgo513+d19O2rzZ8NXEFgojUQkm2XPae-AdOXXReLM_a1euw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-02-06 19:57       ` Rob Clark
     [not found]         ` <CAF6AEGvUoW2695_HjgfGbpbPaSnOB2gfPa=3UMTDGvom+DxcwA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-02-06 20:24           ` Emil Velikov
2017-02-06 21:01             ` Rob Clark
2017-02-06 17:39 ` Jordan Crouse [this message]
2017-02-06 17:39 ` [PATCH 05/11] drm/msm: get an iova from the address space instead of an id Jordan Crouse
2017-02-09  5:01   ` Archit Taneja
2017-02-06 17:39 ` [PATCH 06/11] drm/msm: Add a struct to pass configuration to msm_gpu_init() Jordan Crouse
2017-02-06 17:39 ` [PATCH 07/11] drm/msm: Remove memptrs->wptr Jordan Crouse
2017-02-06 17:39 ` [PATCH 08/11] drm/msm: Support multiple ringbuffers Jordan Crouse
2017-02-06 17:39 ` [PATCH 09/11] drm/msm: Shadow current pointer in the ring until command is complete Jordan Crouse
2017-02-06 17:39 ` [PATCH 10/11] drm/msm: Make the value of RB_CNTL (almost) generic Jordan Crouse
2017-02-06 17:39 ` [PATCH 11/11] drm/msm: Implement preemption for A5XX targets Jordan Crouse
     [not found]   ` <1486402779-9024-12-git-send-email-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-02-08 20:30     ` Stephen Boyd
     [not found]       ` <8696f3b7-1fbd-309a-1d68-b2f8ad89a30c-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-02-08 23:00         ` Jordan Crouse
2017-02-09  0:03           ` Stephen Boyd
2017-02-06 17:59 ` [PATCH 00/11] drm/msm: A5XX preemption Daniel Vetter
2017-02-06 18:23   ` Daniel Stone
2017-02-06 18:29     ` [Intel-gfx] " Rob Clark
2017-02-06 18:29   ` Alex Deucher
     [not found] ` <1486402779-9024-1-git-send-email-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-02-06 17:39   ` [PATCH 01/11] drm/msm: Make sure to detach the MMU during GPU cleanup Jordan Crouse
2017-02-06 17:39   ` [PATCH 02/11] drm/msm: Improve the zap shader Jordan Crouse
2017-03-07 16:58   ` [v2] [PATCH 00/11] drm/msm: A5XX preemption Jordan Crouse
2017-03-07 16:58     ` [PATCH 01/11] drm/msm: Make sure to detach the MMU during GPU cleanup Jordan Crouse
     [not found]     ` <1488905900-6603-1-git-send-email-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-03-07 16:58       ` [PATCH 02/11] drm/msm: Improve the zap shader Jordan Crouse
2017-03-07 16:58       ` [PATCH 03/11] drm/msm: Remove idle function hook Jordan Crouse
2017-03-07 16:58       ` [PATCH 04/11] drm/msm: Add hint to DRM_IOCTL_MSM_GEM_INFO to return an object IOVA Jordan Crouse
2017-03-07 16:58       ` [PATCH 05/11] drm/msm: get an iova from the address space instead of an id Jordan Crouse
2017-03-07 16:58       ` [PATCH 06/11] drm/msm: Add a struct to pass configuration to msm_gpu_init() Jordan Crouse
2017-03-07 16:58       ` [PATCH 07/11] drm/msm: Remove memptrs->wptr Jordan Crouse
2017-03-07 16:58       ` [PATCH 08/11] drm/msm: Support multiple ringbuffers Jordan Crouse
2017-03-07 16:58       ` [PATCH 09/11] drm/msm: Shadow current pointer in the ring until command is complete Jordan Crouse
2017-03-07 16:58       ` [PATCH 10/11] drm/msm: Make the value of RB_CNTL (almost) generic Jordan Crouse
2017-03-07 16:58       ` [PATCH 11/11] drm/msm: Implement preemption for A5XX targets Jordan Crouse

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1486402779-9024-5-git-send-email-jcrouse@codeaurora.org \
    --to=jcrouse@codeaurora.org \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=freedreno@lists.freedesktop.org \
    --cc=linux-arm-msm@vger.kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.