From: Sean Wang <sean.wang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
To: john-Pj+rj9U5foFAfugRpC6u6w@public.gmane.org
Cc: matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
afaerber-l3A5Bk7waGM@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re:[PATCH 01/16] arm: dts: add clock controller device nodes
Date: Wed, 22 Mar 2017 16:04:25 +0800 [thread overview]
Message-ID: <1490169865-12993-1-git-send-email-sean.wang@mediatek.com> (raw)
In-Reply-To: <1485170975-51813-2-git-send-email-john-Pj+rj9U5foFAfugRpC6u6w@public.gmane.org>
From: Sean Wang <sean.wang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
Hi John,
Some nitpicking below.
>Add clock controller nodes for MT7623, including topckgen, infracfg, pericfg and apmixedsys. This patch
>also cleans up two oscillators that provide clocks for MT7623. Switch the uart clocks to the real ones
>while at it.
>
>Signed-off-by: John Crispin <john-Pj+rj9U5foFAfugRpC6u6w@public.gmane.org>
>---
> arch/arm/boot/dts/mt7623.dtsi | 60 ++++++++++++++++++++++++++++++++++-------
> 1 file changed, 51 insertions(+), 9 deletions(-)
>
>diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi index fd2b614..592fc0a
>100644
>--- a/arch/arm/boot/dts/mt7623.dtsi
>+++ b/arch/arm/boot/dts/mt7623.dtsi
>@@ -14,6 +14,8 @@
>
> #include <dt-bindings/interrupt-controller/irq.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
>+#include <dt-bindings/clock/mt2701-clk.h> #include
>+<dt-bindings/reset/mt2701-resets.h>
> #include "skeleton64.dtsi"
>
> / {
>@@ -53,16 +55,18 @@
> #clock-cells = <0>;
> };
>
>- rtc_clk: dummy32k {
>+ rtc32k: oscillator@1 {
> compatible = "fixed-clock";
>- clock-frequency = <32000>;
> #clock-cells = <0>;
>+ clock-frequency = <32000>;
>+ clock-output-names = "rtc32k";
> };
>
>- uart_clk: dummy26m {
>+ clk26m: oscillator@0 {
> compatible = "fixed-clock";
>- clock-frequency = <26000000>;
> #clock-cells = <0>;
>+ clock-frequency = <26000000>;
>+ clock-output-names = "clk26m";
> };
>
> timer {
>@@ -74,6 +78,32 @@
> <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> };
>
>+ topckgen: syscon@10000000 {
>+ compatible = "mediatek,mt7623-topckgen",
>+ "mediatek,mt2701-topckgen",
>+ "syscon";
>+ reg = <0 0x10000000 0 0x1000>;
>+ #clock-cells = <1>;
>+ };
>+
>+ infracfg: syscon@10001000 {
>+ compatible = "mediatek,mt2701-infracfg",
>+ "mediatek,mt7623-infracfg",
the order should be
compatible = "mediatek,mt7623-pericfg",
"mediatek,mt2701-pericfg"
?
>+ "syscon";
>+ reg = <0 0x10001000 0 0x1000>;
>+ #clock-cells = <1>;
>+ #reset-cells = <1>;
>+ };
>+
>+ pericfg: syscon@10003000 {
>+ compatible = "mediatek,mt7623-pericfg",
>+ "mediatek,mt2701-pericfg",
>+ "syscon";
>+ reg = <0 0x10003000 0 0x1000>;
>+ #clock-cells = <1>;
>+ #reset-cells = <1>;
>+ };
>+
> watchdog: watchdog@10007000 {
> compatible = "mediatek,mt7623-wdt",
> "mediatek,mt6589-wdt";
>@@ -85,7 +115,7 @@
> "mediatek,mt6577-timer";
> reg = <0 0x10008000 0 0x80>;
> interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_LOW>;
>- clocks = <&system_clk>, <&rtc_clk>;
>+ clocks = <&system_clk>, <&rtc32k>;
> clock-names = "system-clk", "rtc-clk";
> };
>
>@@ -98,6 +128,14 @@
> reg = <0 0x10200100 0 0x1c>;
> };
>
>+ apmixedsys: syscon@10209000 {
>+ compatible = "mediatek,mt2701-apmixedsys",
>+ "mediatek,mt2701-apmixedsys",
duplicated items which seems wrong to type
>+ "syscon";
>+ reg = <0 0x10209000 0 0x1000>;
>+ #clock-cells = <1>;
>+ };
>+
> gic: interrupt-controller@10211000 {
> compatible = "arm,cortex-a7-gic";
> interrupt-controller;
>@@ -114,7 +152,8 @@
> "mediatek,mt6577-uart";
> reg = <0 0x11002000 0 0x400>;
> interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
>- clocks = <&uart_clk>;
>+ clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;
>+ clock-names = "baud", "bus";
> status = "disabled";
> };
>
>@@ -123,7 +162,8 @@
> "mediatek,mt6577-uart";
> reg = <0 0x11003000 0 0x400>;
> interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
>- clocks = <&uart_clk>;
>+ clocks = <&pericfg CLK_PERI_UART1_SEL>, <&pericfg CLK_PERI_UART1>;
>+ clock-names = "baud", "bus";
> status = "disabled";
> };
>
>@@ -132,7 +172,8 @@
> "mediatek,mt6577-uart";
> reg = <0 0x11004000 0 0x400>;
> interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
>- clocks = <&uart_clk>;
>+ clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
>+ clock-names = "baud", "bus";
> status = "disabled";
> };
>
>@@ -141,7 +182,8 @@
> "mediatek,mt6577-uart";
> reg = <0 0x11005000 0 0x400>;
> interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;
>- clocks = <&uart_clk>;
>+ clocks = <&pericfg CLK_PERI_UART3_SEL>, <&pericfg CLK_PERI_UART3>;
>+ clock-names = "baud", "bus";
> status = "disabled";
> };
>};
--
1.7.10.4
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WARNING: multiple messages have this Message-ID (diff)
From: sean.wang@mediatek.com (Sean Wang)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 01/16] arm: dts: add clock controller device nodes
Date: Wed, 22 Mar 2017 16:04:25 +0800 [thread overview]
Message-ID: <1490169865-12993-1-git-send-email-sean.wang@mediatek.com> (raw)
In-Reply-To: <1485170975-51813-2-git-send-email-john@phrozen.org>
From: Sean Wang <sean.wang@mediatek.com>
Hi John,
Some nitpicking below.
>Add clock controller nodes for MT7623, including topckgen, infracfg, pericfg and apmixedsys. This patch
>also cleans up two oscillators that provide clocks for MT7623. Switch the uart clocks to the real ones
>while at it.
>
>Signed-off-by: John Crispin <john@phrozen.org>
>---
> arch/arm/boot/dts/mt7623.dtsi | 60 ++++++++++++++++++++++++++++++++++-------
> 1 file changed, 51 insertions(+), 9 deletions(-)
>
>diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi index fd2b614..592fc0a
>100644
>--- a/arch/arm/boot/dts/mt7623.dtsi
>+++ b/arch/arm/boot/dts/mt7623.dtsi
>@@ -14,6 +14,8 @@
>
> #include <dt-bindings/interrupt-controller/irq.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
>+#include <dt-bindings/clock/mt2701-clk.h> #include
>+<dt-bindings/reset/mt2701-resets.h>
> #include "skeleton64.dtsi"
>
> / {
>@@ -53,16 +55,18 @@
> #clock-cells = <0>;
> };
>
>- rtc_clk: dummy32k {
>+ rtc32k: oscillator at 1 {
> compatible = "fixed-clock";
>- clock-frequency = <32000>;
> #clock-cells = <0>;
>+ clock-frequency = <32000>;
>+ clock-output-names = "rtc32k";
> };
>
>- uart_clk: dummy26m {
>+ clk26m: oscillator at 0 {
> compatible = "fixed-clock";
>- clock-frequency = <26000000>;
> #clock-cells = <0>;
>+ clock-frequency = <26000000>;
>+ clock-output-names = "clk26m";
> };
>
> timer {
>@@ -74,6 +78,32 @@
> <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
> };
>
>+ topckgen: syscon at 10000000 {
>+ compatible = "mediatek,mt7623-topckgen",
>+ "mediatek,mt2701-topckgen",
>+ "syscon";
>+ reg = <0 0x10000000 0 0x1000>;
>+ #clock-cells = <1>;
>+ };
>+
>+ infracfg: syscon at 10001000 {
>+ compatible = "mediatek,mt2701-infracfg",
>+ "mediatek,mt7623-infracfg",
the order should be
compatible = "mediatek,mt7623-pericfg",
"mediatek,mt2701-pericfg"
?
>+ "syscon";
>+ reg = <0 0x10001000 0 0x1000>;
>+ #clock-cells = <1>;
>+ #reset-cells = <1>;
>+ };
>+
>+ pericfg: syscon at 10003000 {
>+ compatible = "mediatek,mt7623-pericfg",
>+ "mediatek,mt2701-pericfg",
>+ "syscon";
>+ reg = <0 0x10003000 0 0x1000>;
>+ #clock-cells = <1>;
>+ #reset-cells = <1>;
>+ };
>+
> watchdog: watchdog at 10007000 {
> compatible = "mediatek,mt7623-wdt",
> "mediatek,mt6589-wdt";
>@@ -85,7 +115,7 @@
> "mediatek,mt6577-timer";
> reg = <0 0x10008000 0 0x80>;
> interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_LOW>;
>- clocks = <&system_clk>, <&rtc_clk>;
>+ clocks = <&system_clk>, <&rtc32k>;
> clock-names = "system-clk", "rtc-clk";
> };
>
>@@ -98,6 +128,14 @@
> reg = <0 0x10200100 0 0x1c>;
> };
>
>+ apmixedsys: syscon at 10209000 {
>+ compatible = "mediatek,mt2701-apmixedsys",
>+ "mediatek,mt2701-apmixedsys",
duplicated items which seems wrong to type
>+ "syscon";
>+ reg = <0 0x10209000 0 0x1000>;
>+ #clock-cells = <1>;
>+ };
>+
> gic: interrupt-controller at 10211000 {
> compatible = "arm,cortex-a7-gic";
> interrupt-controller;
>@@ -114,7 +152,8 @@
> "mediatek,mt6577-uart";
> reg = <0 0x11002000 0 0x400>;
> interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
>- clocks = <&uart_clk>;
>+ clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;
>+ clock-names = "baud", "bus";
> status = "disabled";
> };
>
>@@ -123,7 +162,8 @@
> "mediatek,mt6577-uart";
> reg = <0 0x11003000 0 0x400>;
> interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
>- clocks = <&uart_clk>;
>+ clocks = <&pericfg CLK_PERI_UART1_SEL>, <&pericfg CLK_PERI_UART1>;
>+ clock-names = "baud", "bus";
> status = "disabled";
> };
>
>@@ -132,7 +172,8 @@
> "mediatek,mt6577-uart";
> reg = <0 0x11004000 0 0x400>;
> interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
>- clocks = <&uart_clk>;
>+ clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
>+ clock-names = "baud", "bus";
> status = "disabled";
> };
>
>@@ -141,7 +182,8 @@
> "mediatek,mt6577-uart";
> reg = <0 0x11005000 0 0x400>;
> interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;
>- clocks = <&uart_clk>;
>+ clocks = <&pericfg CLK_PERI_UART3_SEL>, <&pericfg CLK_PERI_UART3>;
>+ clock-names = "baud", "bus";
> status = "disabled";
> };
>};
--
1.7.10.4
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next prev parent reply other threads:[~2017-03-22 8:04 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-23 11:29 [PATCH 00/16] arm: dts: extend mt7623 support John Crispin
2017-01-23 11:29 ` John Crispin
2017-01-23 11:29 ` [PATCH 11/16] arm: dts: add usb nodes to the mt7623.dtsi file John Crispin
2017-01-23 11:29 ` John Crispin
[not found] ` <1485170975-51813-1-git-send-email-john-Pj+rj9U5foFAfugRpC6u6w@public.gmane.org>
2017-01-23 11:29 ` [PATCH 01/16] arm: dts: add clock controller device nodes John Crispin
2017-01-23 11:29 ` John Crispin
[not found] ` <1485170975-51813-2-git-send-email-john-Pj+rj9U5foFAfugRpC6u6w@public.gmane.org>
2017-03-22 8:04 ` Sean Wang [this message]
2017-03-22 8:04 ` Sean Wang
2017-03-22 8:16 ` Sean Wang
2017-03-22 8:16 ` [PATCH " Sean Wang
2017-01-23 11:29 ` [PATCH 02/16] arm: dts: add subsystem " John Crispin
2017-01-23 11:29 ` John Crispin
2017-01-23 11:29 ` [PATCH 03/16] arm: dts: add power domain controller device node John Crispin
2017-01-23 11:29 ` John Crispin
2017-01-23 11:29 ` [PATCH 04/16] arm: dts: add clock-frequency to the a7 timer node to mt7623.dtsi John Crispin
2017-01-23 11:29 ` John Crispin
2017-01-23 11:29 ` [PATCH 05/16] arm: dts: add pinctrl nodes to the mt7623 dtsi file John Crispin
2017-01-23 11:29 ` John Crispin
2017-01-23 11:29 ` [PATCH 06/16] arm: dts: add pmic " John Crispin
2017-01-23 11:29 ` John Crispin
2017-01-23 11:29 ` [PATCH 07/16] arm: dts: add i2c nodes to the mt7623.dtsi file John Crispin
2017-01-23 11:29 ` John Crispin
2017-01-23 11:29 ` [PATCH 08/16] arm: dts: add spi " John Crispin
2017-01-23 11:29 ` John Crispin
[not found] ` <1485170975-51813-9-git-send-email-john-Pj+rj9U5foFAfugRpC6u6w@public.gmane.org>
2017-01-24 22:39 ` Matthias Brugger
2017-01-24 22:39 ` Matthias Brugger
[not found] ` <69d73342-d710-5f6d-567b-8e75a84fdb18-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-01-25 5:38 ` John Crispin
2017-01-25 5:38 ` John Crispin
2017-01-23 11:29 ` [PATCH 09/16] arm: dts: add nand " John Crispin
2017-01-23 11:29 ` John Crispin
2017-01-23 11:29 ` [PATCH 10/16] arm: dts: add mmc " John Crispin
2017-01-23 11:29 ` John Crispin
2017-01-23 11:29 ` [PATCH 12/16] arm: dts: add mt7623-mt6323.dtsi file John Crispin
2017-01-23 11:29 ` John Crispin
2017-01-23 11:29 ` [PATCH 13/16] arm: dts: rename mt7623-evb.dts to arch/arm/boot/dts/mt7623n-rfb.dtsi John Crispin
2017-01-23 11:29 ` John Crispin
2017-01-27 20:13 ` Rob Herring
2017-01-27 20:13 ` Rob Herring
2017-01-23 11:29 ` [PATCH 14/16] arm: dts: cleanup the mt7623n rfb uart nodes John Crispin
2017-01-23 11:29 ` John Crispin
2017-01-23 11:29 ` [PATCH 15/16] arm: dts: enable the usb device on the mt7623n rfb John Crispin
2017-01-23 11:29 ` John Crispin
2017-01-23 11:29 ` [PATCH 16/16] arm: dts: enable the nand device on the mt7623n nand rfb John Crispin
2017-01-23 11:29 ` John Crispin
2017-01-23 11:32 ` [PATCH 00/16] arm: dts: extend mt7623 support John Crispin
2017-01-23 11:32 ` John Crispin
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