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From: Hal Feng <hal.feng@linux.starfivetech.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: Rob Herring <robh@kernel.org>,
	linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
	linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Emil Renner Berthing <kernel@esmil.dk>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1 12/30] dt-bindings: reset: Add starfive,jh7110-reset bindings
Date: Wed, 12 Oct 2022 22:53:15 +0800	[thread overview]
Message-ID: <14D22B831DDCFAED+14879d26-5d3a-3487-07ef-3b64e775e43f@linux.starfivetech.com> (raw)
In-Reply-To: <9f04267d-2592-b303-9b79-9cef672c970a@linaro.org>

On Wed, 12 Oct 2022 09:33:42 -0400, Krzysztof Kozlowski wrote:
> On 12/10/2022 09:16, Hal Feng wrote:
>>>>>> +properties:
>>>>>> +  compatible:
>>>>>> +    enum:
>>>>>> +      - starfive,jh7110-reset
>>>>>
>>>>> 'reg' needed? Is this a sub-block of something else?
>>>>
>>>> Yes, the reset node is a child node of the syscon node, see patch 27 for detail.
>>>> You might not see the complete patches at that time due to technical issue of
>>>> our smtp email server. Again, I feel so sorry about that.
>>>>
>>>> 	syscrg: syscrg@13020000 {
>>>> 		compatible = "syscon", "simple-mfd";
>>>> 		reg = <0x0 0x13020000 0x0 0x10000>;
>>>>
>>>> 		syscrg_clk: clock-controller@13020000 {
>>>> 			compatible = "starfive,jh7110-clkgen-sys";
>>>> 			clocks = <&osc>, <&gmac1_rmii_refin>,
>>>> 				 <&gmac1_rgmii_rxin>,
>>>> 				 <&i2stx_bclk_ext>, <&i2stx_lrck_ext>,
>>>> 				 <&i2srx_bclk_ext>, <&i2srx_lrck_ext>,
>>>> 				 <&tdm_ext>, <&mclk_ext>;
>>>> 			clock-names = "osc", "gmac1_rmii_refin",
>>>> 				"gmac1_rgmii_rxin",
>>>> 				"i2stx_bclk_ext", "i2stx_lrck_ext",
>>>> 				"i2srx_bclk_ext", "i2srx_lrck_ext",
>>>> 				"tdm_ext", "mclk_ext";
>>>> 			#clock-cells = <1>;
>>>> 		};
>>>>
>>>> 		syscrg_rst: reset-controller@13020000 {
>>>> 			compatible = "starfive,jh7110-reset";
>>>> 			#reset-cells = <1>;
>>>
>>> So the answer to the "reg needed?" is what? You have unit address but no
>>> reg, so this is not correct.
>> 
>> Not needed in the reset-controller node, but needed in its parent node. 
> 
> We do not talk about parent node. Rob's question was in this bindings.
> Is this document a binding for the parent node or for this node?

This node. So not needed.

> 
>> I am sorry
>> for missing description to point it out in the bindings. I will rewrite all bindings
>> for the next version. Unit address here should be deleted.
>> 
>>>
>>>> 			starfive,assert-offset = <0x2F8>;
>>>> 			starfive,status-offset= <0x308>;
>>>> 			starfive,nr-resets = <JH7110_SYSRST_END>;
>>>> 		};
>>>> 	};
>>>>
>>>> In this case, we get the memory mapped space through the parent node with syscon
>>>> APIs. You can see patch 13 for detail.
>>>>
>>>> static int reset_starfive_register(struct platform_device *pdev, const u32 *asserted)
>>>> {
>>>
>>>
>>> (...)
>>>
>>>>
>>>>>
>>>>>> +
>>>>>> +  "#reset-cells":
>>>>>> +    const: 1
>>>>>> +
>>>>>> +  starfive,assert-offset:
>>>>>> +    description: Offset of the first ASSERT register
>>>>>> +    $ref: /schemas/types.yaml#/definitions/uint32
>>>>>> +
>>>>>> +  starfive,status-offset:
>>>>>> +    description: Offset of the first STATUS register
>>>>>> +    $ref: /schemas/types.yaml#/definitions/uint32
>>>>>
>>>>> These can't be implied from the compatible string?
>> 
>> Definitely can. We do this is for simplifying the reset driver.
> 
> The role of the bindings is not to simplify some specific driver in some
> specific OS...
> 
>> Otherwise, we may need to define more compatibles because there
>> are multiple reset blocks in JH7110. Another case can be found at
>> https://elixir.bootlin.com/linux/latest/source/Documentation/devicetree/bindings/reset/altr,rst-mgr.yaml
> 
> And why is this a problem? You have different hardware, so should have
> different compatibles. Otherwise we would have a compatible
> "all,everything" and use it in all possible devices.

Okay, I get it. Thanks a lot.

Best regards,
Hal

WARNING: multiple messages have this Message-ID (diff)
From: Hal Feng <hal.feng@linux.starfivetech.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: Rob Herring <robh@kernel.org>,
	linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
	linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Emil Renner Berthing <kernel@esmil.dk>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1 12/30] dt-bindings: reset: Add starfive,jh7110-reset bindings
Date: Wed, 12 Oct 2022 22:53:15 +0800	[thread overview]
Message-ID: <14D22B831DDCFAED+14879d26-5d3a-3487-07ef-3b64e775e43f@linux.starfivetech.com> (raw)
In-Reply-To: <9f04267d-2592-b303-9b79-9cef672c970a@linaro.org>

On Wed, 12 Oct 2022 09:33:42 -0400, Krzysztof Kozlowski wrote:
> On 12/10/2022 09:16, Hal Feng wrote:
>>>>>> +properties:
>>>>>> +  compatible:
>>>>>> +    enum:
>>>>>> +      - starfive,jh7110-reset
>>>>>
>>>>> 'reg' needed? Is this a sub-block of something else?
>>>>
>>>> Yes, the reset node is a child node of the syscon node, see patch 27 for detail.
>>>> You might not see the complete patches at that time due to technical issue of
>>>> our smtp email server. Again, I feel so sorry about that.
>>>>
>>>> 	syscrg: syscrg@13020000 {
>>>> 		compatible = "syscon", "simple-mfd";
>>>> 		reg = <0x0 0x13020000 0x0 0x10000>;
>>>>
>>>> 		syscrg_clk: clock-controller@13020000 {
>>>> 			compatible = "starfive,jh7110-clkgen-sys";
>>>> 			clocks = <&osc>, <&gmac1_rmii_refin>,
>>>> 				 <&gmac1_rgmii_rxin>,
>>>> 				 <&i2stx_bclk_ext>, <&i2stx_lrck_ext>,
>>>> 				 <&i2srx_bclk_ext>, <&i2srx_lrck_ext>,
>>>> 				 <&tdm_ext>, <&mclk_ext>;
>>>> 			clock-names = "osc", "gmac1_rmii_refin",
>>>> 				"gmac1_rgmii_rxin",
>>>> 				"i2stx_bclk_ext", "i2stx_lrck_ext",
>>>> 				"i2srx_bclk_ext", "i2srx_lrck_ext",
>>>> 				"tdm_ext", "mclk_ext";
>>>> 			#clock-cells = <1>;
>>>> 		};
>>>>
>>>> 		syscrg_rst: reset-controller@13020000 {
>>>> 			compatible = "starfive,jh7110-reset";
>>>> 			#reset-cells = <1>;
>>>
>>> So the answer to the "reg needed?" is what? You have unit address but no
>>> reg, so this is not correct.
>> 
>> Not needed in the reset-controller node, but needed in its parent node. 
> 
> We do not talk about parent node. Rob's question was in this bindings.
> Is this document a binding for the parent node or for this node?

This node. So not needed.

> 
>> I am sorry
>> for missing description to point it out in the bindings. I will rewrite all bindings
>> for the next version. Unit address here should be deleted.
>> 
>>>
>>>> 			starfive,assert-offset = <0x2F8>;
>>>> 			starfive,status-offset= <0x308>;
>>>> 			starfive,nr-resets = <JH7110_SYSRST_END>;
>>>> 		};
>>>> 	};
>>>>
>>>> In this case, we get the memory mapped space through the parent node with syscon
>>>> APIs. You can see patch 13 for detail.
>>>>
>>>> static int reset_starfive_register(struct platform_device *pdev, const u32 *asserted)
>>>> {
>>>
>>>
>>> (...)
>>>
>>>>
>>>>>
>>>>>> +
>>>>>> +  "#reset-cells":
>>>>>> +    const: 1
>>>>>> +
>>>>>> +  starfive,assert-offset:
>>>>>> +    description: Offset of the first ASSERT register
>>>>>> +    $ref: /schemas/types.yaml#/definitions/uint32
>>>>>> +
>>>>>> +  starfive,status-offset:
>>>>>> +    description: Offset of the first STATUS register
>>>>>> +    $ref: /schemas/types.yaml#/definitions/uint32
>>>>>
>>>>> These can't be implied from the compatible string?
>> 
>> Definitely can. We do this is for simplifying the reset driver.
> 
> The role of the bindings is not to simplify some specific driver in some
> specific OS...
> 
>> Otherwise, we may need to define more compatibles because there
>> are multiple reset blocks in JH7110. Another case can be found at
>> https://elixir.bootlin.com/linux/latest/source/Documentation/devicetree/bindings/reset/altr,rst-mgr.yaml
> 
> And why is this a problem? You have different hardware, so should have
> different compatibles. Otherwise we would have a compatible
> "all,everything" and use it in all possible devices.

Okay, I get it. Thanks a lot.

Best regards,
Hal

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  parent reply	other threads:[~2022-10-12 14:53 UTC|newest]

Thread overview: 210+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-29 14:31 [PATCH v1 00/30] Basic StarFive JH7110 RISC-V SoC support Hal Feng
2022-09-29 14:31 ` Hal Feng
2022-09-29 14:31 ` [PATCH v1 01/30] dt-bindings: riscv: Add StarFive JH7110 bindings Hal Feng
2022-09-29 14:31   ` Hal Feng
2022-09-29 14:34   ` Krzysztof Kozlowski
2022-09-29 14:34     ` Krzysztof Kozlowski
2022-10-08  3:44     ` Hal Feng
2022-10-08  3:44       ` Hal Feng
2022-09-29 14:31 ` [PATCH v1 02/30] dt-bindings: timer: Add StarFive JH7110 clint Hal Feng
2022-09-29 14:31   ` Hal Feng
2022-09-29 14:34   ` Krzysztof Kozlowski
2022-09-29 14:34     ` Krzysztof Kozlowski
2022-09-29 14:31 ` [PATCH v1 03/30] dt-bindings: interrupt-controller: Add StarFive JH7110 plic Hal Feng
2022-09-29 14:31   ` Hal Feng
2022-09-29 14:35   ` Krzysztof Kozlowski
2022-09-29 14:35     ` Krzysztof Kozlowski
2022-09-29 14:31 ` [PATCH v1 04/30] dt-bindings: sifive-l2-cache: Support StarFive JH71x0 SoCs Hal Feng
2022-09-29 14:31   ` Hal Feng
2022-09-29 14:36   ` Krzysztof Kozlowski
2022-09-29 14:36     ` Krzysztof Kozlowski
2022-09-29 15:33   ` Conor Dooley
2022-09-29 15:33     ` Conor Dooley
2022-10-03  9:26     ` Ben Dooks
2022-10-03  9:26       ` Ben Dooks
2022-10-08 18:54       ` Hal Feng
2022-10-08 18:54         ` Hal Feng
2022-09-29 14:32 ` [PATCH v1 05/30] soc: sifive: l2 cache: Convert to platform driver Hal Feng
2022-09-29 14:32   ` Hal Feng
2022-09-29 15:32   ` Conor Dooley
2022-09-29 15:32     ` Conor Dooley
2022-09-29 17:57   ` Ben Dooks
2022-09-29 17:57     ` Ben Dooks
2022-10-05 13:44     ` Emil Renner Berthing
2022-10-05 13:44       ` Emil Renner Berthing
2022-10-05 13:48       ` Ben Dooks
2022-10-05 13:48         ` Ben Dooks
2022-10-05 13:55         ` Emil Renner Berthing
2022-10-05 13:55           ` Emil Renner Berthing
2022-10-05 14:05           ` Conor Dooley
2022-10-05 14:05             ` Conor Dooley
2022-10-08 18:07             ` Hal Feng
2022-10-08 18:07               ` Hal Feng
2022-09-29 14:32 ` [PATCH v1 06/30] soc: sifive: l2 cache: Add StarFive JH71x0 support Hal Feng
2022-09-29 14:32   ` Hal Feng
2022-09-29 14:32 ` [PATCH v1 07/30] reset: starfive: jh7100: Use 32bit I/O on 32bit registers Hal Feng
2022-09-29 14:32   ` Hal Feng
2022-09-29 14:32 ` [PATCH v1 08/30] reset: starfive: jh7100: Use regmap APIs to operate registers Hal Feng
2022-09-29 14:32   ` Hal Feng
2022-09-29 14:32 ` [PATCH v1 09/30] reset: starfive: jh7100: Move necessary properties to device tree Hal Feng
2022-09-29 14:32   ` Hal Feng
2022-09-30 20:49   ` Rob Herring
2022-09-30 20:49     ` Rob Herring
2022-10-05 13:20     ` Emil Renner Berthing
2022-10-05 13:20       ` Emil Renner Berthing
2022-09-29 14:32 ` [PATCH v1 10/30] reset: starfive: Rename 'reset-starfive-jh7100.c' to 'reset-starfive.c' Hal Feng
2022-09-29 14:32   ` Hal Feng
2022-09-29 14:45 ` [PATCH v1 00/30] Basic StarFive JH7110 RISC-V SoC support Krzysztof Kozlowski
2022-09-29 14:45   ` Krzysztof Kozlowski
2022-09-29 17:59   ` Conor Dooley
2022-09-29 17:59     ` Conor Dooley
2022-10-01  1:13     ` hal.feng
2022-10-01  1:13       ` hal.feng
2022-09-29 16:35 ` [PATCH v1 11/30] dt-bindings: reset: Add StarFive JH7110 reset definitions Hal Feng
2022-09-29 16:35   ` Hal Feng
2022-09-29 17:51 ` [PATCH v1 12/30] dt-bindings: reset: Add starfive,jh7110-reset bindings Hal Feng
2022-09-29 17:51   ` Hal Feng
2022-09-29 18:21   ` Rob Herring
2022-09-29 18:21     ` Rob Herring
2022-09-29 18:40     ` Rob Herring
2022-09-29 18:40       ` Rob Herring
2022-09-29 18:43   ` Rob Herring
2022-09-29 18:43     ` Rob Herring
2022-10-11 15:30     ` Hal Feng
2022-10-11 15:30       ` Hal Feng
2022-10-11 16:36       ` Krzysztof Kozlowski
2022-10-11 16:36         ` Krzysztof Kozlowski
2022-10-12 13:16         ` Hal Feng
2022-10-12 13:16           ` Hal Feng
2022-10-12 13:33           ` Krzysztof Kozlowski
2022-10-12 13:33             ` Krzysztof Kozlowski
2022-10-12 14:05             ` Conor Dooley
2022-10-12 14:05               ` Conor Dooley
2022-10-12 15:21               ` Hal Feng
2022-10-12 15:21                 ` Hal Feng
2022-10-12 14:53             ` Hal Feng [this message]
2022-10-12 14:53               ` Hal Feng
2022-10-12  8:01       ` Emil Renner Berthing
2022-10-12  8:01         ` Emil Renner Berthing
2022-09-29 17:53 ` [PATCH v1 13/30] reset: starfive: Add StarFive JH7110 SoC support Hal Feng
2022-09-29 17:53   ` Hal Feng
2022-09-29 17:54 ` [PATCH v1 14/30] clk: starfive: Factor out common clock driver code Hal Feng
2022-09-29 17:54   ` Hal Feng
2022-09-30 21:43   ` Stephen Boyd
2022-09-30 21:43     ` Stephen Boyd
2022-09-29 17:56 ` [PATCH v1 15/30] clk: starfive: Use regmap APIs to operate registers Hal Feng
2022-09-29 17:56   ` Hal Feng
2022-09-30 21:48   ` Stephen Boyd
2022-09-30 21:48     ` Stephen Boyd
2022-10-05 13:14     ` Emil Renner Berthing
2022-10-05 13:14       ` Emil Renner Berthing
2022-10-12 23:05       ` Stephen Boyd
2022-10-12 23:05         ` Stephen Boyd
2022-10-23  4:11         ` Hal Feng
2022-10-23  4:11           ` Hal Feng
2022-10-23 10:25           ` Conor Dooley
2022-10-23 10:25             ` Conor Dooley
2022-10-28  3:16             ` Hal Feng
2022-10-28  3:16               ` Hal Feng
2022-10-27  1:26           ` Stephen Boyd
2022-10-27  1:26             ` Stephen Boyd
2022-10-28  2:46             ` Hal Feng
2022-10-28  2:46               ` Hal Feng
2022-09-29 17:56 ` [PATCH v1 16/30] dt-bindings: clock: Add StarFive JH7110 system clock definitions Hal Feng
2022-09-29 17:56   ` Hal Feng
2022-09-29 22:26 ` [PATCH v1 17/30] dt-bindings: clock: Add starfive,jh7110-clkgen-sys bindings Hal Feng
2022-09-29 22:26   ` Hal Feng
2022-09-30  1:55   ` Rob Herring
2022-09-30  1:55     ` Rob Herring
2022-09-30 10:58   ` Krzysztof Kozlowski
2022-09-30 10:58     ` Krzysztof Kozlowski
2022-10-11 17:52     ` Hal Feng
2022-10-11 17:52       ` Hal Feng
2022-09-30  1:50 ` [PATCH v1 18/30] clk: starfive: Add StarFive JH7110 system clock driver Hal Feng
2022-09-30  1:50   ` Hal Feng
2022-09-30  5:49 ` [PATCH v1 19/30] dt-bindings: clock: Add StarFive JH7110 always-on definitions Hal Feng
2022-09-30  5:49   ` Hal Feng
2022-09-30  5:56 ` [PATCH v1 20/30] dt-bindings: clock: Add starfive,jh7110-clkgen-aon bindings Hal Feng
2022-09-30  5:56   ` Hal Feng
2022-09-30 10:59   ` Krzysztof Kozlowski
2022-09-30 10:59     ` Krzysztof Kozlowski
2022-10-11 18:01     ` Hal Feng
2022-10-11 18:01       ` Hal Feng
2022-09-30 12:51   ` Rob Herring
2022-09-30 12:51     ` Rob Herring
2022-09-30  6:03 ` [PATCH v1 21/30] clk: starfive: Add StarFive JH7110 always-on clock driver Hal Feng
2022-09-30  6:03   ` Hal Feng
2022-09-30  6:08 ` [PATCH v1 22/30] pinctrl: Create subdirectory for StarFive drivers Hal Feng
2022-09-30  6:08   ` Hal Feng
2022-10-04  8:43   ` Linus Walleij
2022-10-04  8:43     ` Linus Walleij
2022-09-30  6:14 ` [PATCH v1 23/30] pinctrl: starfive: Rename "pinctrl-starfive" to "pinctrl-starfive-jh7100" Hal Feng
2022-09-30  6:14   ` Hal Feng
2022-09-30 21:28   ` Rob Herring
2022-09-30 21:28     ` Rob Herring
2022-10-04  8:48     ` Linus Walleij
2022-10-04  8:48       ` Linus Walleij
2022-10-04  8:58       ` Conor Dooley
2022-10-04  8:58         ` Conor Dooley
2022-10-04  9:13         ` Linus Walleij
2022-10-04  9:13           ` Linus Walleij
2022-10-04  9:21           ` Conor Dooley
2022-10-04  9:21             ` Conor Dooley
2022-10-04  9:24             ` Conor Dooley
2022-10-04  9:24               ` Conor Dooley
2022-10-06  9:07       ` Geert Uytterhoeven
2022-10-06  9:07         ` Geert Uytterhoeven
2022-09-30  7:33 ` [PATCH v1 24/30] dt-bindings: pinctrl: Add StarFive JH7110 pinctrl definitions Hal Feng
2022-09-30  7:33   ` Hal Feng
2022-09-30 11:00   ` Krzysztof Kozlowski
2022-09-30 11:00     ` Krzysztof Kozlowski
2022-09-30  7:38 ` [PATCH v1 25/30] dt-bindings: pinctrl: Add StarFive JH7110 pinctrl bindings Hal Feng
2022-09-30  7:38   ` Hal Feng
2022-09-30 11:05   ` Krzysztof Kozlowski
2022-09-30 11:05     ` Krzysztof Kozlowski
2022-09-30 12:16   ` Rob Herring
2022-09-30 12:16     ` Rob Herring
2022-10-20  7:28   ` Icenowy Zheng
2022-10-20  7:28     ` Icenowy Zheng
2022-09-30  7:43 ` [PATCH v1 26/30] pinctrl: starfive: Add StarFive JH7110 driver Hal Feng
2022-09-30  7:43   ` Hal Feng
2022-10-01 14:35   ` kernel test robot
2022-10-01 14:35     ` kernel test robot
2022-10-04  8:56   ` Linus Walleij
2022-10-04  8:56     ` Linus Walleij
2022-10-05 13:31     ` Emil Renner Berthing
2022-10-05 13:31       ` Emil Renner Berthing
2022-10-14  2:05       ` Hal Feng
2022-10-14  2:05         ` Hal Feng
2022-09-30  7:49 ` [PATCH v1 27/30] RISC-V: Add initial StarFive JH7110 device tree Hal Feng
2022-09-30  7:49   ` Hal Feng
2022-10-01 10:52   ` Conor Dooley
2022-10-01 10:52     ` Conor Dooley
2022-10-03  7:45     ` Krzysztof Kozlowski
2022-10-03  7:45       ` Krzysztof Kozlowski
2022-10-14  9:41     ` Hal Feng
2022-10-14  9:41       ` Hal Feng
2022-09-30  7:53 ` [PATCH v1 28/30] RISC-V: Add StarFive JH7110 VisionFive2 board " Hal Feng
2022-09-30  7:53   ` Hal Feng
2022-10-01 11:14   ` Conor Dooley
2022-10-01 11:14     ` Conor Dooley
2022-10-29  8:18     ` Hal Feng
2022-10-29  8:18       ` Hal Feng
2022-09-30  9:06 ` [PATCH v1 29/30] RISC-V: defconfig: Enable CONFIG_SERIAL_8250_DW Hal Feng
2022-09-30  9:06   ` Hal Feng
2022-09-30 20:54   ` Ben Dooks
2022-09-30 20:54     ` Ben Dooks
2022-09-30 21:41     ` Conor Dooley
2022-09-30 21:41       ` Conor Dooley
2022-10-14  3:24       ` Hal Feng
2022-10-14  3:24         ` Hal Feng
2022-09-30 12:23 ` [PATCH v1 30/30] RISC-V: Add StarFive JH7100 and JH7110 SoC Kconfig options Hal Feng
2022-09-30 12:23   ` Hal Feng
2022-09-30 12:37   ` Conor Dooley
2022-09-30 12:37     ` Conor Dooley
2022-10-11 18:32     ` Hal Feng
2022-10-11 18:32       ` Hal Feng
2022-10-05 13:05 ` [PATCH v1 00/30] Basic StarFive JH7110 RISC-V SoC support Emil Renner Berthing
2022-10-05 13:05   ` Emil Renner Berthing
2022-10-08  3:18   ` Hal Feng
2022-10-08  3:18     ` Hal Feng

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