Re: [PATCH 3/3] drm/i915: Assert the csb tail is within bounds

From: Chris Wilson <chris@chris-wilson.co.uk>
To: Mika Kuoppala <mika.kuoppala@linux.intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 3/3] drm/i915: Assert the csb tail is within bounds
Date: Tue, 27 Nov 2018 17:48:18 +0000	[thread overview]
Message-ID: <154334089801.11623.4351202884206840470@skylake-alporthouse-com> (raw)
In-Reply-To: <20181127173845.17403-3-mika.kuoppala@linux.intel.com>

Quoting Mika Kuoppala (2018-11-27 17:38:45)
> Make sure that the tail we get from hardware fits
> within the bounds dictated by our count of csb entries.
> 
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_lrc.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 107244ab09ef..1a34e91c1305 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -888,6 +888,7 @@ static void process_csb(struct intel_engine_cs *engine)
>          */
>         head = execlists->csb_head;
>         tail = READ_ONCE(*execlists->csb_write);
> +       GEM_DEBUG_BUG_ON(tail >= execlists->csb_entries);
>         GEM_TRACE("%s cs-irq head=%d, tail=%d\n", engine->name, head, tail);

Apply the assert after the debug trace.
-Chris
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