From: Stephen Boyd <swboyd@chromium.org> To: evgreen@chromium.org, marc.zyngier@arm.com Cc: linux-kernel@vger.kernel.org, rplsssn@codeaurora.org, linux-arm-msm@vger.kernel.org, thierry.reding@gmail.com, bjorn.andersson@linaro.org, dianders@chromium.org, linus.walleij@linaro.org, Lina Iyer <ilina@codeaurora.org> Subject: Re: [PATCH v2 5/8] drivers: pinctrl: msm: setup GPIO irqchip hierarchy Date: Wed, 30 Jan 2019 14:45:28 -0800 [thread overview] Message-ID: <154888832839.169292.6913084380036629941@swboyd.mtv.corp.google.com> (raw) In-Reply-To: <20190124202205.7940-6-ilina@codeaurora.org> Quoting Lina Iyer (2019-01-24 12:22:02) > To allow GPIOs to wakeup the system from suspend or deep idle, the > wakeup capable GPIOs are setup in hierarchy with interrupts from the > wakeup-parent irqchip. > > In older SoC's, the TLMM will handover detection to the parent irqchip > and in newer SoC's, the parent irqchip may also be active as well as the > TLMM and therefore the GPIOs need to be masked at TLMM to avoid > duplicate interrupts. To enable both these configurations to exist, > allow the parent irqchip to dictate the TLMM irqchip's behavior when > masking/unmasking the interrupt. > > Co-developed-by: Stephen Boyd <swboyd@chromium.org> > Signed-off-by: Lina Iyer <ilina@codeaurora.org> > > --- > Changes in v2: > - Fix bug when unmaksing PDC interrupt What was the bug? Is that why the mask callback in this gpio chip no longer calls the parent irq chip? We should keep calling the parent irqchip from what I can tell. Otherwise, we may never mask the irq at the PDC and only mask it at the GPIO level, which may not even care about it if it's being monitored by the PDC. This causes me to get a bunch of interrupts on my touchscreen when I touch it once vs. only a handful (like 4) when I fix it with the below patch: Can you fold it in? diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index dd72ec8fb8db..9b45219893bd 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -682,6 +682,9 @@ static void msm_gpio_irq_mask(struct irq_data *d) clear_bit(d->hwirq, pctrl->enabled_irqs); raw_spin_unlock_irqrestore(&pctrl->lock, flags); + + if (d->parent_data) + irq_chip_mask_parent(d); } static void msm_gpio_irq_unmask(struct irq_data *d)
WARNING: multiple messages have this Message-ID (diff)
From: Stephen Boyd <swboyd@chromium.org> To: Lina Iyer <ilina@codeaurora.org>, evgreen@chromium.org, marc.zyngier@arm.com Cc: linux-kernel@vger.kernel.org, rplsssn@codeaurora.org, linux-arm-msm@vger.kernel.org, thierry.reding@gmail.com, bjorn.andersson@linaro.org, dianders@chromium.org, linus.walleij@linaro.org, Lina Iyer <ilina@codeaurora.org> Subject: Re: [PATCH v2 5/8] drivers: pinctrl: msm: setup GPIO irqchip hierarchy Date: Wed, 30 Jan 2019 14:45:28 -0800 [thread overview] Message-ID: <154888832839.169292.6913084380036629941@swboyd.mtv.corp.google.com> (raw) In-Reply-To: <20190124202205.7940-6-ilina@codeaurora.org> Quoting Lina Iyer (2019-01-24 12:22:02) > To allow GPIOs to wakeup the system from suspend or deep idle, the > wakeup capable GPIOs are setup in hierarchy with interrupts from the > wakeup-parent irqchip. > > In older SoC's, the TLMM will handover detection to the parent irqchip > and in newer SoC's, the parent irqchip may also be active as well as the > TLMM and therefore the GPIOs need to be masked at TLMM to avoid > duplicate interrupts. To enable both these configurations to exist, > allow the parent irqchip to dictate the TLMM irqchip's behavior when > masking/unmasking the interrupt. > > Co-developed-by: Stephen Boyd <swboyd@chromium.org> > Signed-off-by: Lina Iyer <ilina@codeaurora.org> > > --- > Changes in v2: > - Fix bug when unmaksing PDC interrupt What was the bug? Is that why the mask callback in this gpio chip no longer calls the parent irq chip? We should keep calling the parent irqchip from what I can tell. Otherwise, we may never mask the irq at the PDC and only mask it at the GPIO level, which may not even care about it if it's being monitored by the PDC. This causes me to get a bunch of interrupts on my touchscreen when I touch it once vs. only a handful (like 4) when I fix it with the below patch: Can you fold it in? diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index dd72ec8fb8db..9b45219893bd 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -682,6 +682,9 @@ static void msm_gpio_irq_mask(struct irq_data *d) clear_bit(d->hwirq, pctrl->enabled_irqs); raw_spin_unlock_irqrestore(&pctrl->lock, flags); + + if (d->parent_data) + irq_chip_mask_parent(d); } static void msm_gpio_irq_unmask(struct irq_data *d)
next prev parent reply other threads:[~2019-01-30 22:45 UTC|newest] Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-01-24 20:21 [PATCH v2 0/8] qcom: support wakeup capable GPIOs Lina Iyer 2019-01-24 20:21 ` [PATCH v2 1/8] gpio: Add support for hierarchical IRQ domains Lina Iyer 2019-01-24 20:21 ` [PATCH v2 2/8] irqdomain: add bus token DOMAIN_BUS_WAKEUP Lina Iyer 2019-02-15 21:18 ` Stephen Boyd 2019-02-15 21:18 ` Stephen Boyd 2019-01-24 20:22 ` [PATCH v2 3/8] drivers: irqchip: add PDC irqdomain for wakeup capable GPIOs Lina Iyer 2019-01-24 20:22 ` [PATCH v2 4/8] dt-bindings: sdm845-pinctrl: add wakeup interrupt parent for GPIO Lina Iyer 2019-01-24 20:22 ` [PATCH v2 5/8] drivers: pinctrl: msm: setup GPIO irqchip hierarchy Lina Iyer 2019-01-30 22:45 ` Stephen Boyd [this message] 2019-01-30 22:45 ` Stephen Boyd 2019-01-31 16:34 ` Lina Iyer 2019-01-24 20:22 ` [PATCH v2 6/8] arm64: dts: qcom: add PDC interrupt controller for SDM845 Lina Iyer 2019-01-24 20:22 ` [PATCH v2 7/8] arm64: dts: qcom: setup PDC as wakeup parent for GPIOs " Lina Iyer 2019-01-24 20:22 ` [PATCH v2 8/8] arm64: defconfig: enable PDC interrupt controller for Qualcomm SDM845 Lina Iyer 2019-01-28 14:17 ` [PATCH v2 0/8] qcom: support wakeup capable GPIOs Linus Walleij 2019-01-30 17:03 ` Lina Iyer
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