From: Dave Martin <Dave.Martin@arm.com>
To: kvmarm@lists.cs.columbia.edu
Cc: Okamoto Takayuki <tokamoto@jp.fujitsu.com>,
Christoffer Dall <cdall@kernel.org>,
Ard Biesheuvel <ard.biesheuvel@linaro.org>,
Marc Zyngier <marc.zyngier@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>,
Zhang Lei <zhang.lei@jp.fujitsu.com>,
Julien Grall <julien.grall@arm.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 14/14] KVM: arm64: Clarify access behaviour for out-of-range SVE register slice IDs
Date: Thu, 18 Apr 2019 17:07:11 +0100 [thread overview]
Message-ID: <1555603631-8107-15-git-send-email-Dave.Martin@arm.com> (raw)
In-Reply-To: <1555603631-8107-1-git-send-email-Dave.Martin@arm.com>
The existing documentation for which SVE register slice IDs are
considered out-of-range, and what happens when userspace tries to
access them, is cryptic.
This patch rewords the text with the aim of making it a bit easier to
understand.
No functional change.
Suggested-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Reviewed-by: Andrew Jones <drjones@redhat.com>
---
Documentation/virtual/kvm/api.txt | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt
index 818ac97..e410a9f 100644
--- a/Documentation/virtual/kvm/api.txt
+++ b/Documentation/virtual/kvm/api.txt
@@ -2159,8 +2159,9 @@ arm64 SVE registers have the following bit patterns:
0x6050 0000 0015 060 <slice:5> FFR bits[256*slice + 255 : 256*slice]
0x6060 0000 0015 ffff KVM_REG_ARM64_SVE_VLS pseudo-register
-Access to slices beyond the maximum vector length configured for the
-vcpu (i.e., where 16 * slice >= max_vq (**)) will fail with ENOENT.
+Access to register IDs where 2048 * slice >= 128 * max_vq will fail with
+ENOENT. max_vq is the vcpu's maximum supported vector length in 128-bit
+quadwords: see (**) below.
These registers are only accessible on vcpus for which SVE is enabled.
See KVM_ARM_VCPU_INIT for details.
--
2.1.4
WARNING: multiple messages have this Message-ID (diff)
From: Dave Martin <Dave.Martin@arm.com>
To: kvmarm@lists.cs.columbia.edu
Cc: Okamoto Takayuki <tokamoto@jp.fujitsu.com>,
Christoffer Dall <cdall@kernel.org>,
Ard Biesheuvel <ard.biesheuvel@linaro.org>,
Marc Zyngier <marc.zyngier@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>,
Zhang Lei <zhang.lei@jp.fujitsu.com>,
Julien Grall <julien.grall@arm.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 14/14] KVM: arm64: Clarify access behaviour for out-of-range SVE register slice IDs
Date: Thu, 18 Apr 2019 17:07:11 +0100 [thread overview]
Message-ID: <1555603631-8107-15-git-send-email-Dave.Martin@arm.com> (raw)
Message-ID: <20190418160711.cV4-m_sVDE_sFPtJNQbwCmEKud0MS0ixk2UFYj-jcE4@z> (raw)
In-Reply-To: <1555603631-8107-1-git-send-email-Dave.Martin@arm.com>
The existing documentation for which SVE register slice IDs are
considered out-of-range, and what happens when userspace tries to
access them, is cryptic.
This patch rewords the text with the aim of making it a bit easier to
understand.
No functional change.
Suggested-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Reviewed-by: Andrew Jones <drjones@redhat.com>
---
Documentation/virtual/kvm/api.txt | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt
index 818ac97..e410a9f 100644
--- a/Documentation/virtual/kvm/api.txt
+++ b/Documentation/virtual/kvm/api.txt
@@ -2159,8 +2159,9 @@ arm64 SVE registers have the following bit patterns:
0x6050 0000 0015 060 <slice:5> FFR bits[256*slice + 255 : 256*slice]
0x6060 0000 0015 ffff KVM_REG_ARM64_SVE_VLS pseudo-register
-Access to slices beyond the maximum vector length configured for the
-vcpu (i.e., where 16 * slice >= max_vq (**)) will fail with ENOENT.
+Access to register IDs where 2048 * slice >= 128 * max_vq will fail with
+ENOENT. max_vq is the vcpu's maximum supported vector length in 128-bit
+quadwords: see (**) below.
These registers are only accessible on vcpus for which SVE is enabled.
See KVM_ARM_VCPU_INIT for details.
--
2.1.4
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
WARNING: multiple messages have this Message-ID (diff)
From: Dave Martin <Dave.Martin@arm.com>
To: kvmarm@lists.cs.columbia.edu
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Okamoto Takayuki" <tokamoto@jp.fujitsu.com>,
"Christoffer Dall" <cdall@kernel.org>,
"Ard Biesheuvel" <ard.biesheuvel@linaro.org>,
"Marc Zyngier" <marc.zyngier@arm.com>,
"Catalin Marinas" <catalin.marinas@arm.com>,
"Will Deacon" <will.deacon@arm.com>,
"Andrew Jones" <drjones@redhat.com>,
"Zhang Lei" <zhang.lei@jp.fujitsu.com>,
"Julien Grall" <julien.grall@arm.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 14/14] KVM: arm64: Clarify access behaviour for out-of-range SVE register slice IDs
Date: Thu, 18 Apr 2019 17:07:11 +0100 [thread overview]
Message-ID: <1555603631-8107-15-git-send-email-Dave.Martin@arm.com> (raw)
In-Reply-To: <1555603631-8107-1-git-send-email-Dave.Martin@arm.com>
The existing documentation for which SVE register slice IDs are
considered out-of-range, and what happens when userspace tries to
access them, is cryptic.
This patch rewords the text with the aim of making it a bit easier to
understand.
No functional change.
Suggested-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
Reviewed-by: Andrew Jones <drjones@redhat.com>
---
Documentation/virtual/kvm/api.txt | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt
index 818ac97..e410a9f 100644
--- a/Documentation/virtual/kvm/api.txt
+++ b/Documentation/virtual/kvm/api.txt
@@ -2159,8 +2159,9 @@ arm64 SVE registers have the following bit patterns:
0x6050 0000 0015 060 <slice:5> FFR bits[256*slice + 255 : 256*slice]
0x6060 0000 0015 ffff KVM_REG_ARM64_SVE_VLS pseudo-register
-Access to slices beyond the maximum vector length configured for the
-vcpu (i.e., where 16 * slice >= max_vq (**)) will fail with ENOENT.
+Access to register IDs where 2048 * slice >= 128 * max_vq will fail with
+ENOENT. max_vq is the vcpu's maximum supported vector length in 128-bit
+quadwords: see (**) below.
These registers are only accessible on vcpus for which SVE is enabled.
See KVM_ARM_VCPU_INIT for details.
--
2.1.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-04-18 16:08 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-18 16:06 [PATCH v2 00/14] KVM: arm64: SVE cleanups Dave Martin
2019-04-18 16:06 ` Dave Martin
2019-04-18 16:06 ` Dave Martin
2019-04-18 16:06 ` [PATCH v2 01/14] arm64/sve: Clarify vq map semantics Dave Martin
2019-04-18 16:06 ` Dave Martin
2019-04-18 16:06 ` Dave Martin
2019-04-18 16:06 ` [PATCH v2 02/14] KVM: arm/arm64: Demote kvm_arm_init_arch_resources() to just set up SVE Dave Martin
2019-04-18 16:06 ` Dave Martin
2019-04-18 16:06 ` Dave Martin
2019-04-18 16:07 ` [PATCH v2 03/14] KVM: arm: Make vcpu finalization stubs into inline functions Dave Martin
2019-04-18 16:07 ` Dave Martin
2019-04-18 16:07 ` Dave Martin
2019-04-18 16:07 ` [PATCH v2 04/14] KVM: arm64/sve: sys_regs: Demote redundant vcpu_has_sve() checks to WARNs Dave Martin
2019-04-18 16:07 ` Dave Martin
2019-04-18 16:07 ` Dave Martin
2019-04-18 16:07 ` [PATCH v2 05/14] KVM: arm64/sve: Clean up UAPI register ID definitions Dave Martin
2019-04-18 16:07 ` Dave Martin
2019-04-18 16:07 ` Dave Martin
2019-04-18 16:07 ` [PATCH v2 06/14] KVM: arm64/sve: Miscellaneous tidyups in guest.c Dave Martin
2019-04-18 16:07 ` Dave Martin
2019-04-18 16:07 ` Dave Martin
2019-04-18 16:07 ` [PATCH v2 07/14] KVM: arm64/sve: Make register ioctl access errors more consistent Dave Martin
2019-04-18 16:07 ` Dave Martin
2019-04-18 16:07 ` Dave Martin
2019-04-25 12:30 ` Alex Bennée
2019-04-25 12:30 ` Alex Bennée
2019-04-25 13:04 ` Dave Martin
2019-04-25 13:04 ` Dave Martin
2019-04-25 13:04 ` Dave Martin
2019-04-25 15:04 ` Alex Bennée
2019-04-25 15:04 ` Alex Bennée
2019-04-25 15:27 ` Dave Martin
2019-04-25 15:27 ` Dave Martin
2019-04-25 15:27 ` Dave Martin
2019-04-18 16:07 ` [PATCH v2 08/14] KVM: arm64/sve: WARN when avoiding divide-by-zero in sve_reg_to_region() Dave Martin
2019-04-18 16:07 ` Dave Martin
2019-04-18 16:07 ` Dave Martin
2019-04-18 16:07 ` [PATCH v2 09/14] KVM: arm64/sve: Simplify KVM_REG_ARM64_SVE_VLS array sizing Dave Martin
2019-04-18 16:07 ` Dave Martin
2019-04-18 16:07 ` Dave Martin
2019-04-18 16:07 ` [PATCH v2 10/14] KVM: arm64/sve: Explain validity checks in set_sve_vls() Dave Martin
2019-04-18 16:07 ` Dave Martin
2019-04-18 16:07 ` Dave Martin
2019-04-18 16:07 ` [PATCH v2 11/14] KVM: arm/arm64: Clean up vcpu finalization function parameter naming Dave Martin
2019-04-18 16:07 ` Dave Martin
2019-04-18 16:07 ` Dave Martin
2019-04-18 16:07 ` [PATCH v2 12/14] KVM: Clarify capability requirements for KVM_ARM_VCPU_FINALIZE Dave Martin
2019-04-18 16:07 ` Dave Martin
2019-04-18 16:07 ` Dave Martin
2019-04-18 16:07 ` [PATCH v2 13/14] KVM: Clarify KVM_{SET, GET}_ONE_REG error code documentation Dave Martin
2019-04-18 16:07 ` Dave Martin
2019-04-18 16:07 ` Dave Martin [this message]
2019-04-18 16:07 ` [PATCH v2 14/14] KVM: arm64: Clarify access behaviour for out-of-range SVE register slice IDs Dave Martin
2019-04-18 16:07 ` Dave Martin
2019-04-24 9:21 ` [PATCH v2 00/14] KVM: arm64: SVE cleanups Alex Bennée
2019-04-24 9:21 ` Alex Bennée
2019-04-24 9:38 ` Marc Zyngier
2019-04-24 9:38 ` Marc Zyngier
2019-04-25 12:35 ` Alex Bennée
2019-04-25 12:35 ` Alex Bennée
2019-04-25 13:05 ` Dave Martin
2019-04-25 13:05 ` Dave Martin
2019-04-25 13:05 ` Dave Martin
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