From: Yong Liang <yong.liang@mediatek.com>
To: mturquette@baylibre.com, sboyd@kernel.org,
matthias.bgg@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com,
drinkcat@chromium.org, weiyi.lu@mediatek.com,
jamesjj.liao@mediatek.com, jasu@njomotys.info,
owen.chen@mediatek.com, chunhui.dai@mediatek.com,
erin.lo@mediatek.com, eddie.huang@mediatek.com
Cc: "yong.liang" <yong.liang@mediatek.com>,
linux-mediatek@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 1/2] arm64: dts: mt8183: Add reset-cells in infracfg
Date: Fri, 26 Apr 2019 15:10:17 +0800 [thread overview]
Message-ID: <1556262618-14281-1-git-send-email-yong.liang@mediatek.com> (raw)
From: "yong.liang" <yong.liang@mediatek.com>
Include mt8183-resets.h and add reset-cells in infracfg
in dtsi file.
Signed-off-by: yong.liang <yong.liang@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 08274bf..2589e94 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/clock/mt8183-clk.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/reset-controller/mt8183-resets.h>
/ {
compatible = "mediatek,mt8183";
@@ -194,6 +195,7 @@
compatible = "mediatek,mt8183-infracfg", "syscon";
reg = <0 0x10001000 0 0x1000>;
#clock-cells = <1>;
+ #reset-cells = <1>;
};
apmixedsys: syscon@1000c000 {
--
1.7.9.5
WARNING: multiple messages have this Message-ID (diff)
From: Yong Liang <yong.liang@mediatek.com>
To: <mturquette@baylibre.com>, <sboyd@kernel.org>,
<matthias.bgg@gmail.com>, <robh+dt@kernel.org>,
<mark.rutland@arm.com>, <drinkcat@chromium.org>,
<weiyi.lu@mediatek.com>, <jamesjj.liao@mediatek.com>,
<jasu@njomotys.info>, <owen.chen@mediatek.com>,
<chunhui.dai@mediatek.com>, <erin.lo@mediatek.com>,
<eddie.huang@mediatek.com>
Cc: "yong.liang" <yong.liang@mediatek.com>,
linux-mediatek@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 1/2] arm64: dts: mt8183: Add reset-cells in infracfg
Date: Fri, 26 Apr 2019 15:10:17 +0800 [thread overview]
Message-ID: <1556262618-14281-1-git-send-email-yong.liang@mediatek.com> (raw)
From: "yong.liang" <yong.liang@mediatek.com>
Include mt8183-resets.h and add reset-cells in infracfg
in dtsi file.
Signed-off-by: yong.liang <yong.liang@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 08274bf..2589e94 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/clock/mt8183-clk.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/reset-controller/mt8183-resets.h>
/ {
compatible = "mediatek,mt8183";
@@ -194,6 +195,7 @@
compatible = "mediatek,mt8183-infracfg", "syscon";
reg = <0 0x10001000 0 0x1000>;
#clock-cells = <1>;
+ #reset-cells = <1>;
};
apmixedsys: syscon@1000c000 {
--
1.7.9.5
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next reply other threads:[~2019-04-26 7:10 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-26 7:10 Yong Liang [this message]
2019-04-26 7:10 ` [PATCH v2 1/2] arm64: dts: mt8183: Add reset-cells in infracfg Yong Liang
2019-04-26 7:10 ` [PATCH v2 2/2] clk: reset: Modify reset-controller driver Yong Liang
2019-04-26 7:10 ` Yong Liang
2019-04-29 6:35 ` Eddie Huang
2019-04-29 6:35 ` Eddie Huang
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