From: <yongqiang.niu@mediatek.com>
To: CK Hu <ck.hu@mediatek.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>
Cc: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
Mark Rutland <mark.rutland@arm.com>,
<dri-devel@lists.freedesktop.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
Yongqiang Niu <yongqiang.niu@mediatek.com>
Subject: [PATCH v3, 01/27] dt-bindings: mediatek: add binding for mt8183 display
Date: Wed, 5 Jun 2019 19:42:40 +0800 [thread overview]
Message-ID: <1559734986-7379-2-git-send-email-yongqiang.niu@mediatek.com> (raw)
In-Reply-To: <1559734986-7379-1-git-send-email-yongqiang.niu@mediatek.com>
From: Yongqiang Niu <yongqiang.niu@mediatek.com>
Update device tree binding documention for the display subsystem for
Mediatek MT8183 SOCs
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
.../bindings/display/mediatek/mediatek,disp.txt | 34 +++++++++++++---------
1 file changed, 20 insertions(+), 14 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
index 8469de5..70770fe 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
@@ -27,20 +27,20 @@ Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt.
Required properties (all function blocks):
- compatible: "mediatek,<chip>-disp-<function>", one of
- "mediatek,<chip>-disp-ovl" - overlay (4 layers, blending, csc)
- "mediatek,<chip>-disp-rdma" - read DMA / line buffer
- "mediatek,<chip>-disp-wdma" - write DMA
- "mediatek,<chip>-disp-color" - color processor
- "mediatek,<chip>-disp-aal" - adaptive ambient light controller
- "mediatek,<chip>-disp-gamma" - gamma correction
- "mediatek,<chip>-disp-merge" - merge streams from two RDMA sources
- "mediatek,<chip>-disp-split" - split stream to two encoders
- "mediatek,<chip>-disp-ufoe" - data compression engine
- "mediatek,<chip>-dsi" - DSI controller, see mediatek,dsi.txt
- "mediatek,<chip>-dpi" - DPI controller, see mediatek,dpi.txt
- "mediatek,<chip>-disp-mutex" - display mutex
- "mediatek,<chip>-disp-od" - overdrive
- the supported chips are mt2701, mt2712 and mt8173.
+ "mediatek,<chip>-disp-ovl" - overlay (4 layers, blending, csc)
+ "mediatek,<chip>-disp-rdma" - read DMA / line buffer
+ "mediatek,<chip>-disp-wdma" - write DMA
+ "mediatek,<chip>-disp-color" - color processor
+ "mediatek,<chip>-disp-aal" - adaptive ambient light controller
+ "mediatek,<chip>-disp-gamma" - gamma correction
+ "mediatek,<chip>-disp-merge" - merge streams from two RDMA sources
+ "mediatek,<chip>-disp-split" - split stream to two encoders
+ "mediatek,<chip>-disp-ufoe" - data compression engine
+ "mediatek,<chip>-dsi" - DSI controller, see mediatek,dsi.txt
+ "mediatek,<chip>-dpi" - DPI controller, see mediatek,dpi.txt
+ "mediatek,<chip>-disp-mutex" - display mutex
+ "mediatek,<chip>-disp-od" - overdrive
+ the supported chips are mt2701, mt2712, mt8173 and mt8183.
- reg: Physical base address and length of the function block register space
- interrupts: The interrupt signal from the function block (required, except for
merge and split function blocks).
@@ -71,6 +71,12 @@ mmsys: clock-controller@14000000 {
#clock-cells = <1>;
};
+display_components: dispsys@14000000 {
+ compatible = "mediatek,mt8183-display";
+ reg = <0 0x14000000 0 0x1000>;
+ power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>;
+};
+
ovl0: ovl@1400c000 {
compatible = "mediatek,mt8173-disp-ovl";
reg = <0 0x1400c000 0 0x1000>;
--
1.8.1.1.dirty
WARNING: multiple messages have this Message-ID (diff)
From: <yongqiang.niu@mediatek.com>
To: CK Hu <ck.hu@mediatek.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>
Cc: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
Mark Rutland <mark.rutland@arm.com>,
dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org,
Yongqiang Niu <yongqiang.niu@mediatek.com>
Subject: [PATCH v3, 01/27] dt-bindings: mediatek: add binding for mt8183 display
Date: Wed, 5 Jun 2019 19:42:40 +0800 [thread overview]
Message-ID: <1559734986-7379-2-git-send-email-yongqiang.niu@mediatek.com> (raw)
In-Reply-To: <1559734986-7379-1-git-send-email-yongqiang.niu@mediatek.com>
From: Yongqiang Niu <yongqiang.niu@mediatek.com>
Update device tree binding documention for the display subsystem for
Mediatek MT8183 SOCs
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
.../bindings/display/mediatek/mediatek,disp.txt | 34 +++++++++++++---------
1 file changed, 20 insertions(+), 14 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
index 8469de5..70770fe 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
@@ -27,20 +27,20 @@ Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt.
Required properties (all function blocks):
- compatible: "mediatek,<chip>-disp-<function>", one of
- "mediatek,<chip>-disp-ovl" - overlay (4 layers, blending, csc)
- "mediatek,<chip>-disp-rdma" - read DMA / line buffer
- "mediatek,<chip>-disp-wdma" - write DMA
- "mediatek,<chip>-disp-color" - color processor
- "mediatek,<chip>-disp-aal" - adaptive ambient light controller
- "mediatek,<chip>-disp-gamma" - gamma correction
- "mediatek,<chip>-disp-merge" - merge streams from two RDMA sources
- "mediatek,<chip>-disp-split" - split stream to two encoders
- "mediatek,<chip>-disp-ufoe" - data compression engine
- "mediatek,<chip>-dsi" - DSI controller, see mediatek,dsi.txt
- "mediatek,<chip>-dpi" - DPI controller, see mediatek,dpi.txt
- "mediatek,<chip>-disp-mutex" - display mutex
- "mediatek,<chip>-disp-od" - overdrive
- the supported chips are mt2701, mt2712 and mt8173.
+ "mediatek,<chip>-disp-ovl" - overlay (4 layers, blending, csc)
+ "mediatek,<chip>-disp-rdma" - read DMA / line buffer
+ "mediatek,<chip>-disp-wdma" - write DMA
+ "mediatek,<chip>-disp-color" - color processor
+ "mediatek,<chip>-disp-aal" - adaptive ambient light controller
+ "mediatek,<chip>-disp-gamma" - gamma correction
+ "mediatek,<chip>-disp-merge" - merge streams from two RDMA sources
+ "mediatek,<chip>-disp-split" - split stream to two encoders
+ "mediatek,<chip>-disp-ufoe" - data compression engine
+ "mediatek,<chip>-dsi" - DSI controller, see mediatek,dsi.txt
+ "mediatek,<chip>-dpi" - DPI controller, see mediatek,dpi.txt
+ "mediatek,<chip>-disp-mutex" - display mutex
+ "mediatek,<chip>-disp-od" - overdrive
+ the supported chips are mt2701, mt2712, mt8173 and mt8183.
- reg: Physical base address and length of the function block register space
- interrupts: The interrupt signal from the function block (required, except for
merge and split function blocks).
@@ -71,6 +71,12 @@ mmsys: clock-controller@14000000 {
#clock-cells = <1>;
};
+display_components: dispsys@14000000 {
+ compatible = "mediatek,mt8183-display";
+ reg = <0 0x14000000 0 0x1000>;
+ power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>;
+};
+
ovl0: ovl@1400c000 {
compatible = "mediatek,mt8173-disp-ovl";
reg = <0 0x1400c000 0 0x1000>;
--
1.8.1.1.dirty
WARNING: multiple messages have this Message-ID (diff)
From: <yongqiang.niu@mediatek.com>
To: CK Hu <ck.hu@mediatek.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
"Rob Herring" <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org,
Yongqiang Niu <yongqiang.niu@mediatek.com>,
David Airlie <airlied@linux.ie>,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
linux-mediatek@lists.infradead.org,
Daniel Vetter <daniel@ffwll.ch>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3, 01/27] dt-bindings: mediatek: add binding for mt8183 display
Date: Wed, 5 Jun 2019 19:42:40 +0800 [thread overview]
Message-ID: <1559734986-7379-2-git-send-email-yongqiang.niu@mediatek.com> (raw)
In-Reply-To: <1559734986-7379-1-git-send-email-yongqiang.niu@mediatek.com>
From: Yongqiang Niu <yongqiang.niu@mediatek.com>
Update device tree binding documention for the display subsystem for
Mediatek MT8183 SOCs
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
.../bindings/display/mediatek/mediatek,disp.txt | 34 +++++++++++++---------
1 file changed, 20 insertions(+), 14 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
index 8469de5..70770fe 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
@@ -27,20 +27,20 @@ Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt.
Required properties (all function blocks):
- compatible: "mediatek,<chip>-disp-<function>", one of
- "mediatek,<chip>-disp-ovl" - overlay (4 layers, blending, csc)
- "mediatek,<chip>-disp-rdma" - read DMA / line buffer
- "mediatek,<chip>-disp-wdma" - write DMA
- "mediatek,<chip>-disp-color" - color processor
- "mediatek,<chip>-disp-aal" - adaptive ambient light controller
- "mediatek,<chip>-disp-gamma" - gamma correction
- "mediatek,<chip>-disp-merge" - merge streams from two RDMA sources
- "mediatek,<chip>-disp-split" - split stream to two encoders
- "mediatek,<chip>-disp-ufoe" - data compression engine
- "mediatek,<chip>-dsi" - DSI controller, see mediatek,dsi.txt
- "mediatek,<chip>-dpi" - DPI controller, see mediatek,dpi.txt
- "mediatek,<chip>-disp-mutex" - display mutex
- "mediatek,<chip>-disp-od" - overdrive
- the supported chips are mt2701, mt2712 and mt8173.
+ "mediatek,<chip>-disp-ovl" - overlay (4 layers, blending, csc)
+ "mediatek,<chip>-disp-rdma" - read DMA / line buffer
+ "mediatek,<chip>-disp-wdma" - write DMA
+ "mediatek,<chip>-disp-color" - color processor
+ "mediatek,<chip>-disp-aal" - adaptive ambient light controller
+ "mediatek,<chip>-disp-gamma" - gamma correction
+ "mediatek,<chip>-disp-merge" - merge streams from two RDMA sources
+ "mediatek,<chip>-disp-split" - split stream to two encoders
+ "mediatek,<chip>-disp-ufoe" - data compression engine
+ "mediatek,<chip>-dsi" - DSI controller, see mediatek,dsi.txt
+ "mediatek,<chip>-dpi" - DPI controller, see mediatek,dpi.txt
+ "mediatek,<chip>-disp-mutex" - display mutex
+ "mediatek,<chip>-disp-od" - overdrive
+ the supported chips are mt2701, mt2712, mt8173 and mt8183.
- reg: Physical base address and length of the function block register space
- interrupts: The interrupt signal from the function block (required, except for
merge and split function blocks).
@@ -71,6 +71,12 @@ mmsys: clock-controller@14000000 {
#clock-cells = <1>;
};
+display_components: dispsys@14000000 {
+ compatible = "mediatek,mt8183-display";
+ reg = <0 0x14000000 0 0x1000>;
+ power-domains = <&scpsys MT8183_POWER_DOMAIN_DISP>;
+};
+
ovl0: ovl@1400c000 {
compatible = "mediatek,mt8173-disp-ovl";
reg = <0 0x1400c000 0 0x1000>;
--
1.8.1.1.dirty
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next prev parent reply other threads:[~2019-06-05 11:43 UTC|newest]
Thread overview: 140+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-05 11:42 [PATCH v3, 00/27] add drm support for MT8183 yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu [this message]
2019-06-05 11:42 ` [PATCH v3, 01/27] dt-bindings: mediatek: add binding for mt8183 display yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-06 3:47 ` CK Hu
2019-06-06 3:47 ` CK Hu
2019-06-06 3:47 ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 02/27] dt-bindings: mediatek: add ovl_2l description " yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-07-09 1:37 ` Rob Herring
2019-07-09 1:37 ` Rob Herring
2019-06-05 11:42 ` [PATCH v3, 03/27] dt-bindings: mediatek: add ccorr " yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-07-09 1:37 ` Rob Herring
2019-07-09 1:37 ` Rob Herring
2019-07-09 1:37 ` Rob Herring
2019-06-05 11:42 ` [PATCH v3, 04/27] dt-bindings: mediatek: add dither " yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-07-09 1:37 ` Rob Herring
2019-07-09 1:37 ` Rob Herring
2019-07-09 1:37 ` Rob Herring
2019-06-05 11:42 ` [PATCH v3, 05/27] arm64: dts: add display nodes for mt8183 yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu-NuS5LvNUpcJWk0Htik3J/w
2019-06-05 11:42 ` [PATCH v3, 06/27] drm/mediatek: add mutex mod into ddp private data yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-06 5:42 ` CK Hu
2019-06-06 5:42 ` CK Hu
2019-06-06 5:42 ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 07/27] drm/mediatek: add mutex mod register offset " yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu-NuS5LvNUpcJWk0Htik3J/w
2019-06-05 11:42 ` [PATCH v3, 08/27] drm/mediatek: add mutex sof " yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-06 6:12 ` CK Hu
2019-06-06 6:12 ` CK Hu
2019-06-06 6:12 ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 09/27] drm/mediatek: add mutex sof register offset " yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-13 7:45 ` CK Hu
2019-06-13 7:45 ` CK Hu
2019-06-13 7:45 ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 10/27] drm/mediatek: split DISP_REG_CONFIG_DSI_SEL setting into another use case yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-14 2:26 ` CK Hu
2019-06-14 2:26 ` CK Hu
2019-06-14 2:26 ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 11/27] drm/mediatek: add mmsys private data for ddp path config yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-14 3:28 ` CK Hu
2019-06-14 3:28 ` CK Hu
2019-06-14 3:28 ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 12/27] drm/mediatek: move rdma sout from mtk_ddp_mout_en into mtk_ddp_sout_sel yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-05 11:42 ` [PATCH v3, 13/27] drm/mediatek: add ddp component CCORR yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-14 3:42 ` CK Hu
2019-06-14 3:42 ` CK Hu
2019-06-14 3:42 ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 14/27] drm/mediatek: add commponent OVL_2L0 yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-14 3:54 ` CK Hu
2019-06-14 3:54 ` CK Hu
2019-06-14 3:54 ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 15/27] drm/mediatek: add component OVL_2L1 yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-14 3:55 ` CK Hu
2019-06-14 3:55 ` CK Hu
2019-06-14 3:55 ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 16/27] drm/mediatek: add component DITHER yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-14 4:36 ` CK Hu
2019-06-14 4:36 ` CK Hu
2019-06-14 4:36 ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 17/27] drm/mediatek: add gmc_bits for ovl private data yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-14 4:59 ` CK Hu
2019-06-14 4:59 ` CK Hu
2019-06-14 4:59 ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 18/27] drm/medaitek: add layer_nr " yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-14 5:02 ` CK Hu
2019-06-14 5:02 ` CK Hu
2019-06-14 5:02 ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 19/27] drm/mediatek: add function to background color input select for ovl/ovl_2l direct link yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-17 2:01 ` CK Hu
2019-06-17 2:01 ` CK Hu
2019-06-17 2:01 ` CK Hu
2019-06-05 11:42 ` [PATCH v3, 20/27] drm/mediatek: add background color input select function for ovl/ovl_2l yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-05 11:42 ` yongqiang.niu
2019-06-14 5:06 ` CK Hu
2019-06-14 5:06 ` CK Hu
2019-06-14 5:06 ` CK Hu
2019-06-05 11:43 ` [PATCH v3, 21/27] drm/mediatek: add ovl0/ovl_2l0 usecase yongqiang.niu
2019-06-05 11:43 ` yongqiang.niu
2019-06-05 11:43 ` yongqiang.niu
2019-06-05 11:43 ` [PATCH v3, 22/27] drm/mediatek: distinguish ovl and ovl_2l by layer_nr yongqiang.niu
2019-06-05 11:43 ` yongqiang.niu
2019-06-05 11:43 ` yongqiang.niu
2019-06-05 11:43 ` [PATCH v3, 23/27] drm/mediatek: add connection from ovl0 to ovl_2l0 yongqiang.niu
2019-06-05 11:43 ` yongqiang.niu
2019-06-05 11:43 ` yongqiang.niu
2019-06-05 11:43 ` [PATCH v3, 24/27] drm/mediatek: add connection from RDMA0 to COLOR0 yongqiang.niu
2019-06-05 11:43 ` yongqiang.niu
2019-06-05 11:43 ` yongqiang.niu
2019-06-05 11:43 ` [PATCH v3, 25/27] drm/mediatek: add connection from RDMA1 to DSI0 yongqiang.niu
2019-06-05 11:43 ` yongqiang.niu
2019-06-05 11:43 ` yongqiang.niu
2019-06-05 11:43 ` [PATCH v3, 26/27] drm/mediatek: add clock property check before get it yongqiang.niu
2019-06-05 11:43 ` yongqiang.niu
2019-06-05 11:43 ` yongqiang.niu
2019-06-17 3:06 ` CK Hu
2019-06-17 3:06 ` CK Hu
2019-06-17 3:06 ` CK Hu
2019-06-05 11:43 ` [PATCH v3, 27/27] drm/mediatek: add support for mediatek SOC MT8183 yongqiang.niu
2019-06-05 11:43 ` yongqiang.niu
2019-06-05 11:43 ` yongqiang.niu
2019-06-17 3:30 ` CK Hu
2019-06-17 3:30 ` CK Hu
2019-06-17 3:30 ` CK Hu
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