From: Manish Narani <manish.narani@xilinx.com> To: ulf.hansson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, adrian.hunter@intel.com, michal.simek@xilinx.com, jolly.shah@xilinx.com, nava.manne@xilinx.com, rajan.vaja@xilinx.com, manish.narani@xilinx.com Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, git@xilinx.com Subject: [PATCH v4 7/8] dt-bindings: mmc: arasan: Document 'xlnx,zynqmp-8.9a' controller Date: Tue, 29 Oct 2019 16:00:41 +0530 [thread overview] Message-ID: <1572345042-101207-7-git-send-email-manish.narani@xilinx.com> (raw) In-Reply-To: <1572345042-101207-1-git-send-email-manish.narani@xilinx.com> dd documentation for 'xlnx,zynqmp-8.9a' SDHCI controller and optional properties followed by example. Signed-off-by: Manish Narani <manish.narani@xilinx.com> Reviewed-by: Rob Herring <robh@kernel.org> --- .../devicetree/bindings/mmc/arasan,sdhci.txt | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt index c0f505b6cab5..22fba39b94c4 100644 --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt @@ -15,6 +15,9 @@ Required Properties: - "arasan,sdhci-5.1": generic Arasan SDHCI 5.1 PHY - "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1": rk3399 eMMC PHY For this device it is strongly suggested to include arasan,soc-ctl-syscon. + - "xlnx,zynqmp-8.9a": ZynqMP SDHCI 8.9a PHY + For this device it is strongly suggested to include clock-output-names and + #clock-cells. - "ti,am654-sdhci-5.1", "arasan,sdhci-5.1": TI AM654 MMC PHY Note: This binding has been deprecated and moved to [5]. - "intel,lgm-sdhci-5.1-emmc", "arasan,sdhci-5.1": Intel LGM eMMC PHY @@ -63,6 +66,10 @@ Optional Properties: 0 to 359 degrees. If not specified, driver will configure the default value defined for particular mode in it. + - xlnx,mio-bank: When specified, this will indicate the MIO bank number in + which the command and data lines are configured. If not specified, driver + will assume this as 0. + Example: sdhci@e0100000 { compatible = "arasan,sdhci-8.9a"; @@ -99,6 +106,18 @@ Example: #clock-cells = <0>; }; + sdhci: mmc@ff160000 { + compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; + interrupt-parent = <&gic>; + interrupts = <0 48 4>; + reg = <0x0 0xff160000 0x0 0x1000>; + clocks = <&clk200>, <&clk200>; + clock-names = "clk_xin", "clk_ahb"; + clock-output-names = "clk_out_sd0", "clk_in_sd0"; + #clock-cells = <1>; + arasan-clk-phase-sd-hs = <63>, <72>; + }; + emmc: sdhci@ec700000 { compatible = "intel,lgm-sdhci-5.1-emmc", "arasan,sdhci-5.1"; reg = <0xec700000 0x300>; -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Manish Narani <manish.narani@xilinx.com> To: ulf.hansson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, adrian.hunter@intel.com, michal.simek@xilinx.com, jolly.shah@xilinx.com, nava.manne@xilinx.com, rajan.vaja@xilinx.com, manish.narani@xilinx.com Cc: devicetree@vger.kernel.org, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, git@xilinx.com Subject: [PATCH v4 7/8] dt-bindings: mmc: arasan: Document 'xlnx, zynqmp-8.9a' controller Date: Tue, 29 Oct 2019 16:00:41 +0530 [thread overview] Message-ID: <1572345042-101207-7-git-send-email-manish.narani@xilinx.com> (raw) In-Reply-To: <1572345042-101207-1-git-send-email-manish.narani@xilinx.com> dd documentation for 'xlnx,zynqmp-8.9a' SDHCI controller and optional properties followed by example. Signed-off-by: Manish Narani <manish.narani@xilinx.com> Reviewed-by: Rob Herring <robh@kernel.org> --- .../devicetree/bindings/mmc/arasan,sdhci.txt | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt index c0f505b6cab5..22fba39b94c4 100644 --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt @@ -15,6 +15,9 @@ Required Properties: - "arasan,sdhci-5.1": generic Arasan SDHCI 5.1 PHY - "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1": rk3399 eMMC PHY For this device it is strongly suggested to include arasan,soc-ctl-syscon. + - "xlnx,zynqmp-8.9a": ZynqMP SDHCI 8.9a PHY + For this device it is strongly suggested to include clock-output-names and + #clock-cells. - "ti,am654-sdhci-5.1", "arasan,sdhci-5.1": TI AM654 MMC PHY Note: This binding has been deprecated and moved to [5]. - "intel,lgm-sdhci-5.1-emmc", "arasan,sdhci-5.1": Intel LGM eMMC PHY @@ -63,6 +66,10 @@ Optional Properties: 0 to 359 degrees. If not specified, driver will configure the default value defined for particular mode in it. + - xlnx,mio-bank: When specified, this will indicate the MIO bank number in + which the command and data lines are configured. If not specified, driver + will assume this as 0. + Example: sdhci@e0100000 { compatible = "arasan,sdhci-8.9a"; @@ -99,6 +106,18 @@ Example: #clock-cells = <0>; }; + sdhci: mmc@ff160000 { + compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; + interrupt-parent = <&gic>; + interrupts = <0 48 4>; + reg = <0x0 0xff160000 0x0 0x1000>; + clocks = <&clk200>, <&clk200>; + clock-names = "clk_xin", "clk_ahb"; + clock-output-names = "clk_out_sd0", "clk_in_sd0"; + #clock-cells = <1>; + arasan-clk-phase-sd-hs = <63>, <72>; + }; + emmc: sdhci@ec700000 { compatible = "intel,lgm-sdhci-5.1-emmc", "arasan,sdhci-5.1"; reg = <0xec700000 0x300>; -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-10-29 10:31 UTC|newest] Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-10-29 10:30 [PATCH v4 1/8] mmc: sdhci-of-arasan: Separate out clk related data to another structure Manish Narani 2019-10-29 10:30 ` Manish Narani 2019-10-29 10:30 ` Manish Narani 2019-10-29 10:30 ` [PATCH v4 2/8] dt-bindings: mmc: arasan: Update Documentation for the input clock Manish Narani 2019-10-29 10:30 ` Manish Narani 2019-10-29 18:40 ` Rob Herring 2019-10-29 18:40 ` Rob Herring 2019-10-29 18:40 ` Rob Herring 2019-10-31 8:52 ` Manish Narani 2019-10-31 8:52 ` Manish Narani 2019-10-31 8:52 ` Manish Narani 2019-10-29 10:30 ` [PATCH v4 3/8] mmc: sdhci-of-arasan: Add sampling clock for a phy to use Manish Narani 2019-10-29 10:30 ` Manish Narani 2019-10-29 10:30 ` [PATCH v4 4/8] dt-bindings: mmc: arasan: Add optional properties for Arasan SDHCI Manish Narani 2019-10-29 10:30 ` Manish Narani 2019-10-30 14:57 ` Ulf Hansson 2019-10-30 14:57 ` Ulf Hansson 2019-10-31 8:54 ` Manish Narani 2019-10-31 8:54 ` Manish Narani 2019-10-29 10:30 ` [PATCH v4 5/8] mmc: sdhci-of-arasan: Add support to set clock phase delays for SD Manish Narani 2019-10-29 10:30 ` Manish Narani 2019-10-29 10:30 ` [PATCH v4 6/8] firmware: xilinx: Add SDIO Tap Delay nodes Manish Narani 2019-10-29 10:30 ` Manish Narani 2019-10-29 10:30 ` Manish Narani [this message] 2019-10-29 10:30 ` [PATCH v4 7/8] dt-bindings: mmc: arasan: Document 'xlnx, zynqmp-8.9a' controller Manish Narani 2019-10-29 10:30 ` [PATCH v4 8/8] mmc: sdhci-of-arasan: Add support for ZynqMP Platform Tap Delays Setup Manish Narani 2019-10-29 10:30 ` Manish Narani
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