From: Patchwork <patchwork@emeril.freedesktop.org>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915/gt: Set unused mocs entry to follow PTE on tgl as on all others
Date: Tue, 12 Nov 2019 23:19:57 -0000 [thread overview]
Message-ID: <157360079726.31293.12793087881021217583@emeril.freedesktop.org> (raw)
In-Reply-To: <20191112223600.30993-1-chris@chris-wilson.co.uk>
== Series Details ==
Series: series starting with [1/4] drm/i915/gt: Set unused mocs entry to follow PTE on tgl as on all others
URL : https://patchwork.freedesktop.org/series/69382/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
3876af3a2069 drm/i915/gt: Set unused mocs entry to follow PTE on tgl as on all others
32b7d4b60407 drm/i915/gt: Tidy up debug-warns for the mocs control table
726603472df5 drm/i915/gt: Refactor mocs loops into single control macro
-:66: CHECK:MACRO_ARG_REUSE: Macro argument reuse 't' - possible side-effects?
#66: FILE: drivers/gpu/drm/i915/gt/intel_mocs.c:345:
+#define for_each_mocs(mocs, t, i) \
+ for (i = 0; \
+ i < (t)->n_entries ? (mocs = get_entry_control((t), i)), 1 : 0;\
+ i++)
-:66: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'i' - possible side-effects?
#66: FILE: drivers/gpu/drm/i915/gt/intel_mocs.c:345:
+#define for_each_mocs(mocs, t, i) \
+ for (i = 0; \
+ i < (t)->n_entries ? (mocs = get_entry_control((t), i)), 1 : 0;\
+ i++)
-:128: CHECK:MACRO_ARG_REUSE: Macro argument reuse 't' - possible side-effects?
#128: FILE: drivers/gpu/drm/i915/gt/intel_mocs.c:400:
+#define for_each_l3cc(l3cc, t, i) \
+ for (i = 0; \
+ i < ((t)->n_entries + 1) / 2 ? \
+ (l3cc = l3cc_combine(get_entry_l3cc((t), 2 * i), \
+ get_entry_l3cc((t), 2 * i + 1))), 1 : \
+ 0; \
+ i++)
-:128: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'i' - possible side-effects?
#128: FILE: drivers/gpu/drm/i915/gt/intel_mocs.c:400:
+#define for_each_l3cc(l3cc, t, i) \
+ for (i = 0; \
+ i < ((t)->n_entries + 1) / 2 ? \
+ (l3cc = l3cc_combine(get_entry_l3cc((t), 2 * i), \
+ get_entry_l3cc((t), 2 * i + 1))), 1 : \
+ 0; \
+ i++)
total: 0 errors, 0 warnings, 4 checks, 217 lines checked
eb1c77834cff drm/i915/selftests: Add coverage of mocs registers
-:30: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#30:
new file mode 100644
-:35: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1
#35: FILE: drivers/gpu/drm/i915/gt/selftest_mocs.c:1:
+/*
-:36: WARNING:SPDX_LICENSE_TAG: Misplaced SPDX-License-Identifier tag - use line 1 instead
#36: FILE: drivers/gpu/drm/i915/gt/selftest_mocs.c:2:
+ * SPDX-License-Identifier: MIT
total: 0 errors, 3 warnings, 0 checks, 433 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: Patchwork <patchwork@emeril.freedesktop.org>
To: "Chris Wilson" <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915/gt: Set unused mocs entry to follow PTE on tgl as on all others
Date: Tue, 12 Nov 2019 23:19:57 -0000 [thread overview]
Message-ID: <157360079726.31293.12793087881021217583@emeril.freedesktop.org> (raw)
Message-ID: <20191112231957.xJfjjqJGE5a3-auhxgyPaJ-bs3h_4KPVVmMKf800sQg@z> (raw)
In-Reply-To: <20191112223600.30993-1-chris@chris-wilson.co.uk>
== Series Details ==
Series: series starting with [1/4] drm/i915/gt: Set unused mocs entry to follow PTE on tgl as on all others
URL : https://patchwork.freedesktop.org/series/69382/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
3876af3a2069 drm/i915/gt: Set unused mocs entry to follow PTE on tgl as on all others
32b7d4b60407 drm/i915/gt: Tidy up debug-warns for the mocs control table
726603472df5 drm/i915/gt: Refactor mocs loops into single control macro
-:66: CHECK:MACRO_ARG_REUSE: Macro argument reuse 't' - possible side-effects?
#66: FILE: drivers/gpu/drm/i915/gt/intel_mocs.c:345:
+#define for_each_mocs(mocs, t, i) \
+ for (i = 0; \
+ i < (t)->n_entries ? (mocs = get_entry_control((t), i)), 1 : 0;\
+ i++)
-:66: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'i' - possible side-effects?
#66: FILE: drivers/gpu/drm/i915/gt/intel_mocs.c:345:
+#define for_each_mocs(mocs, t, i) \
+ for (i = 0; \
+ i < (t)->n_entries ? (mocs = get_entry_control((t), i)), 1 : 0;\
+ i++)
-:128: CHECK:MACRO_ARG_REUSE: Macro argument reuse 't' - possible side-effects?
#128: FILE: drivers/gpu/drm/i915/gt/intel_mocs.c:400:
+#define for_each_l3cc(l3cc, t, i) \
+ for (i = 0; \
+ i < ((t)->n_entries + 1) / 2 ? \
+ (l3cc = l3cc_combine(get_entry_l3cc((t), 2 * i), \
+ get_entry_l3cc((t), 2 * i + 1))), 1 : \
+ 0; \
+ i++)
-:128: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'i' - possible side-effects?
#128: FILE: drivers/gpu/drm/i915/gt/intel_mocs.c:400:
+#define for_each_l3cc(l3cc, t, i) \
+ for (i = 0; \
+ i < ((t)->n_entries + 1) / 2 ? \
+ (l3cc = l3cc_combine(get_entry_l3cc((t), 2 * i), \
+ get_entry_l3cc((t), 2 * i + 1))), 1 : \
+ 0; \
+ i++)
total: 0 errors, 0 warnings, 4 checks, 217 lines checked
eb1c77834cff drm/i915/selftests: Add coverage of mocs registers
-:30: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#30:
new file mode 100644
-:35: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1
#35: FILE: drivers/gpu/drm/i915/gt/selftest_mocs.c:1:
+/*
-:36: WARNING:SPDX_LICENSE_TAG: Misplaced SPDX-License-Identifier tag - use line 1 instead
#36: FILE: drivers/gpu/drm/i915/gt/selftest_mocs.c:2:
+ * SPDX-License-Identifier: MIT
total: 0 errors, 3 warnings, 0 checks, 433 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2019-11-12 23:19 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-12 22:35 [PATCH 1/4] drm/i915/gt: Set unused mocs entry to follow PTE on tgl as on all others Chris Wilson
2019-11-12 22:35 ` [Intel-gfx] " Chris Wilson
2019-11-12 22:35 ` [PATCH 2/4] drm/i915/gt: Tidy up debug-warns for the mocs control table Chris Wilson
2019-11-12 22:35 ` [Intel-gfx] " Chris Wilson
2019-11-14 17:33 ` Mika Kuoppala
2019-11-14 17:33 ` [Intel-gfx] " Mika Kuoppala
2019-11-12 22:35 ` [PATCH 3/4] drm/i915/gt: Refactor mocs loops into single control macro Chris Wilson
2019-11-12 22:35 ` [Intel-gfx] " Chris Wilson
2019-11-14 17:35 ` Mika Kuoppala
2019-11-14 17:35 ` [Intel-gfx] " Mika Kuoppala
2019-11-12 22:36 ` [PATCH 4/4] drm/i915/selftests: Add coverage of mocs registers Chris Wilson
2019-11-12 22:36 ` [Intel-gfx] " Chris Wilson
2019-11-12 23:19 ` Patchwork [this message]
2019-11-12 23:19 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915/gt: Set unused mocs entry to follow PTE on tgl as on all others Patchwork
2019-11-12 23:48 ` ✓ Fi.CI.BAT: success " Patchwork
2019-11-12 23:48 ` [Intel-gfx] " Patchwork
2019-11-13 11:16 ` ✓ Fi.CI.IGT: " Patchwork
2019-11-13 11:16 ` [Intel-gfx] " Patchwork
2019-11-13 16:03 ` [PATCH 1/4] " Mika Kuoppala
2019-11-13 16:03 ` [Intel-gfx] " Mika Kuoppala
2019-11-14 17:33 ` Mika Kuoppala
2019-11-14 17:33 ` [Intel-gfx] " Mika Kuoppala
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