From: Piotr Sroka <piotrs@cadence.com> To: unlisted-recipients:; (no To-header on input) Cc: Kazuhiro Kasai <kasai.kazuhiro@socionext.com>, Piotr Sroka <piotrs@cadence.com>, Miquel Raynal <miquel.raynal@bootlin.com>, Richard Weinberger <richard@nod.at>, David Woodhouse <dwmw2@infradead.org>, Brian Norris <computersforpeace@gmail.com>, Marek Vasut <marek.vasut@gmail.com>, Vignesh Raghavendra <vigneshr@ti.com>, <linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org> Subject: [PATCH 1/4] mtd: rawnand: cadence: get meta data size from registers Date: Mon, 10 Feb 2020 10:55:25 +0100 [thread overview] Message-ID: <1581328530-29966-1-git-send-email-piotrs@cadence.com> (raw) Add checking size of BCH meta data size in capabilities registers instead of using fixed value. BCH meta data is used to keep data from nand flash oob area. Signed-off-by: Piotr Sroka <piotrs@cadence.com> --- .../mtd/nand/raw/cadence-nand-controller.c | 21 ++++++++++++------- 1 file changed, 14 insertions(+), 7 deletions(-) diff --git a/drivers/mtd/nand/raw/cadence-nand-controller.c b/drivers/mtd/nand/raw/cadence-nand-controller.c index f6c7102a1e32..5063a8b493a4 100644 --- a/drivers/mtd/nand/raw/cadence-nand-controller.c +++ b/drivers/mtd/nand/raw/cadence-nand-controller.c @@ -30,7 +30,6 @@ * Generic mode is used for executing rest of commands. */ -#define MAX_OOB_SIZE_PER_SECTOR 32 #define MAX_ADDRESS_CYC 6 #define MAX_ERASE_ADDRESS_CYC 3 #define MAX_DATA_SIZE 0xFFFC @@ -190,6 +189,7 @@ /* BCH Engine identification register 3. */ #define BCH_CFG_3 0x844 +#define BCH_CFG_3_METADATA_SIZE GENMASK(23, 16) /* Ready/Busy# line status. */ #define RBN_SETINGS 0x1004 @@ -499,6 +499,7 @@ struct cdns_nand_ctrl { unsigned long assigned_cs; struct list_head chips; + u8 bch_metadata_size; }; struct cdns_nand_chip { @@ -1077,6 +1078,14 @@ static int cadence_nand_read_bch_caps(struct cdns_nand_ctrl *cdns_ctrl) int max_step_size = 0, nstrengths, i; u32 reg; + reg = readl_relaxed(cdns_ctrl->reg + BCH_CFG_3); + cdns_ctrl->bch_metadata_size = FIELD_GET(BCH_CFG_3_METADATA_SIZE, reg); + if (cdns_ctrl->bch_metadata_size < 4) { + dev_err(cdns_ctrl->dev, + "Driver needs at least 4 bytes of BCH meta data\n"); + return -EIO; + } + reg = readl_relaxed(cdns_ctrl->reg + BCH_CFG_0); cdns_ctrl->ecc_strengths[0] = FIELD_GET(BCH_CFG_0_CORR_CAP_0, reg); cdns_ctrl->ecc_strengths[1] = FIELD_GET(BCH_CFG_0_CORR_CAP_1, reg); @@ -1170,7 +1179,8 @@ static int cadence_nand_hw_init(struct cdns_nand_ctrl *cdns_ctrl) writel_relaxed(0xFFFFFFFF, cdns_ctrl->reg + INTR_STATUS); cadence_nand_get_caps(cdns_ctrl); - cadence_nand_read_bch_caps(cdns_ctrl); + if (cadence_nand_read_bch_caps(cdns_ctrl)) + return -EIO; /* * Set IO width access to 8. @@ -2587,7 +2597,6 @@ int cadence_nand_attach_chip(struct nand_chip *chip) struct cdns_nand_chip *cdns_chip = to_cdns_nand_chip(chip); u32 ecc_size = cdns_chip->sector_count * chip->ecc.bytes; struct mtd_info *mtd = nand_to_mtd(chip); - u32 max_oob_data_size; int ret; if (chip->options & NAND_BUSWIDTH_16) { @@ -2628,10 +2637,8 @@ int cadence_nand_attach_chip(struct nand_chip *chip) cdns_chip->avail_oob_size = mtd->oobsize - ecc_size; - max_oob_data_size = MAX_OOB_SIZE_PER_SECTOR; - - if (cdns_chip->avail_oob_size > max_oob_data_size) - cdns_chip->avail_oob_size = max_oob_data_size; + if (cdns_chip->avail_oob_size > cdns_ctrl->bch_metadata_size) + cdns_chip->avail_oob_size = cdns_ctrl->bch_metadata_size; if ((cdns_chip->avail_oob_size + cdns_chip->bbm_len + ecc_size) > mtd->oobsize) -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Piotr Sroka <piotrs@cadence.com> Cc: Vignesh Raghavendra <vigneshr@ti.com>, Richard Weinberger <richard@nod.at>, linux-kernel@vger.kernel.org, Marek Vasut <marek.vasut@gmail.com>, linux-mtd@lists.infradead.org, Miquel Raynal <miquel.raynal@bootlin.com>, Brian Norris <computersforpeace@gmail.com>, David Woodhouse <dwmw2@infradead.org>, Kazuhiro Kasai <kasai.kazuhiro@socionext.com>, Piotr Sroka <piotrs@cadence.com> Subject: [PATCH 1/4] mtd: rawnand: cadence: get meta data size from registers Date: Mon, 10 Feb 2020 10:55:25 +0100 [thread overview] Message-ID: <1581328530-29966-1-git-send-email-piotrs@cadence.com> (raw) Add checking size of BCH meta data size in capabilities registers instead of using fixed value. BCH meta data is used to keep data from nand flash oob area. Signed-off-by: Piotr Sroka <piotrs@cadence.com> --- .../mtd/nand/raw/cadence-nand-controller.c | 21 ++++++++++++------- 1 file changed, 14 insertions(+), 7 deletions(-) diff --git a/drivers/mtd/nand/raw/cadence-nand-controller.c b/drivers/mtd/nand/raw/cadence-nand-controller.c index f6c7102a1e32..5063a8b493a4 100644 --- a/drivers/mtd/nand/raw/cadence-nand-controller.c +++ b/drivers/mtd/nand/raw/cadence-nand-controller.c @@ -30,7 +30,6 @@ * Generic mode is used for executing rest of commands. */ -#define MAX_OOB_SIZE_PER_SECTOR 32 #define MAX_ADDRESS_CYC 6 #define MAX_ERASE_ADDRESS_CYC 3 #define MAX_DATA_SIZE 0xFFFC @@ -190,6 +189,7 @@ /* BCH Engine identification register 3. */ #define BCH_CFG_3 0x844 +#define BCH_CFG_3_METADATA_SIZE GENMASK(23, 16) /* Ready/Busy# line status. */ #define RBN_SETINGS 0x1004 @@ -499,6 +499,7 @@ struct cdns_nand_ctrl { unsigned long assigned_cs; struct list_head chips; + u8 bch_metadata_size; }; struct cdns_nand_chip { @@ -1077,6 +1078,14 @@ static int cadence_nand_read_bch_caps(struct cdns_nand_ctrl *cdns_ctrl) int max_step_size = 0, nstrengths, i; u32 reg; + reg = readl_relaxed(cdns_ctrl->reg + BCH_CFG_3); + cdns_ctrl->bch_metadata_size = FIELD_GET(BCH_CFG_3_METADATA_SIZE, reg); + if (cdns_ctrl->bch_metadata_size < 4) { + dev_err(cdns_ctrl->dev, + "Driver needs at least 4 bytes of BCH meta data\n"); + return -EIO; + } + reg = readl_relaxed(cdns_ctrl->reg + BCH_CFG_0); cdns_ctrl->ecc_strengths[0] = FIELD_GET(BCH_CFG_0_CORR_CAP_0, reg); cdns_ctrl->ecc_strengths[1] = FIELD_GET(BCH_CFG_0_CORR_CAP_1, reg); @@ -1170,7 +1179,8 @@ static int cadence_nand_hw_init(struct cdns_nand_ctrl *cdns_ctrl) writel_relaxed(0xFFFFFFFF, cdns_ctrl->reg + INTR_STATUS); cadence_nand_get_caps(cdns_ctrl); - cadence_nand_read_bch_caps(cdns_ctrl); + if (cadence_nand_read_bch_caps(cdns_ctrl)) + return -EIO; /* * Set IO width access to 8. @@ -2587,7 +2597,6 @@ int cadence_nand_attach_chip(struct nand_chip *chip) struct cdns_nand_chip *cdns_chip = to_cdns_nand_chip(chip); u32 ecc_size = cdns_chip->sector_count * chip->ecc.bytes; struct mtd_info *mtd = nand_to_mtd(chip); - u32 max_oob_data_size; int ret; if (chip->options & NAND_BUSWIDTH_16) { @@ -2628,10 +2637,8 @@ int cadence_nand_attach_chip(struct nand_chip *chip) cdns_chip->avail_oob_size = mtd->oobsize - ecc_size; - max_oob_data_size = MAX_OOB_SIZE_PER_SECTOR; - - if (cdns_chip->avail_oob_size > max_oob_data_size) - cdns_chip->avail_oob_size = max_oob_data_size; + if (cdns_chip->avail_oob_size > cdns_ctrl->bch_metadata_size) + cdns_chip->avail_oob_size = cdns_ctrl->bch_metadata_size; if ((cdns_chip->avail_oob_size + cdns_chip->bbm_len + ecc_size) > mtd->oobsize) -- 2.17.1 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
next reply other threads:[~2020-02-10 9:57 UTC|newest] Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-02-10 9:55 Piotr Sroka [this message] 2020-02-10 9:55 ` [PATCH 1/4] mtd: rawnand: cadence: get meta data size from registers Piotr Sroka 2020-02-10 9:55 ` [PATCH 2/4] mtd: rawnand: cadence: fix calculating avaialble oob size Piotr Sroka 2020-02-10 9:55 ` Piotr Sroka 2020-02-18 10:45 ` Miquel Raynal 2020-02-18 10:45 ` Miquel Raynal 2020-03-10 18:29 ` Miquel Raynal 2020-03-10 18:29 ` Miquel Raynal 2020-03-11 7:17 ` Miquel Raynal 2020-03-11 7:17 ` Miquel Raynal 2020-02-10 9:55 ` [PATCH 3/4] mtd: rawnand: cadence: change bad block marker size Piotr Sroka 2020-02-10 9:55 ` Piotr Sroka 2020-02-18 10:47 ` Miquel Raynal 2020-02-18 10:47 ` Miquel Raynal 2020-03-10 18:29 ` Miquel Raynal 2020-03-10 18:29 ` Miquel Raynal 2020-02-10 9:55 ` [PATCH 4/4] mtd: rawnand: cadence: reinit complete before execute command Piotr Sroka 2020-02-10 9:55 ` Piotr Sroka 2020-02-18 10:48 ` Miquel Raynal 2020-02-18 10:48 ` Miquel Raynal 2020-03-10 18:29 ` Miquel Raynal 2020-03-10 18:29 ` Miquel Raynal 2020-03-10 18:29 ` [PATCH 1/4] mtd: rawnand: cadence: get meta data size from registers Miquel Raynal 2020-03-10 18:29 ` Miquel Raynal
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