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From: Patchwork <patchwork@emeril.freedesktop.org>
To: "Matthew Auld" <matthew.auld@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for DG1 + LMEM enabling
Date: Fri, 27 Nov 2020 14:57:59 -0000	[thread overview]
Message-ID: <160648907956.26782.5322815191973299373@emeril.freedesktop.org> (raw)
In-Reply-To: <20201127120718.454037-1-matthew.auld@intel.com>

== Series Details ==

Series: DG1 + LMEM enabling
URL   : https://patchwork.freedesktop.org/series/84344/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
ecc99f864651 drm/i915/selftest: also consider non-contiguous objects
3c1e72a3ebbe drm/i915/selftest: assert we get 2M GTT pages
-:21: CHECK:LINE_SPACING: Please don't use multiple blank lines
#21: FILE: drivers/gpu/drm/i915/gem/selftests/huge_pages.c:371:
 
+

-:41: CHECK:LINE_SPACING: Please don't use multiple blank lines
#41: FILE: drivers/gpu/drm/i915/gem/selftests/huge_pages.c:391:
+
+

total: 0 errors, 0 warnings, 2 checks, 27 lines checked
37a823615518 drm/i915/selftest: handle local-memory in perf_memcpy
5e4d77873cee drm/i915/gt: Move move context layout registers and offsets to lrc_reg.h
ec25b9b7e7bf drm/i915/gt: Rename lrc.c to execlists_submission.c
-:79: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#79: 
rename from drivers/gpu/drm/i915/gt/intel_lrc.c

total: 0 errors, 1 warnings, 0 checks, 177 lines checked
eb9b76584a33 drm/i915: split gen8+ flush and bb_start emission functions to their own file
-:31: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#31: 
new file mode 100644

-:220: WARNING:EMBEDDED_FUNCTION_NAME: Prefer using '"%s...", __func__' to using 'aux_inv_reg', this function's name, in a string
#220: FILE: drivers/gpu/drm/i915/gt/gen8_engine_cs.c:185:
+	GEM_BUG_ON("unknown aux_inv_reg\n");

-:428: CHECK:LINE_SPACING: Please don't use multiple blank lines
#428: FILE: drivers/gpu/drm/i915/gt/gen8_engine_cs.c:393:
+
+

total: 0 errors, 2 warnings, 1 checks, 829 lines checked
4d38888a6e1b drm/i915: split wa_bb code to its own file
-:29: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#29: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 701 lines checked
151185a3fc12 HAX drm/i915: Work around the selftest timeline lock splat workaround
450f75d41b63 drm/i915: Introduce drm_i915_lock_isolated
-:25: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'obj' - possible side-effects?
#25: FILE: drivers/gpu/drm/i915/gem/i915_gem_object.h:110:
+#define object_is_isolated(obj)					\
+	(!IS_ENABLED(CONFIG_LOCKDEP) ||				\
+	 ((kref_read(&obj->base.refcount) == 0) ||		\
+	  ((kref_read(&obj->base.refcount) == 1) &&		\
+	   list_empty_careful(&obj->mm.link) &&			\
+	   list_empty_careful(&obj->vma.list))))

-:25: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'obj' may be better as '(obj)' to avoid precedence issues
#25: FILE: drivers/gpu/drm/i915/gem/i915_gem_object.h:110:
+#define object_is_isolated(obj)					\
+	(!IS_ENABLED(CONFIG_LOCKDEP) ||				\
+	 ((kref_read(&obj->base.refcount) == 0) ||		\
+	  ((kref_read(&obj->base.refcount) == 1) &&		\
+	   list_empty_careful(&obj->mm.link) &&			\
+	   list_empty_careful(&obj->vma.list))))

total: 0 errors, 0 warnings, 2 checks, 28 lines checked
dcd32ce75f16 drm/i915: Lock hwsp objects isolated for pinning at create time
2e77f388c53a drm/i915: Pin timeline map after first timeline pin, v5.
4277aa6901de drm/i915: Move cmd parser pinning to execbuffer
1ac931e19fb2 drm/i915: Add missing -EDEADLK handling to execbuf pinning, v2.
-:55: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#55: FILE: drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:451:
+		err = i915_vma_pin_ww(vma, &eb->ww,
 					     entry->pad_to_size,

total: 0 errors, 0 warnings, 1 checks, 75 lines checked
52b472892a57 drm/i915: Ensure we hold the object mutex in pin correctly v2
67281c042a1c drm/i915: Add gem object locking to madvise.
d6f3a6ff8ec5 drm/i915: Move HAS_STRUCT_PAGE to obj->flags
-:110: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned'
#110: FILE: drivers/gpu/drm/i915/gem/i915_gem_object.c:63:
+			  struct lock_class_key *key, unsigned flags)

-:133: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned'
#133: FILE: drivers/gpu/drm/i915/gem/i915_gem_object.h:27:
+			  unsigned alloc_flags);

total: 0 errors, 2 warnings, 0 checks, 348 lines checked
f5fd74ff0eb5 drm/i915: Rework struct phys attachment handling
f2139104bdcb drm/i915: Convert i915_gem_object_attach_phys() to ww locking, v2.
8625ed6419dc drm/i915: make lockdep slightly happier about execbuf.
1eaf989afae0 drm/i915: Disable userptr pread/pwrite support.
eae3f2ab3922 drm/i915: No longer allow exporting userptr through dma-buf
b78c8c467a1f drm/i915: Reject more ioctls for userptr
cccfa9edcf51 drm/i915: Reject UNSYNCHRONIZED for userptr, v2.
154de4c68c26 drm/i915: Make compilation of userptr code depend on MMU_NOTIFIER.
7523423fd46d drm/i915: Fix userptr so we do not have to worry about obj->mm.lock, v5.
-:281: WARNING:LONG_LINE: line length of 121 exceeds 100 columns
#281: FILE: drivers/gpu/drm/i915/gem/i915_gem_object.h:578:
+static inline int i915_gem_object_userptr_submit_init(struct drm_i915_gem_object *obj) { GEM_BUG_ON(1); return -ENODEV; }

-:282: WARNING:LONG_LINE: line length of 121 exceeds 100 columns
#282: FILE: drivers/gpu/drm/i915/gem/i915_gem_object.h:579:
+static inline int i915_gem_object_userptr_submit_done(struct drm_i915_gem_object *obj) { GEM_BUG_ON(1); return -ENODEV; }

-:283: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#283: FILE: drivers/gpu/drm/i915/gem/i915_gem_object.h:580:
+static inline void i915_gem_object_userptr_submit_fini(struct drm_i915_gem_object *obj) { GEM_BUG_ON(1); }

-:341: WARNING:SPDX_LICENSE_TAG: Misplaced SPDX-License-Identifier tag - use line 1 instead
#341: FILE: drivers/gpu/drm/i915/gem/i915_gem_userptr.c:2:
  * SPDX-License-Identifier: MIT

-:345: WARNING:BLOCK_COMMENT_STYLE: Block comments should align the * on each line
#345: FILE: drivers/gpu/drm/i915/gem/i915_gem_userptr.c:6:
+ *
+  * Based on amdgpu_mn, which bears the following notice:

-:346: WARNING:BLOCK_COMMENT_STYLE: Block comments should align the * on each line
#346: FILE: drivers/gpu/drm/i915/gem/i915_gem_userptr.c:7:
+  * Based on amdgpu_mn, which bears the following notice:
+ *

-:459: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#459: FILE: drivers/gpu/drm/i915/gem/i915_gem_userptr.c:63:
+	struct drm_i915_gem_object *obj = container_of(mni, struct drm_i915_gem_object, userptr.notifier);

-:1113: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should be avoided
#1113: FILE: drivers/gpu/drm/i915/gem/i915_gem_userptr.c:294:
+	pinned = ret = 0;

-:1128: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#1128: FILE: drivers/gpu/drm/i915/gem/i915_gem_userptr.c:309:
+	if (mmu_interval_read_retry(&obj->userptr.notifier,
+		!obj->userptr.page_ref ? notifier_seq :

-:1249: CHECK:UNCOMMENTED_DEFINITION: spinlock_t definition without comment
#1249: FILE: drivers/gpu/drm/i915/i915_drv.h:597:
+	spinlock_t notifier_lock;

total: 0 errors, 7 warnings, 3 checks, 1201 lines checked
017b310c32a3 drm/i915: Flatten obj->mm.lock
36ad03b9459e drm/i915: Populate logical context during first pin.
-:180: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#180: FILE: drivers/gpu/drm/i915/gt/intel_execlists_submission.c:4848:
+virtual_context_pre_pin(struct intel_context *ce,
+			  struct i915_gem_ww_ctx *ww, void **vaddr)

total: 0 errors, 0 warnings, 1 checks, 169 lines checked
34b1aa8c9124 drm/i915: Make ring submission compatible with obj->mm.lock removal, v2.
9d0185cb4582 drm/i915: Handle ww locking in init_status_page
d52ff035dcdf drm/i915: Rework clflush to work correctly without obj->mm.lock.
82c19c566326 drm/i915: Pass ww ctx to intel_pin_to_display_plane
3e82ce86e8a8 drm/i915: Add object locking to vm_fault_cpu
776c4968310c drm/i915: Move pinning to inside engine_wa_list_verify()
-:57: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#57: FILE: drivers/gpu/drm/i915/gt/intel_workarounds.c:2209:
+	err = i915_vma_pin_ww(vma, &ww, 0, 0,
+			   i915_vma_is_ggtt(vma) ? PIN_GLOBAL : PIN_USER);

total: 0 errors, 0 warnings, 1 checks, 109 lines checked
ace7a49a44b4 drm/i915: Take reservation lock around i915_vma_pin.
c514ed4de29a drm/i915: Make intel_init_workaround_bb more compatible with ww locking.
-:113: CHECK:LINE_SPACING: Please don't use multiple blank lines
#113: FILE: drivers/gpu/drm/i915/gt/intel_engine_workaround_bb.c:360:
 
+

total: 0 errors, 0 warnings, 1 checks, 92 lines checked
c09d61d0c59a drm/i915: Make __engine_unpark() compatible with ww locking v2
-:11: WARNING:REPEATED_WORD: Possible repeated word: 'many'
#11: 
many many places where rpm is used, I chose the safest option

total: 0 errors, 1 warnings, 0 checks, 16 lines checked
8e69aa4f0efd drm/i915: Take obj lock around set_domain ioctl
99a95058dcdb drm/i915: Defer pin calls in buffer pool until first use by caller.
ce9f6c46fc3a drm/i915: Fix pread/pwrite to work with new locking rules.
-:32: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#32: 
deleted file mode 100644

total: 0 errors, 1 warnings, 0 checks, 359 lines checked
c6c0c64d6026 drm/i915: Fix workarounds selftest, part 1
79bd0897399a drm/i915: Prepare for obj->mm.lock removal
52f9f5f31a0f drm/i915: Add igt_spinner_pin() to allow for ww locking around spinner.
eb6fcc0954ff drm/i915: Add ww locking around vm_access()
cd47b7ad5405 drm/i915: Increase ww locking for perf.
244dae79052a drm/i915: Lock ww in ucode objects correctly
333090d025a8 drm/i915: Add ww locking to dma-buf ops.
09740eb15ae0 drm/i915: Add missing ww lock in intel_dsb_prepare.
0cd52e7ebb96 drm/i915: Fix ww locking in shmem_create_from_object
fae9a34de3ad drm/i915: Use a single page table lock for each gtt.
-:112: WARNING:UNNECESSARY_ELSE: else is not generally useful after a break or return
#112: FILE: drivers/gpu/drm/i915/gt/intel_gtt.c:85:
+		return i915_gem_object_lock(vm->scratch[0], ww);
+	} else {

total: 0 errors, 1 warnings, 0 checks, 153 lines checked
f95d0fb66807 drm/i915/selftests: Prepare huge_pages testcases for obj->mm.lock removal.
2c146f16bb0f drm/i915/selftests: Prepare client blit for obj->mm.lock removal.
639fcd5ea986 drm/i915/selftests: Prepare coherency tests for obj->mm.lock removal.
57c19694c266 drm/i915/selftests: Prepare context tests for obj->mm.lock removal.
c25eb6821a19 drm/i915/selftests: Prepare dma-buf tests for obj->mm.lock removal.
3f28d8d73a33 drm/i915/selftests: Prepare execbuf tests for obj->mm.lock removal.
89afabcc408e drm/i915/selftests: Prepare mman testcases for obj->mm.lock removal.
ba084a771fd9 drm/i915/selftests: Prepare object tests for obj->mm.lock removal.
4a4950747bae drm/i915/selftests: Prepare object blit tests for obj->mm.lock removal.
5a39c68fb094 drm/i915/selftests: Prepare igt_gem_utils for obj->mm.lock removal
8fec33b51cda drm/i915/selftests: Prepare context selftest for obj->mm.lock removal
795a67bb1fbf drm/i915/selftests: Prepare hangcheck for obj->mm.lock removal
a94b8d1885c2 drm/i915/selftests: Prepare execlists for obj->mm.lock removal
-:159: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#159: FILE: drivers/gpu/drm/i915/gt/selftest_execlists.c:5857:
+	lrc = i915_gem_object_pin_map_unlocked(ce->state->obj,
 				      i915_coherent_map_type(engine->i915));

total: 0 errors, 0 warnings, 1 checks, 130 lines checked
602f787839eb drm/i915/selftests: Prepare mocs tests for obj->mm.lock removal
dd71228759cc drm/i915/selftests: Prepare ring submission for obj->mm.lock removal
37021ba46236 drm/i915/selftests: Prepare timeline tests for obj->mm.lock removal
27d90930aa00 drm/i915/selftests: Prepare i915_request tests for obj->mm.lock removal
f5a8a22004f2 drm/i915/selftests: Prepare memory region tests for obj->mm.lock removal
285510611ec9 drm/i915/selftests: Prepare cs engine tests for obj->mm.lock removal
e83d2d2ded23 drm/i915/selftests: Prepare gtt tests for obj->mm.lock removal
84a9ca7ba448 drm/i915: Finally remove obj->mm.lock.
fcf207bef4c6 drm/i915: Keep userpointer bindings if seqcount is unchanged, v2.
9d27adfe1cd7 drm/i915: Avoid some false positives in assert_object_held()
-:27: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'obj' - possible side-effects?
#27: FILE: drivers/gpu/drm/i915/gem/i915_gem_object.h:121:
+#define assert_object_held(obj) do {					\
+		dma_resv_assert_held((obj)->base.resv);			\
+		WARN_ON(!ww_mutex_is_locked(&(obj)->base.resv->lock)); \
+	} while (0)

total: 0 errors, 0 warnings, 1 checks, 15 lines checked
d58138a3962d drm/i915: Reference contending lock objects
ad0364e0969c drm/i915: Break out dma_resv ww locking utilities to separate files
-:144: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#144: 
new file mode 100644

-:169: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#169: FILE: drivers/gpu/drm/i915/i915_gem_ww.c:21:
+	while ((obj = list_first_entry_or_null(&ww->obj_list, struct drm_i915_gem_object, obj_link))) {

total: 0 errors, 2 warnings, 0 checks, 189 lines checked
94aeb7363b28 drm/i915: Introduce a for_i915_gem_ww(){}
-:56: CHECK:MACRO_ARG_REUSE: Macro argument reuse '_ww' - possible side-effects?
#56: FILE: drivers/gpu/drm/i915/i915_gem_ww.h:46:
+#define for_i915_gem_ww(_ww, _err, _intr)			\
+	for (__i915_gem_ww_init(_ww, _intr); (_ww)->loop;	\
+	     _err = __i915_gem_ww_fini(_ww, _err))

-:56: CHECK:MACRO_ARG_REUSE: Macro argument reuse '_err' - possible side-effects?
#56: FILE: drivers/gpu/drm/i915/i915_gem_ww.h:46:
+#define for_i915_gem_ww(_ww, _err, _intr)			\
+	for (__i915_gem_ww_init(_ww, _intr); (_ww)->loop;	\
+	     _err = __i915_gem_ww_fini(_ww, _err))

total: 0 errors, 0 warnings, 2 checks, 41 lines checked
f9f3ea170515 drm/i915: Untangle the vma pages_mutex
f5559b991383 drm/i915/fbdev: Use lmem physical addresses for fb_mmap() on discrete
fd9e9f4efbc5 drm/i915: Return error value when bo not in LMEM for discrete
7160b8cb229a drm/i915/dmabuf: Disallow LMEM objects from dma-buf
-:35: WARNING:ENOTSUPP: ENOTSUPP is not a SUSV4 error code, prefer EOPNOTSUPP
#35: FILE: drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c:30:
+		ret = -ENOTSUPP;

-:49: WARNING:ENOTSUPP: ENOTSUPP is not a SUSV4 error code, prefer EOPNOTSUPP
#49: FILE: drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c:260:
+			return ERR_PTR(-ENOTSUPP);

total: 0 errors, 2 warnings, 0 checks, 28 lines checked
425ac61c78e0 drm/i915/lmem: Fail driver init if LMEM training failed
638e59094088 HAX drm/i915/lmem: support CPU relocations
-:83: CHECK:SPACING: No space is necessary after a cast
#83: FILE: drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:1204:
+		io_mapping_unmap_atomic((void __force __iomem *) unmask_page(cache->vaddr));

total: 0 errors, 0 warnings, 1 checks, 119 lines checked
7c7b8d398ff6 HAX drm/i915/lmem: support pread and pwrite
36db22233ecf drm/i915: Update the helper to set correct mapping
-:14: WARNING:BAD_SIGN_OFF: Duplicate signature
#14: 
Cc: Matthew Auld <matthew.auld@intel.com>

-:53: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#53: FILE: drivers/gpu/drm/i915/gt/intel_execlists_submission.c:3538:
+					 i915_coherent_map_type(ce->engine->i915, ce->state->obj, false) |

-:69: CHECK:BRACES: Unbalanced braces around else statement
#69: FILE: drivers/gpu/drm/i915/gt/intel_ring.c:54:
+	else {

total: 0 errors, 2 warnings, 1 checks, 159 lines checked
3db87b4f64ed drm/i915: introduce kernel blitter_context
4bb2bb3961aa drm/i915/region: support basic eviction
1e5ec74bb7b8 drm/i915: Add blit functions that can be called from within a WW transaction
-:79: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#79: FILE: drivers/gpu/drm/i915/gem/i915_gem_object_blt.c:219:
+int i915_gem_object_fill_blt(struct drm_i915_gem_object *obj,
+				struct intel_context *ce,

-:104: CHECK:LINE_SPACING: Please don't use multiple blank lines
#104: FILE: drivers/gpu/drm/i915/gem/i915_gem_object_blt.c:243:
 
+

total: 0 errors, 0 warnings, 2 checks, 189 lines checked
ccd239f2c053 drm/i915: Delay publishing objects on the eviction lists
bd78bfa4452f drm/i915: support basic object migration
-:14: WARNING:BAD_SIGN_OFF: Duplicate signature
#14: 
Cc: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>

-:172: CHECK:BRACES: braces {} should be used on all arms of this statement
#172: FILE: drivers/gpu/drm/i915/gem/i915_gem_object.c:408:
+	if (obj->base.filp)
[...]
+	else if (donor->base.filp) {
[...]

total: 0 errors, 1 warnings, 1 checks, 404 lines checked
87518556758f drm/i915/dg1: Fix occasional migration error
985600b152ca drm/i915/query: Expose memory regions through the query uAPI
-:180: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#180: FILE: drivers/gpu/drm/i915/intel_memory_region.c:10:
+       [INTEL_REGION_SMEM] = {$

-:181: ERROR:CODE_INDENT: code indent should use tabs where possible
#181: FILE: drivers/gpu/drm/i915/intel_memory_region.c:11:
+               .class = INTEL_MEMORY_SYSTEM,$

-:181: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#181: FILE: drivers/gpu/drm/i915/intel_memory_region.c:11:
+               .class = INTEL_MEMORY_SYSTEM,$

-:182: ERROR:CODE_INDENT: code indent should use tabs where possible
#182: FILE: drivers/gpu/drm/i915/intel_memory_region.c:12:
+               .instance = 0,$

-:182: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#182: FILE: drivers/gpu/drm/i915/intel_memory_region.c:12:
+               .instance = 0,$

-:183: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#183: FILE: drivers/gpu/drm/i915/intel_memory_region.c:13:
+       },$

-:184: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#184: FILE: drivers/gpu/drm/i915/intel_memory_region.c:14:
+       [INTEL_REGION_LMEM] = {$

-:185: ERROR:CODE_INDENT: code indent should use tabs where possible
#185: FILE: drivers/gpu/drm/i915/intel_memory_region.c:15:
+               .class = INTEL_MEMORY_LOCAL,$

-:185: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#185: FILE: drivers/gpu/drm/i915/intel_memory_region.c:15:
+               .class = INTEL_MEMORY_LOCAL,$

-:186: ERROR:CODE_INDENT: code indent should use tabs where possible
#186: FILE: drivers/gpu/drm/i915/intel_memory_region.c:16:
+               .instance = 0,$

-:186: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#186: FILE: drivers/gpu/drm/i915/intel_memory_region.c:16:
+               .instance = 0,$

-:187: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#187: FILE: drivers/gpu/drm/i915/intel_memory_region.c:17:
+       },$

-:188: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#188: FILE: drivers/gpu/drm/i915/intel_memory_region.c:18:
+       [INTEL_REGION_STOLEN_SMEM] = {$

-:189: ERROR:CODE_INDENT: code indent should use tabs where possible
#189: FILE: drivers/gpu/drm/i915/intel_memory_region.c:19:
+               .class = INTEL_MEMORY_STOLEN_SYSTEM,$

-:189: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#189: FILE: drivers/gpu/drm/i915/intel_memory_region.c:19:
+               .class = INTEL_MEMORY_STOLEN_SYSTEM,$

-:190: ERROR:CODE_INDENT: code indent should use tabs where possible
#190: FILE: drivers/gpu/drm/i915/intel_memory_region.c:20:
+               .instance = 0,$

-:190: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#190: FILE: drivers/gpu/drm/i915/intel_memory_region.c:20:
+               .instance = 0,$

-:191: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#191: FILE: drivers/gpu/drm/i915/intel_memory_region.c:21:
+       },$

-:289: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#289: FILE: drivers/gpu/drm/i915/intel_memory_region.h:51:
+       u16 class;$

-:290: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#290: FILE: drivers/gpu/drm/i915/intel_memory_region.h:52:
+       u16 instance;$

total: 6 errors, 14 warnings, 0 checks, 328 lines checked
29499067db3b drm/i915: Store gt in memory region
37b5e5cb7b02 drm/i915/uapi: introduce drm_i915_gem_create_ext
-:65: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#65: 
new file mode 100644

-:704: WARNING:LONG_LINE: line length of 120 exceeds 100 columns
#704: FILE: include/uapi/drm/i915_drm.h:394:
+#define DRM_IOCTL_I915_GEM_CREATE_EXT	DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_CREATE, struct drm_i915_gem_create_ext)

-:713: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#713: FILE: include/uapi/drm/i915_drm.h:733:
+struct drm_i915_gem_create_ext {
+

-:752: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV)
#752: FILE: include/uapi/drm/i915_drm.h:1735:
+#define I915_OBJECT_PARAM  (1ull<<32)
                                 ^

total: 0 errors, 2 warnings, 2 checks, 675 lines checked
6491c69340d4 drm/i915/lmem: allocate cmd ring in lmem
-:7: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one

total: 0 errors, 1 warnings, 0 checks, 27 lines checked
5e1663900ad4 drm/i915/dg1: Do not check r->sgt.pfn for NULL
-:6: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#6: 
When user space does mmap, kernel would map the physical page of local memory

total: 0 errors, 1 warnings, 0 checks, 8 lines checked
4a88133b064b drm/i915/dg1: Introduce dmabuf mmap to LMEM
29e876fe2352 drm/i915: setup the LMEM region
7fb05ce64cc0 drm/i915: Distinction of memory regions
33489c547561 drm/i915/gtt: map the PD up front
a5a268b53456 drm/i915/gtt/dgfx: place the PD in LMEM
934cf6d2978f drm/i915/gtt: make flushing conditional
95c33d19bc2e drm/i915/gtt/dg1: add PTE_LM plumbing for PPGTT
3bac8276df64 drm/i915/gtt/dg1: add PTE_LM plumbing for GGTT
333376c17e45 drm/i915: allocate context from LMEM
ae1d26ee9713 drm/i915: move engine scratch to LMEM
-:7: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one

total: 0 errors, 1 warnings, 0 checks, 26 lines checked
3f5760d53851 drm/i915: Provide a way to disable PCIe relaxed write ordering
7d2a163655ac drm/i915: i915 returns -EBUSY on thread contention
1588b3cc3983 drm/i915: setup GPU device lmem region
ebf42a2d1043 drm/i915: Fix object page offset within a region
8adce9072e8d drm/i915: add i915_gem_object_is_devmem() function
5ec0749cbeac drm/i915: finish memory region support for stolen objects.
39aed9c40f1a drm/i915/lmem: support optional CPU clearing for special internal use
-:95: WARNING:LINE_SPACING: Missing a blank line after declarations
#95: FILE: drivers/gpu/drm/i915/selftests/intel_memory_region.c:551:
+	struct drm_i915_private *i915 = arg;
+	I915_RND_STATE(prng);

total: 0 errors, 1 warnings, 0 checks, 155 lines checked
31c4a0f29ed1 drm/i915/guc: put all guc objects in lmem when available
-:20: WARNING:BAD_SIGN_OFF: Duplicate signature
#20: 
Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>

-:21: WARNING:BAD_SIGN_OFF: Duplicate signature
#21: 
Cc: Matthew Auld <matthew.auld@intel.com>

-:145: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#145: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c:45:
+static int guc_xfer_rsa(struct intel_uc_fw *guc_fw,
 			 struct intel_uncore *uncore)

total: 0 errors, 2 warnings, 1 checks, 219 lines checked
2b03d5d4546d drm/i915: Create stolen memory region from local memory
-:191: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#191: FILE: drivers/gpu/drm/i915/intel_memory_region.c:22:
+       [INTEL_REGION_STOLEN_LMEM] = {$

-:194: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#194: FILE: drivers/gpu/drm/i915/intel_memory_region.c:25:
+       },$

-:202: WARNING:PREFER_FALLTHROUGH: Prefer 'fallthrough;' over fallthrough comment
#202: FILE: drivers/gpu/drm/i915/intel_memory_region.c:318:
+		case INTEL_MEMORY_STOLEN_LOCAL: /* fallthrough */

total: 0 errors, 3 warnings, 0 checks, 154 lines checked
4e7c3c2116df drm/i915/lmem: Bypass aperture when lmem is available
a5830c8b075a drm/i915/lmem: reset the lmem buffer created by fbdev
-:11: WARNING:BAD_SIGN_OFF: Duplicate signature
#11: 
Cc: Daniel Vetter <daniel.vetter@intel.com>

total: 0 errors, 1 warnings, 0 checks, 8 lines checked
9dd81dae303d drm/i915/dsb: Enable lmem for dsb
362b620d7074 drm/i915: Reintroduce mem->reserved
-:74: WARNING:LINE_SPACING: Missing a blank line after declarations
#74: FILE: drivers/gpu/drm/i915/selftests/intel_memory_region.c:157:
+	resource_size_t avail = resource_size(&mem->region);
+	I915_RND_STATE(prng);

total: 0 errors, 1 warnings, 0 checks, 123 lines checked
bd91b2337589 drm/i915/dg1: Reserve first 1MB of local memory
adf64d641e06 drm/i915/dg1: Read OPROM via SPI controller
ca804dda82c6 drm/i915/oprom: Basic sanitization
-:15: WARNING:BAD_SIGN_OFF: Duplicate signature
#15: 
Cc: Uma Shankar <uma.shankar@intel.com>

-:117: WARNING:LONG_LINE: line length of 122 exceeds 100 columns
#117: FILE: drivers/gpu/drm/i915/display/intel_opregion.c:996:
+	size_512_bytes = parse_ptr[((struct expansion_rom_header *)parse_ptr)->pcistructoffset + PCI_IMAGE_LENGTH_OFFSET];

-:118: WARNING:LONG_LINE: line length of 115 exceeds 100 columns
#118: FILE: drivers/gpu/drm/i915/display/intel_opregion.c:997:
+	*code_type = parse_ptr[((struct expansion_rom_header *)parse_ptr)->pcistructoffset + PCI_CODE_TYPE_OFFSET];

-:119: WARNING:LONG_LINE: line length of 125 exceeds 100 columns
#119: FILE: drivers/gpu/drm/i915/display/intel_opregion.c:998:
+	*last_img = parse_ptr[((struct expansion_rom_header *)parse_ptr)->pcistructoffset + PCI_LAST_IMAGE_INDICATOR_OFFSET];

total: 0 errors, 4 warnings, 0 checks, 291 lines checked
3c364e753afe drm/i915: WA for zero memory channel
fca06b7ce6d8 drm/i915/dg1: Compute MEM Bandwidth using MCHBAR
a076828abb5c drm/i915/dg1: Double memory bandwidth available
-:13: WARNING:BAD_SIGN_OFF: Duplicate signature
#13: 
Cc: Swati Sharma <swati2.sharma@intel.com>

total: 0 errors, 1 warnings, 0 checks, 20 lines checked
a7be54957ebd drm/i915/lmem: allocate HWSP in lmem
-:7: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one

total: 0 errors, 1 warnings, 0 checks, 42 lines checked
599eb2888fa7 drm/i915/lmem: Limit block size to 4G
-:8: WARNING:TYPO_SPELLING: 'sytem' may be misspelled - perhaps 'system'?
#8: 
buddy sytem can allocate blocks that can have size >= 4G and

total: 0 errors, 1 warnings, 0 checks, 31 lines checked
14fefe71abbe drm/i915/gem: Update shmem available memory
-:13: WARNING:BAD_SIGN_OFF: Duplicate signature
#13: 
Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>

total: 0 errors, 1 warnings, 0 checks, 31 lines checked
85bcec541bc6 drm/i915: Allow non-uniform subslices in gen12+
e371a4fda4c8 drm/i915/dg1: intel_memory_region_evict() changes for eviction
-:176: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#176: FILE: drivers/gpu/drm/i915/intel_memory_region.c:124:
+	while (found < target &&
+		(obj = list_first_entry_or_null(*phase,

-:194: CHECK:LOGICAL_CONTINUATIONS: Logical continuations should be on the previous line
#194: FILE: drivers/gpu/drm/i915/intel_memory_region.c:142:
+		if (i915_gem_object_type_has(obj, I915_GEM_OBJECT_HAS_IOMEM)
+		    && !obj->base.handle_count)

total: 0 errors, 0 warnings, 2 checks, 229 lines checked
280d036c6cc4 drm/i915/dg1: i915_gem_object_memcpy(..) infrastructure
8df8e087dc74 drm/i915/dg1: Eviction logic
-:7: WARNING:TYPO_SPELLING: 'availabe' may be misspelled - perhaps 'available'?
#7: 
on a region, if memory pages are not availabe, the region eviction

-:276: CHECK:LOGICAL_CONTINUATIONS: Logical continuations should be on the previous line
#276: FILE: drivers/gpu/drm/i915/intel_memory_region.c:152:
+		if (i915_gem_object_type_has(obj, I915_GEM_OBJECT_HAS_IOMEM)
+		    && pass == 1)

total: 0 errors, 1 warnings, 1 checks, 231 lines checked
c43e26b457ba drm/i915/dg1: Add enable_eviction modparam
-:76: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#76: FILE: drivers/gpu/drm/i915/i915_params.c:201:
+i915_param_named_unsafe(enable_eviction, bool, 0600,
+	"Enable memcpy based eviction which does not rely on DMA resv refactoring)");

total: 0 errors, 0 warnings, 1 checks, 66 lines checked
94618502032f drm/i915/dg1: Add lmem_size modparam
-:21: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#21: FILE: drivers/gpu/drm/i915/i915_params.c:204:
+i915_param_named_unsafe(lmem_size, uint, 0400,
+	"Change lmem size for each region. (default: 0, all memory)");

total: 0 errors, 0 warnings, 1 checks, 26 lines checked
45aa0145d9d7 drm/i915/dg1: Track swap in/out stats via debugfs
dea599a449c3 drm/i915/dg1: Measure swap in/out timing stats
-:7: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one

total: 0 errors, 1 warnings, 0 checks, 71 lines checked
7a3906ab73e5 drm/i915: define intel_partial_pages_for_sg_table
7f58be45fa4a drm/i915: create and destroy dummy vma
84d54dd2aedf drm/i915: blt copy between objs using pre-created vma windows
-:95: WARNING:MEMORY_BARRIER: memory barrier without comment
#95: FILE: drivers/gpu/drm/i915/gem/i915_gem_object.c:763:
+	wmb();

total: 0 errors, 1 warnings, 0 checks, 422 lines checked
3e237c57e079 drm/i915/dg1: Eliminate eviction mutex
efc0c590d514 drm/i915/dg1: Keep engine awake across whole blit
0fb68f1c3c17 drm/i915: window_blt_copy is used for swapin and swapout
-:92: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#92: FILE: drivers/gpu/drm/i915/i915_params.c:201:
+i915_param_named_unsafe(enable_eviction, uint, 0600,
+	"Enable eviction which does not rely on DMA resv refactoring "

total: 0 errors, 0 warnings, 1 checks, 75 lines checked
d30141a1c7dc drm/i915: Lmem eviction statistics by category
e77001d0741d drm/i915/gem/selftest: test and measure window based blt cpy
-:98: WARNING:MSLEEP: msleep < 20ms can sleep for up to 20ms; see Documentation/timers/timers-howto.rst
#98: FILE: drivers/gpu/drm/i915/gem/selftests/i915_gem_object_blt.c:637:
+			msleep(1);

total: 0 errors, 1 warnings, 0 checks, 185 lines checked
5f2a87a3c62a drm/i915: suspend/resume eviction
-:53: WARNING:LINE_SPACING: Missing a blank line after declarations
#53: FILE: drivers/gpu/drm/i915/i915_drv.c:1121:
+		struct list_head still_in_list;
+		INIT_LIST_HEAD(&s


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  parent reply	other threads:[~2020-11-27 14:58 UTC|newest]

Thread overview: 421+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-27 12:04 [RFC PATCH 000/162] DG1 + LMEM enabling Matthew Auld
2020-11-27 12:04 ` [Intel-gfx] " Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 001/162] drm/i915/selftest: also consider non-contiguous objects Matthew Auld
2020-11-27 12:04   ` [Intel-gfx] " Matthew Auld
2020-11-27 19:44   ` Chris Wilson
2020-11-27 19:44     ` [Intel-gfx] " Chris Wilson
2020-11-27 12:04 ` [RFC PATCH 002/162] drm/i915/selftest: assert we get 2M GTT pages Matthew Auld
2020-11-27 12:04   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 003/162] drm/i915/selftest: handle local-memory in perf_memcpy Matthew Auld
2020-11-27 12:04   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 004/162] drm/i915/gt: Move move context layout registers and offsets to lrc_reg.h Matthew Auld
2020-11-27 12:04   ` [Intel-gfx] " Matthew Auld
2020-11-27 19:55   ` Chris Wilson
2020-11-27 19:55     ` Chris Wilson
2020-11-27 12:04 ` [RFC PATCH 005/162] drm/i915/gt: Rename lrc.c to execlists_submission.c Matthew Auld
2020-11-27 12:04   ` [Intel-gfx] " Matthew Auld
2020-11-27 19:56   ` Chris Wilson
2020-11-27 19:56     ` [Intel-gfx] " Chris Wilson
2020-11-27 12:04 ` [RFC PATCH 006/162] drm/i915: split gen8+ flush and bb_start emission functions to their own file Matthew Auld
2020-11-27 12:04   ` [Intel-gfx] " Matthew Auld
2020-11-27 19:58   ` Chris Wilson
2020-11-27 19:58     ` [Intel-gfx] " Chris Wilson
2020-11-27 12:04 ` [RFC PATCH 007/162] drm/i915: split wa_bb code to its " Matthew Auld
2020-11-27 12:04   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 008/162] HAX drm/i915: Work around the selftest timeline lock splat workaround Matthew Auld
2020-11-27 12:04   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 009/162] drm/i915: Introduce drm_i915_lock_isolated Matthew Auld
2020-11-27 12:04   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 010/162] drm/i915: Lock hwsp objects isolated for pinning at create time Matthew Auld
2020-11-27 12:04   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 011/162] drm/i915: Pin timeline map after first timeline pin, v5 Matthew Auld
2020-11-27 12:04   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 012/162] drm/i915: Move cmd parser pinning to execbuffer Matthew Auld
2020-11-27 12:04   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 013/162] drm/i915: Add missing -EDEADLK handling to execbuf pinning, v2 Matthew Auld
2020-11-27 12:04   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 014/162] drm/i915: Ensure we hold the object mutex in pin correctly v2 Matthew Auld
2020-11-27 12:04   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 015/162] drm/i915: Add gem object locking to madvise Matthew Auld
2020-11-27 12:04   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 016/162] drm/i915: Move HAS_STRUCT_PAGE to obj->flags Matthew Auld
2020-11-27 12:04   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 017/162] drm/i915: Rework struct phys attachment handling Matthew Auld
2020-11-27 12:04   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 018/162] drm/i915: Convert i915_gem_object_attach_phys() to ww locking, v2 Matthew Auld
2020-11-27 12:04   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 019/162] drm/i915: make lockdep slightly happier about execbuf Matthew Auld
2020-11-27 12:04   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 020/162] drm/i915: Disable userptr pread/pwrite support Matthew Auld
2020-11-27 12:04   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 021/162] drm/i915: No longer allow exporting userptr through dma-buf Matthew Auld
2020-11-27 12:04   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 022/162] drm/i915: Reject more ioctls for userptr Matthew Auld
2020-11-27 12:04   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:04 ` [RFC PATCH 023/162] drm/i915: Reject UNSYNCHRONIZED for userptr, v2 Matthew Auld
2020-11-27 12:04   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 024/162] drm/i915: Make compilation of userptr code depend on MMU_NOTIFIER Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 025/162] drm/i915: Fix userptr so we do not have to worry about obj->mm.lock, v5 Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 026/162] drm/i915: Flatten obj->mm.lock Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 027/162] drm/i915: Populate logical context during first pin Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 028/162] drm/i915: Make ring submission compatible with obj->mm.lock removal, v2 Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 029/162] drm/i915: Handle ww locking in init_status_page Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 030/162] drm/i915: Rework clflush to work correctly without obj->mm.lock Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 031/162] drm/i915: Pass ww ctx to intel_pin_to_display_plane Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 032/162] drm/i915: Add object locking to vm_fault_cpu Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 033/162] drm/i915: Move pinning to inside engine_wa_list_verify() Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 034/162] drm/i915: Take reservation lock around i915_vma_pin Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 035/162] drm/i915: Make intel_init_workaround_bb more compatible with ww locking Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 036/162] drm/i915: Make __engine_unpark() compatible with ww locking v2 Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 037/162] drm/i915: Take obj lock around set_domain ioctl Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 038/162] drm/i915: Defer pin calls in buffer pool until first use by caller Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 039/162] drm/i915: Fix pread/pwrite to work with new locking rules Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 040/162] drm/i915: Fix workarounds selftest, part 1 Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 041/162] drm/i915: Prepare for obj->mm.lock removal Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 042/162] drm/i915: Add igt_spinner_pin() to allow for ww locking around spinner Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 043/162] drm/i915: Add ww locking around vm_access() Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 044/162] drm/i915: Increase ww locking for perf Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 045/162] drm/i915: Lock ww in ucode objects correctly Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 046/162] drm/i915: Add ww locking to dma-buf ops Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 047/162] drm/i915: Add missing ww lock in intel_dsb_prepare Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 048/162] drm/i915: Fix ww locking in shmem_create_from_object Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 049/162] drm/i915: Use a single page table lock for each gtt Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 050/162] drm/i915/selftests: Prepare huge_pages testcases for obj->mm.lock removal Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 051/162] drm/i915/selftests: Prepare client blit " Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 052/162] drm/i915/selftests: Prepare coherency tests " Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 053/162] drm/i915/selftests: Prepare context " Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 054/162] drm/i915/selftests: Prepare dma-buf " Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 055/162] drm/i915/selftests: Prepare execbuf " Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 056/162] drm/i915/selftests: Prepare mman testcases " Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 057/162] drm/i915/selftests: Prepare object tests " Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 058/162] drm/i915/selftests: Prepare object blit " Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 059/162] drm/i915/selftests: Prepare igt_gem_utils " Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 060/162] drm/i915/selftests: Prepare context selftest " Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 061/162] drm/i915/selftests: Prepare hangcheck " Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 062/162] drm/i915/selftests: Prepare execlists " Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 063/162] drm/i915/selftests: Prepare mocs tests " Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 064/162] drm/i915/selftests: Prepare ring submission " Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 065/162] drm/i915/selftests: Prepare timeline tests " Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 066/162] drm/i915/selftests: Prepare i915_request " Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 067/162] drm/i915/selftests: Prepare memory region " Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 068/162] drm/i915/selftests: Prepare cs engine " Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 069/162] drm/i915/selftests: Prepare gtt " Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 070/162] drm/i915: Finally remove obj->mm.lock Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 071/162] drm/i915: Keep userpointer bindings if seqcount is unchanged, v2 Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 072/162] drm/i915: Avoid some false positives in assert_object_held() Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 073/162] drm/i915: Reference contending lock objects Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 074/162] drm/i915: Break out dma_resv ww locking utilities to separate files Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 075/162] drm/i915: Introduce a for_i915_gem_ww(){} Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 076/162] drm/i915: Untangle the vma pages_mutex Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 077/162] drm/i915/fbdev: Use lmem physical addresses for fb_mmap() on discrete Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 078/162] drm/i915: Return error value when bo not in LMEM for discrete Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 079/162] drm/i915/dmabuf: Disallow LMEM objects from dma-buf Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 080/162] drm/i915/lmem: Fail driver init if LMEM training failed Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 081/162] HAX drm/i915/lmem: support CPU relocations Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 082/162] HAX drm/i915/lmem: support pread and pwrite Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:05 ` [RFC PATCH 083/162] drm/i915: Update the helper to set correct mapping Matthew Auld
2020-11-27 12:05   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 084/162] drm/i915: introduce kernel blitter_context Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 085/162] drm/i915/region: support basic eviction Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 086/162] drm/i915: Add blit functions that can be called from within a WW transaction Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 087/162] drm/i915: Delay publishing objects on the eviction lists Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 088/162] drm/i915: support basic object migration Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 089/162] drm/i915/dg1: Fix occasional migration error Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 090/162] drm/i915/query: Expose memory regions through the query uAPI Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 091/162] drm/i915: Store gt in memory region Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 092/162] drm/i915/uapi: introduce drm_i915_gem_create_ext Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 13:25   ` Chris Wilson
2020-11-27 13:25     ` Chris Wilson
2020-12-01 15:06     ` Thomas Hellström (Intel)
2020-12-01 15:06       ` Thomas Hellström (Intel)
2020-11-27 19:21   ` Chris Wilson
2020-11-27 19:21     ` Chris Wilson
2020-12-01 12:55   ` Chris Wilson
2020-12-01 12:55     ` Chris Wilson
2020-12-01 13:43     ` Matthew Auld
2020-12-01 13:43       ` Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 093/162] drm/i915/lmem: allocate cmd ring in lmem Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 13:27   ` Chris Wilson
2020-11-27 13:27     ` [Intel-gfx] " Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 094/162] drm/i915/dg1: Do not check r->sgt.pfn for NULL Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 095/162] drm/i915/dg1: Introduce dmabuf mmap to LMEM Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 096/162] drm/i915: setup the LMEM region Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-30 10:14   ` Jani Nikula
2020-11-30 10:14     ` [Intel-gfx] " Jani Nikula
2020-11-27 12:06 ` [RFC PATCH 097/162] drm/i915: Distinction of memory regions Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 13:30   ` Chris Wilson
2020-11-27 13:30     ` Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 098/162] drm/i915/gtt: map the PD up front Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 13:31   ` Chris Wilson
2020-11-27 13:31     ` [Intel-gfx] " Chris Wilson
2021-01-12 10:47     ` Matthew Auld
2021-01-12 10:47       ` Matthew Auld
2021-01-12 14:33       ` Daniel Vetter
2021-01-12 14:33         ` Daniel Vetter
2020-11-27 12:06 ` [RFC PATCH 099/162] drm/i915/gtt/dgfx: place the PD in LMEM Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 100/162] drm/i915/gtt: make flushing conditional Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 101/162] drm/i915/gtt/dg1: add PTE_LM plumbing for PPGTT Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 13:35   ` Chris Wilson
2020-11-27 13:35     ` Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 102/162] drm/i915/gtt/dg1: add PTE_LM plumbing for GGTT Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 103/162] drm/i915: allocate context from LMEM Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 13:37   ` Chris Wilson
2020-11-27 13:37     ` Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 104/162] drm/i915: move engine scratch to LMEM Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 105/162] drm/i915: Provide a way to disable PCIe relaxed write ordering Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 106/162] drm/i915: i915 returns -EBUSY on thread contention Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 107/162] drm/i915: setup GPU device lmem region Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-30 11:18   ` Chris Wilson
2020-11-30 11:18     ` [Intel-gfx] " Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 108/162] drm/i915: Fix object page offset within a region Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 109/162] drm/i915: add i915_gem_object_is_devmem() function Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 110/162] drm/i915: finish memory region support for stolen objects Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 111/162] drm/i915/lmem: support optional CPU clearing for special internal use Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 112/162] drm/i915/guc: put all guc objects in lmem when available Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 113/162] drm/i915: Create stolen memory region from local memory Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-12-07 13:39   ` Jani Nikula
2020-12-07 13:39     ` Jani Nikula
2020-11-27 12:06 ` [RFC PATCH 114/162] drm/i915/lmem: Bypass aperture when lmem is available Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 115/162] drm/i915/lmem: reset the lmem buffer created by fbdev Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 116/162] drm/i915/dsb: Enable lmem for dsb Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 117/162] drm/i915: Reintroduce mem->reserved Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 118/162] drm/i915/dg1: Reserve first 1MB of local memory Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 13:52   ` Chris Wilson
2020-11-27 13:52     ` Chris Wilson
2020-11-30 11:09     ` Matthew Auld
2020-11-30 11:09       ` Matthew Auld
2020-11-30 11:22       ` Chris Wilson
2020-11-30 11:22         ` Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 119/162] drm/i915/dg1: Read OPROM via SPI controller Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-30 10:16   ` Jani Nikula
2020-11-30 10:16     ` Jani Nikula
2020-11-27 12:06 ` [RFC PATCH 120/162] drm/i915/oprom: Basic sanitization Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-30 10:24   ` Jani Nikula
2020-11-30 10:24     ` Jani Nikula
2020-11-27 12:06 ` [RFC PATCH 121/162] drm/i915: WA for zero memory channel Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 122/162] drm/i915/dg1: Compute MEM Bandwidth using MCHBAR Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 123/162] drm/i915/dg1: Double memory bandwidth available Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 124/162] drm/i915/lmem: allocate HWSP in lmem Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 13:55   ` Chris Wilson
2020-11-27 13:55     ` Chris Wilson
2020-11-30 17:17     ` Matthew Auld
2020-11-30 17:17       ` Matthew Auld
2020-11-30 17:35       ` Chris Wilson
2020-11-30 17:35         ` Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 125/162] drm/i915/lmem: Limit block size to 4G Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 14:02   ` Chris Wilson
2020-11-27 14:02     ` Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 126/162] drm/i915/gem: Update shmem available memory Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 14:04   ` Chris Wilson
2020-11-27 14:04     ` [Intel-gfx] " Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 127/162] drm/i915: Allow non-uniform subslices in gen12+ Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 128/162] drm/i915/dg1: intel_memory_region_evict() changes for eviction Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 14:07   ` Chris Wilson
2020-11-27 14:07     ` Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 129/162] drm/i915/dg1: i915_gem_object_memcpy(..) infrastructure Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 130/162] drm/i915/dg1: Eviction logic Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 131/162] drm/i915/dg1: Add enable_eviction modparam Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-30 12:20   ` Jani Nikula
2020-11-30 12:20     ` [Intel-gfx] " Jani Nikula
2020-11-27 12:06 ` [RFC PATCH 132/162] drm/i915/dg1: Add lmem_size modparam Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 133/162] drm/i915/dg1: Track swap in/out stats via debugfs Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 14:09   ` Chris Wilson
2020-11-27 14:09     ` Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 134/162] drm/i915/dg1: Measure swap in/out timing stats Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 14:11   ` Chris Wilson
2020-11-27 14:11     ` Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 135/162] drm/i915: define intel_partial_pages_for_sg_table Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 136/162] drm/i915: create and destroy dummy vma Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 137/162] drm/i915: blt copy between objs using pre-created vma windows Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 14:19   ` Chris Wilson
2020-11-27 14:19     ` Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 138/162] drm/i915/dg1: Eliminate eviction mutex Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 139/162] drm/i915/dg1: Keep engine awake across whole blit Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 140/162] drm/i915: window_blt_copy is used for swapin and swapout Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 14:20   ` Chris Wilson
2020-11-27 14:20     ` Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 141/162] drm/i915: Lmem eviction statistics by category Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 14:21   ` Chris Wilson
2020-11-27 14:21     ` Chris Wilson
2020-11-27 12:06 ` [RFC PATCH 142/162] drm/i915/gem/selftest: test and measure window based blt cpy Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:06 ` [RFC PATCH 143/162] drm/i915: suspend/resume eviction Matthew Auld
2020-11-27 12:06   ` [Intel-gfx] " Matthew Auld
2020-11-27 14:22   ` Chris Wilson
2020-11-27 14:22     ` [Intel-gfx] " Chris Wilson
2020-11-27 12:07 ` [RFC PATCH 144/162] drm/i915: Reset blitter context when unpark engine Matthew Auld
2020-11-27 12:07   ` [Intel-gfx] " Matthew Auld
2020-11-27 14:26   ` Chris Wilson
2020-11-27 14:26     ` [Intel-gfx] " Chris Wilson
2020-11-27 12:07 ` [RFC PATCH 145/162] drm/i915/dg1: Add dedicated context for blitter eviction Matthew Auld
2020-11-27 12:07   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:07 ` [RFC PATCH 146/162] drm/i915/pm: suspend and restore ppgtt mapping Matthew Auld
2020-11-27 12:07   ` [Intel-gfx] " Matthew Auld
2020-11-27 14:29   ` Chris Wilson
2020-11-27 14:29     ` Chris Wilson
2020-11-27 12:07 ` [RFC PATCH 147/162] drm/i915/gt: Allocate default ctx objects in SMEM Matthew Auld
2020-11-27 12:07   ` [Intel-gfx] " Matthew Auld
2020-11-27 14:30   ` Chris Wilson
2020-11-27 14:30     ` [Intel-gfx] " Chris Wilson
2020-11-27 12:07 ` [RFC PATCH 148/162] drm/i915: suspend/resume enable blitter eviction Matthew Auld
2020-11-27 12:07   ` [Intel-gfx] " Matthew Auld
2020-11-27 14:32   ` Chris Wilson
2020-11-27 14:32     ` Chris Wilson
2020-11-27 12:07 ` [RFC PATCH 149/162] drm/i915: suspend/resume handling of perma-pinned objects Matthew Auld
2020-11-27 12:07   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:07 ` [RFC PATCH 150/162] drm/i915: need consider system BO snoop for dgfx Matthew Auld
2020-11-27 12:07   ` [Intel-gfx] " Matthew Auld
2020-11-27 14:36   ` Chris Wilson
2020-11-27 14:36     ` [Intel-gfx] " Chris Wilson
2020-11-27 12:07 ` [RFC PATCH 151/162] drm/i915: move eviction to prepare hook Matthew Auld
2020-11-27 12:07   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:07 ` [RFC PATCH 152/162] drm/i915: Perform execbuffer object locking as a separate step Matthew Auld
2020-11-27 12:07   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:07 ` [RFC PATCH 153/162] drm/i915: Implement eviction locking v2 Matthew Auld
2020-11-27 12:07   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:07 ` [RFC PATCH 154/162] drm/i915: Support ww eviction Matthew Auld
2020-11-27 12:07   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:07 ` [RFC PATCH 155/162] drm/i915: Use a ww transaction in the fault handler Matthew Auld
2020-11-27 12:07   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:07 ` [RFC PATCH 156/162] drm/i915: Use a ww transaction in i915_gem_object_pin_map_unlocked() Matthew Auld
2020-11-27 12:07   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:07 ` [RFC PATCH 157/162] drm/i915: Improve accuracy of eviction stats Matthew Auld
2020-11-27 12:07   ` [Intel-gfx] " Matthew Auld
2020-11-27 14:40   ` Chris Wilson
2020-11-27 14:40     ` Chris Wilson
2020-11-30 10:36     ` Tvrtko Ursulin
2020-11-30 10:36       ` Tvrtko Ursulin
2020-11-27 12:07 ` [RFC PATCH 158/162] drm/i915: Support ww locks in suspend/resume Matthew Auld
2020-11-27 12:07   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:07 ` [RFC PATCH 159/162] drm/i915/dg1: Fix mapping type for default state object Matthew Auld
2020-11-27 12:07   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:07 ` [RFC PATCH 160/162] drm/i915/dg1: Fix GPU hang due to shmemfs page drop Matthew Auld
2020-11-27 12:07   ` [Intel-gfx] " Matthew Auld
2020-11-27 14:44   ` Chris Wilson
2020-11-27 14:44     ` Chris Wilson
2020-11-27 12:07 ` [RFC PATCH 161/162] drm/i915/dg1: allow pci to auto probe Matthew Auld
2020-11-27 12:07   ` [Intel-gfx] " Matthew Auld
2020-11-27 12:07 ` [RFC PATCH 162/162] drm/i915: drop fake lmem Matthew Auld
2020-11-27 12:07   ` [Intel-gfx] " Matthew Auld
2020-11-27 14:57 ` Patchwork [this message]
2020-11-27 14:59 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for DG1 + LMEM enabling Patchwork
2020-11-27 15:03 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2020-11-27 15:25 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2020-07-10 11:56 [Intel-gfx] [RFC 00/60] DG1 " Matthew Auld
2020-07-10 12:51 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork

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