From: Yongqiang Niu <yongqiang.niu@mediatek.com>
To: Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
CK Hu <ck.hu@mediatek.com>
Cc: Jassi Brar <jassisinghbrar@gmail.com>,
Bibby Hsieh <bibby.hsieh@mediatek.com>,
Yongqiang Niu <yongqiang.niu@mediatek.com>,
Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Subject: [PATCH v1, 3/5] mailbox: mediatek: add control_by_sw private data
Date: Sat, 5 Dec 2020 12:15:26 +0800 [thread overview]
Message-ID: <1607141728-17307-4-git-send-email-yongqiang.niu@mediatek.com> (raw)
In-Reply-To: <1607141728-17307-1-git-send-email-yongqiang.niu@mediatek.com>
add control_by_sw private data
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
drivers/mailbox/mtk-cmdq-mailbox.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c
index 5665b6e..1c01fe0 100644
--- a/drivers/mailbox/mtk-cmdq-mailbox.c
+++ b/drivers/mailbox/mtk-cmdq-mailbox.c
@@ -36,6 +36,8 @@
#define CMDQ_THR_WAIT_TOKEN 0x30
#define CMDQ_THR_PRIORITY 0x40
+#define GCE_GCTL_VALUE 0x48
+
#define CMDQ_THR_ACTIVE_SLOT_CYCLES 0x3200
#define CMDQ_THR_ENABLED 0x1
#define CMDQ_THR_DISABLED 0x0
@@ -76,11 +78,13 @@ struct cmdq {
struct clk *clock;
bool suspended;
u8 shift_pa;
+ bool control_by_sw;
};
struct gce_plat {
u32 thread_nr;
u8 shift;
+ bool control_by_sw;
};
u8 cmdq_get_shift_pa(struct mbox_chan *chan)
@@ -121,6 +125,8 @@ static void cmdq_init(struct cmdq *cmdq)
int i;
WARN_ON(clk_enable(cmdq->clock) < 0);
+ if (cmdq->control_by_sw)
+ writel(0x7, cmdq->base + GCE_GCTL_VALUE);
writel(CMDQ_THR_ACTIVE_SLOT_CYCLES, cmdq->base + CMDQ_THR_SLOT_CYCLES);
for (i = 0; i <= CMDQ_MAX_EVENT; i++)
writel(i, cmdq->base + CMDQ_SYNC_TOKEN_UPDATE);
@@ -536,6 +542,7 @@ static int cmdq_probe(struct platform_device *pdev)
cmdq->thread_nr = plat_data->thread_nr;
cmdq->shift_pa = plat_data->shift;
+ cmdq->control_by_sw = plat_data->control_by_sw;
cmdq->irq_mask = GENMASK(cmdq->thread_nr - 1, 0);
err = devm_request_irq(dev, cmdq->irq, cmdq_irq_handler, IRQF_SHARED,
"mtk_cmdq", cmdq);
--
1.8.1.1.dirty
WARNING: multiple messages have this Message-ID (diff)
From: Yongqiang Niu <yongqiang.niu@mediatek.com>
To: Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
CK Hu <ck.hu@mediatek.com>
Cc: Bibby Hsieh <bibby.hsieh@mediatek.com>,
Jassi Brar <jassisinghbrar@gmail.com>,
linux-kernel@vger.kernel.org,
Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>,
linux-mediatek@lists.infradead.org,
Yongqiang Niu <yongqiang.niu@mediatek.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v1, 3/5] mailbox: mediatek: add control_by_sw private data
Date: Sat, 5 Dec 2020 12:15:26 +0800 [thread overview]
Message-ID: <1607141728-17307-4-git-send-email-yongqiang.niu@mediatek.com> (raw)
In-Reply-To: <1607141728-17307-1-git-send-email-yongqiang.niu@mediatek.com>
add control_by_sw private data
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
drivers/mailbox/mtk-cmdq-mailbox.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c
index 5665b6e..1c01fe0 100644
--- a/drivers/mailbox/mtk-cmdq-mailbox.c
+++ b/drivers/mailbox/mtk-cmdq-mailbox.c
@@ -36,6 +36,8 @@
#define CMDQ_THR_WAIT_TOKEN 0x30
#define CMDQ_THR_PRIORITY 0x40
+#define GCE_GCTL_VALUE 0x48
+
#define CMDQ_THR_ACTIVE_SLOT_CYCLES 0x3200
#define CMDQ_THR_ENABLED 0x1
#define CMDQ_THR_DISABLED 0x0
@@ -76,11 +78,13 @@ struct cmdq {
struct clk *clock;
bool suspended;
u8 shift_pa;
+ bool control_by_sw;
};
struct gce_plat {
u32 thread_nr;
u8 shift;
+ bool control_by_sw;
};
u8 cmdq_get_shift_pa(struct mbox_chan *chan)
@@ -121,6 +125,8 @@ static void cmdq_init(struct cmdq *cmdq)
int i;
WARN_ON(clk_enable(cmdq->clock) < 0);
+ if (cmdq->control_by_sw)
+ writel(0x7, cmdq->base + GCE_GCTL_VALUE);
writel(CMDQ_THR_ACTIVE_SLOT_CYCLES, cmdq->base + CMDQ_THR_SLOT_CYCLES);
for (i = 0; i <= CMDQ_MAX_EVENT; i++)
writel(i, cmdq->base + CMDQ_SYNC_TOKEN_UPDATE);
@@ -536,6 +542,7 @@ static int cmdq_probe(struct platform_device *pdev)
cmdq->thread_nr = plat_data->thread_nr;
cmdq->shift_pa = plat_data->shift;
+ cmdq->control_by_sw = plat_data->control_by_sw;
cmdq->irq_mask = GENMASK(cmdq->thread_nr - 1, 0);
err = devm_request_irq(dev, cmdq->irq, cmdq_irq_handler, IRQF_SHARED,
"mtk_cmdq", cmdq);
--
1.8.1.1.dirty
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
WARNING: multiple messages have this Message-ID (diff)
From: Yongqiang Niu <yongqiang.niu@mediatek.com>
To: Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
CK Hu <ck.hu@mediatek.com>
Cc: Bibby Hsieh <bibby.hsieh@mediatek.com>,
Jassi Brar <jassisinghbrar@gmail.com>,
linux-kernel@vger.kernel.org,
Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>,
linux-mediatek@lists.infradead.org,
Yongqiang Niu <yongqiang.niu@mediatek.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v1, 3/5] mailbox: mediatek: add control_by_sw private data
Date: Sat, 5 Dec 2020 12:15:26 +0800 [thread overview]
Message-ID: <1607141728-17307-4-git-send-email-yongqiang.niu@mediatek.com> (raw)
In-Reply-To: <1607141728-17307-1-git-send-email-yongqiang.niu@mediatek.com>
add control_by_sw private data
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
---
drivers/mailbox/mtk-cmdq-mailbox.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c
index 5665b6e..1c01fe0 100644
--- a/drivers/mailbox/mtk-cmdq-mailbox.c
+++ b/drivers/mailbox/mtk-cmdq-mailbox.c
@@ -36,6 +36,8 @@
#define CMDQ_THR_WAIT_TOKEN 0x30
#define CMDQ_THR_PRIORITY 0x40
+#define GCE_GCTL_VALUE 0x48
+
#define CMDQ_THR_ACTIVE_SLOT_CYCLES 0x3200
#define CMDQ_THR_ENABLED 0x1
#define CMDQ_THR_DISABLED 0x0
@@ -76,11 +78,13 @@ struct cmdq {
struct clk *clock;
bool suspended;
u8 shift_pa;
+ bool control_by_sw;
};
struct gce_plat {
u32 thread_nr;
u8 shift;
+ bool control_by_sw;
};
u8 cmdq_get_shift_pa(struct mbox_chan *chan)
@@ -121,6 +125,8 @@ static void cmdq_init(struct cmdq *cmdq)
int i;
WARN_ON(clk_enable(cmdq->clock) < 0);
+ if (cmdq->control_by_sw)
+ writel(0x7, cmdq->base + GCE_GCTL_VALUE);
writel(CMDQ_THR_ACTIVE_SLOT_CYCLES, cmdq->base + CMDQ_THR_SLOT_CYCLES);
for (i = 0; i <= CMDQ_MAX_EVENT; i++)
writel(i, cmdq->base + CMDQ_SYNC_TOKEN_UPDATE);
@@ -536,6 +542,7 @@ static int cmdq_probe(struct platform_device *pdev)
cmdq->thread_nr = plat_data->thread_nr;
cmdq->shift_pa = plat_data->shift;
+ cmdq->control_by_sw = plat_data->control_by_sw;
cmdq->irq_mask = GENMASK(cmdq->thread_nr - 1, 0);
err = devm_request_irq(dev, cmdq->irq, cmdq_irq_handler, IRQF_SHARED,
"mtk_cmdq", cmdq);
--
1.8.1.1.dirty
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-12-05 4:17 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-05 4:15 [PATCH v1, 0/5] support gce on mt8192 platform Yongqiang Niu
2020-12-05 4:15 ` Yongqiang Niu
2020-12-05 4:15 ` Yongqiang Niu
2020-12-05 4:15 ` [PATCH v1, 1/5] dt-binding: gce: add gce header file for mt8192 Yongqiang Niu
2020-12-05 4:15 ` Yongqiang Niu
2020-12-05 4:15 ` Yongqiang Niu
2020-12-05 4:15 ` [PATCH v1, 2/5] arm64: dts: mt8192: add gce node Yongqiang Niu
2020-12-05 4:15 ` Yongqiang Niu
2020-12-05 4:15 ` Yongqiang Niu
2020-12-05 4:15 ` Yongqiang Niu [this message]
2020-12-05 4:15 ` [PATCH v1, 3/5] mailbox: mediatek: add control_by_sw private data Yongqiang Niu
2020-12-05 4:15 ` Yongqiang Niu
2020-12-05 7:35 ` Nicolas Boichat
2020-12-05 7:35 ` Nicolas Boichat
2020-12-05 7:35 ` Nicolas Boichat
2020-12-23 0:33 ` Yongqiang Niu
2020-12-23 0:33 ` Yongqiang Niu
2020-12-23 0:33 ` Yongqiang Niu
2020-12-05 4:15 ` [PATCH v1, 4/5] soc: mediatek: cmdq: add address shift in jump Yongqiang Niu
2020-12-05 4:15 ` Yongqiang Niu
2020-12-05 4:15 ` Yongqiang Niu
2020-12-05 7:30 ` Nicolas Boichat
2020-12-05 7:30 ` Nicolas Boichat
2020-12-05 7:30 ` Nicolas Boichat
2020-12-09 15:16 ` Chun-Kuang Hu
2020-12-09 15:16 ` Chun-Kuang Hu
2020-12-09 15:16 ` Chun-Kuang Hu
2020-12-23 0:36 ` Yongqiang Niu
2020-12-23 0:36 ` Yongqiang Niu
2020-12-23 0:36 ` Yongqiang Niu
2020-12-05 4:15 ` [PATCH v1, 5/5] mailbox: cmdq: add mt8192 support Yongqiang Niu
2020-12-05 4:15 ` Yongqiang Niu
2020-12-05 4:15 ` Yongqiang Niu
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