From: Yongqiang Niu <yongqiang.niu@mediatek.com>
To: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Cc: CK Hu <ck.hu@mediatek.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
"Rob Herring" <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Mark Rutland <mark.rutland@arm.com>,
DTML <devicetree@vger.kernel.org>,
David Airlie <airlied@linux.ie>,
linux-kernel <linux-kernel@vger.kernel.org>,
DRI Development <dri-devel@lists.freedesktop.org>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@lists.infradead.org>,
"Daniel Vetter" <daniel@ffwll.ch>,
Hsin-Yi Wang <hsinyi@chromium.org>,
Linux ARM <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v3, 07/15] drm/mediatek: enable OVL_LAYER_SMI_ID_EN for multi-layer usecase
Date: Thu, 28 Jan 2021 08:43:39 +0800 [thread overview]
Message-ID: <1611794619.1947.0.camel@mhfsdcap03> (raw)
In-Reply-To: <CAAOTY_9_LN8nYSmg42gpR5dLqTe+ABt61WzM8S5cp2D6-rWKyw@mail.gmail.com>
On Tue, 2021-01-12 at 07:59 +0800, Chun-Kuang Hu wrote:
> Hi, Yongqiang:
>
> Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2021年1月11日 週一 下午3:44寫道：
> >
> > enable OVL_LAYER_SMI_ID_EN for multi-layer usecase
>
> Could you describe more information? Without this patch, what would happen?
>
without this patch, ovl will hang up when more than 1 layer enabled
> >
> > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> > ---
> > drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 12 ++++++++++++
> > 1 file changed, 12 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> > index b47c238..4934bee 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> > @@ -23,6 +23,7 @@
> > #define DISP_REG_OVL_RST 0x0014
> > #define DISP_REG_OVL_ROI_SIZE 0x0020
> > #define DISP_REG_OVL_DATAPATH_CON 0x0024
> > +#define OVL_LAYER_SMI_ID_EN BIT(0)
> > #define OVL_BGCLR_SEL_IN BIT(2)
> > #define DISP_REG_OVL_ROI_BGCLR 0x0028
> > #define DISP_REG_OVL_SRC_CON 0x002c
> > @@ -61,6 +62,7 @@ struct mtk_disp_ovl_data {
> > unsigned int gmc_bits;
> > unsigned int layer_nr;
> > bool fmt_rgb565_is_0;
> > + bool smi_id_en;
> > };
> >
> > /**
> > @@ -116,7 +118,17 @@ static void mtk_ovl_disable_vblank(struct mtk_ddp_comp *comp)
> >
> > static void mtk_ovl_start(struct mtk_ddp_comp *comp)
> > {
> > + struct mtk_disp_ovl *ovl = comp_to_ovl(comp);
> > +
> > writel_relaxed(0x1, comp->regs + DISP_REG_OVL_EN);
> > +
> > + if(ovl->data->smi_id_en) {
> > + unsigned int reg;
> > +
> > + reg = readl(comp->regs + DISP_REG_OVL_DATAPATH_CON);
> > + reg = reg | OVL_LAYER_SMI_ID_EN;
> > + writel_relaxed(reg, comp->regs + DISP_REG_OVL_DATAPATH_CON);
>
> I think this setting should before write 1 to DISP_REG_OVL_EN.
>
> > + }
> > }
> >
> > static void mtk_ovl_stop(struct mtk_ddp_comp *comp)
>
> Should clear DISP_REG_OVL_DATAPATH_CON when stop?
>
> Regards,
> Chun-Kuang.
>
> > --
> > 1.8.1.1.dirty
> > _______________________________________________
> > Linux-mediatek mailing list
> > Linux-mediatek@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-mediatek
WARNING: multiple messages have this Message-ID (diff)
From: Yongqiang Niu <yongqiang.niu@mediatek.com>
To: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
DTML <devicetree@vger.kernel.org>,
Daniel Vetter <daniel@ffwll.ch>, David Airlie <airlied@linux.ie>,
linux-kernel <linux-kernel@vger.kernel.org>,
DRI Development <dri-devel@lists.freedesktop.org>,
Project_Global_Chrome_Upstream_Group@mediatek.com,
Matthias Brugger <matthias.bgg@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@lists.infradead.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Hsin-Yi Wang <hsinyi@chromium.org>, CK Hu <ck.hu@mediatek.com>,
Linux ARM <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v3, 07/15] drm/mediatek: enable OVL_LAYER_SMI_ID_EN for multi-layer usecase
Date: Thu, 28 Jan 2021 08:43:39 +0800 [thread overview]
Message-ID: <1611794619.1947.0.camel@mhfsdcap03> (raw)
In-Reply-To: <CAAOTY_9_LN8nYSmg42gpR5dLqTe+ABt61WzM8S5cp2D6-rWKyw@mail.gmail.com>
On Tue, 2021-01-12 at 07:59 +0800, Chun-Kuang Hu wrote:
> Hi, Yongqiang:
>
> Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2021年1月11日 週一 下午3:44寫道：
> >
> > enable OVL_LAYER_SMI_ID_EN for multi-layer usecase
>
> Could you describe more information? Without this patch, what would happen?
>
without this patch, ovl will hang up when more than 1 layer enabled
> >
> > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> > ---
> > drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 12 ++++++++++++
> > 1 file changed, 12 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> > index b47c238..4934bee 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> > @@ -23,6 +23,7 @@
> > #define DISP_REG_OVL_RST 0x0014
> > #define DISP_REG_OVL_ROI_SIZE 0x0020
> > #define DISP_REG_OVL_DATAPATH_CON 0x0024
> > +#define OVL_LAYER_SMI_ID_EN BIT(0)
> > #define OVL_BGCLR_SEL_IN BIT(2)
> > #define DISP_REG_OVL_ROI_BGCLR 0x0028
> > #define DISP_REG_OVL_SRC_CON 0x002c
> > @@ -61,6 +62,7 @@ struct mtk_disp_ovl_data {
> > unsigned int gmc_bits;
> > unsigned int layer_nr;
> > bool fmt_rgb565_is_0;
> > + bool smi_id_en;
> > };
> >
> > /**
> > @@ -116,7 +118,17 @@ static void mtk_ovl_disable_vblank(struct mtk_ddp_comp *comp)
> >
> > static void mtk_ovl_start(struct mtk_ddp_comp *comp)
> > {
> > + struct mtk_disp_ovl *ovl = comp_to_ovl(comp);
> > +
> > writel_relaxed(0x1, comp->regs + DISP_REG_OVL_EN);
> > +
> > + if(ovl->data->smi_id_en) {
> > + unsigned int reg;
> > +
> > + reg = readl(comp->regs + DISP_REG_OVL_DATAPATH_CON);
> > + reg = reg | OVL_LAYER_SMI_ID_EN;
> > + writel_relaxed(reg, comp->regs + DISP_REG_OVL_DATAPATH_CON);
>
> I think this setting should before write 1 to DISP_REG_OVL_EN.
>
> > + }
> > }
> >
> > static void mtk_ovl_stop(struct mtk_ddp_comp *comp)
>
> Should clear DISP_REG_OVL_DATAPATH_CON when stop?
>
> Regards,
> Chun-Kuang.
>
> > --
> > 1.8.1.1.dirty
> > _______________________________________________
> > Linux-mediatek mailing list
> > Linux-mediatek@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-mediatek
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
WARNING: multiple messages have this Message-ID (diff)
From: Yongqiang Niu <yongqiang.niu@mediatek.com>
To: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
DTML <devicetree@vger.kernel.org>,
Daniel Vetter <daniel@ffwll.ch>, David Airlie <airlied@linux.ie>,
linux-kernel <linux-kernel@vger.kernel.org>,
DRI Development <dri-devel@lists.freedesktop.org>,
Project_Global_Chrome_Upstream_Group@mediatek.com,
Matthias Brugger <matthias.bgg@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@lists.infradead.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Hsin-Yi Wang <hsinyi@chromium.org>, CK Hu <ck.hu@mediatek.com>,
Linux ARM <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v3, 07/15] drm/mediatek: enable OVL_LAYER_SMI_ID_EN for multi-layer usecase
Date: Thu, 28 Jan 2021 08:43:39 +0800 [thread overview]
Message-ID: <1611794619.1947.0.camel@mhfsdcap03> (raw)
In-Reply-To: <CAAOTY_9_LN8nYSmg42gpR5dLqTe+ABt61WzM8S5cp2D6-rWKyw@mail.gmail.com>
On Tue, 2021-01-12 at 07:59 +0800, Chun-Kuang Hu wrote:
> Hi, Yongqiang:
>
> Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2021年1月11日 週一 下午3:44寫道：
> >
> > enable OVL_LAYER_SMI_ID_EN for multi-layer usecase
>
> Could you describe more information? Without this patch, what would happen?
>
without this patch, ovl will hang up when more than 1 layer enabled
> >
> > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> > ---
> > drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 12 ++++++++++++
> > 1 file changed, 12 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> > index b47c238..4934bee 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> > @@ -23,6 +23,7 @@
> > #define DISP_REG_OVL_RST 0x0014
> > #define DISP_REG_OVL_ROI_SIZE 0x0020
> > #define DISP_REG_OVL_DATAPATH_CON 0x0024
> > +#define OVL_LAYER_SMI_ID_EN BIT(0)
> > #define OVL_BGCLR_SEL_IN BIT(2)
> > #define DISP_REG_OVL_ROI_BGCLR 0x0028
> > #define DISP_REG_OVL_SRC_CON 0x002c
> > @@ -61,6 +62,7 @@ struct mtk_disp_ovl_data {
> > unsigned int gmc_bits;
> > unsigned int layer_nr;
> > bool fmt_rgb565_is_0;
> > + bool smi_id_en;
> > };
> >
> > /**
> > @@ -116,7 +118,17 @@ static void mtk_ovl_disable_vblank(struct mtk_ddp_comp *comp)
> >
> > static void mtk_ovl_start(struct mtk_ddp_comp *comp)
> > {
> > + struct mtk_disp_ovl *ovl = comp_to_ovl(comp);
> > +
> > writel_relaxed(0x1, comp->regs + DISP_REG_OVL_EN);
> > +
> > + if(ovl->data->smi_id_en) {
> > + unsigned int reg;
> > +
> > + reg = readl(comp->regs + DISP_REG_OVL_DATAPATH_CON);
> > + reg = reg | OVL_LAYER_SMI_ID_EN;
> > + writel_relaxed(reg, comp->regs + DISP_REG_OVL_DATAPATH_CON);
>
> I think this setting should before write 1 to DISP_REG_OVL_EN.
>
> > + }
> > }
> >
> > static void mtk_ovl_stop(struct mtk_ddp_comp *comp)
>
> Should clear DISP_REG_OVL_DATAPATH_CON when stop?
>
> Regards,
> Chun-Kuang.
>
> > --
> > 1.8.1.1.dirty
> > _______________________________________________
> > Linux-mediatek mailing list
> > Linux-mediatek@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-mediatek
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Yongqiang Niu <yongqiang.niu@mediatek.com>
To: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
DTML <devicetree@vger.kernel.org>,
David Airlie <airlied@linux.ie>,
linux-kernel <linux-kernel@vger.kernel.org>,
DRI Development <dri-devel@lists.freedesktop.org>,
Project_Global_Chrome_Upstream_Group@mediatek.com,
Matthias Brugger <matthias.bgg@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@lists.infradead.org>,
Hsin-Yi Wang <hsinyi@chromium.org>,
Linux ARM <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v3, 07/15] drm/mediatek: enable OVL_LAYER_SMI_ID_EN for multi-layer usecase
Date: Thu, 28 Jan 2021 08:43:39 +0800 [thread overview]
Message-ID: <1611794619.1947.0.camel@mhfsdcap03> (raw)
In-Reply-To: <CAAOTY_9_LN8nYSmg42gpR5dLqTe+ABt61WzM8S5cp2D6-rWKyw@mail.gmail.com>
On Tue, 2021-01-12 at 07:59 +0800, Chun-Kuang Hu wrote:
> Hi, Yongqiang:
>
> Yongqiang Niu <yongqiang.niu@mediatek.com> 於 2021年1月11日 週一 下午3:44寫道：
> >
> > enable OVL_LAYER_SMI_ID_EN for multi-layer usecase
>
> Could you describe more information? Without this patch, what would happen?
>
without this patch, ovl will hang up when more than 1 layer enabled
> >
> > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
> > ---
> > drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 12 ++++++++++++
> > 1 file changed, 12 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> > index b47c238..4934bee 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> > @@ -23,6 +23,7 @@
> > #define DISP_REG_OVL_RST 0x0014
> > #define DISP_REG_OVL_ROI_SIZE 0x0020
> > #define DISP_REG_OVL_DATAPATH_CON 0x0024
> > +#define OVL_LAYER_SMI_ID_EN BIT(0)
> > #define OVL_BGCLR_SEL_IN BIT(2)
> > #define DISP_REG_OVL_ROI_BGCLR 0x0028
> > #define DISP_REG_OVL_SRC_CON 0x002c
> > @@ -61,6 +62,7 @@ struct mtk_disp_ovl_data {
> > unsigned int gmc_bits;
> > unsigned int layer_nr;
> > bool fmt_rgb565_is_0;
> > + bool smi_id_en;
> > };
> >
> > /**
> > @@ -116,7 +118,17 @@ static void mtk_ovl_disable_vblank(struct mtk_ddp_comp *comp)
> >
> > static void mtk_ovl_start(struct mtk_ddp_comp *comp)
> > {
> > + struct mtk_disp_ovl *ovl = comp_to_ovl(comp);
> > +
> > writel_relaxed(0x1, comp->regs + DISP_REG_OVL_EN);
> > +
> > + if(ovl->data->smi_id_en) {
> > + unsigned int reg;
> > +
> > + reg = readl(comp->regs + DISP_REG_OVL_DATAPATH_CON);
> > + reg = reg | OVL_LAYER_SMI_ID_EN;
> > + writel_relaxed(reg, comp->regs + DISP_REG_OVL_DATAPATH_CON);
>
> I think this setting should before write 1 to DISP_REG_OVL_EN.
>
> > + }
> > }
> >
> > static void mtk_ovl_stop(struct mtk_ddp_comp *comp)
>
> Should clear DISP_REG_OVL_DATAPATH_CON when stop?
>
> Regards,
> Chun-Kuang.
>
> > --
> > 1.8.1.1.dirty
> > _______________________________________________
> > Linux-mediatek mailing list
> > Linux-mediatek@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-mediatek
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2021-01-28 0:45 UTC|newest]
Thread overview: 124+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-11 7:43 [PATCH v3, 00/15] drm/mediatek: add support for mediatek SOC MT8192 Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` [PATCH v3, 01/15] dt-bindings: mediatek: add description for postmask Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 23:30 ` Chun-Kuang Hu
2021-01-11 23:30 ` Chun-Kuang Hu
2021-01-11 23:30 ` Chun-Kuang Hu
2021-01-11 23:30 ` Chun-Kuang Hu
2021-01-14 19:11 ` Rob Herring
2021-01-14 19:11 ` Rob Herring
2021-01-14 19:11 ` Rob Herring
2021-01-14 19:11 ` Rob Herring
2021-01-14 22:29 ` Chun-Kuang Hu
2021-01-14 22:29 ` Chun-Kuang Hu
2021-01-14 22:29 ` Chun-Kuang Hu
2021-01-14 22:29 ` Chun-Kuang Hu
2021-01-11 7:43 ` [PATCH v3, 02/15] dt-bindings: mediatek: add description for mt8192 display Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 23:39 ` Chun-Kuang Hu
2021-01-11 23:39 ` Chun-Kuang Hu
2021-01-11 23:39 ` Chun-Kuang Hu
2021-01-11 23:39 ` Chun-Kuang Hu
2021-01-11 7:43 ` [PATCH v3, 03/15] arm64: dts: mt8192: add display node Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 23:41 ` Chun-Kuang Hu
2021-01-11 23:41 ` Chun-Kuang Hu
2021-01-11 23:41 ` Chun-Kuang Hu
2021-01-11 23:41 ` Chun-Kuang Hu
2021-01-11 7:43 ` [PATCH v3, 04/15] drm/mediatek: add component OVL_2L2 Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 23:45 ` Chun-Kuang Hu
2021-01-11 23:45 ` Chun-Kuang Hu
2021-01-11 23:45 ` Chun-Kuang Hu
2021-01-11 23:45 ` Chun-Kuang Hu
2021-01-11 7:43 ` [PATCH v3, 05/15] drm/mediatek: add component POSTMASK Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 23:49 ` Chun-Kuang Hu
2021-01-11 23:49 ` Chun-Kuang Hu
2021-01-11 23:49 ` Chun-Kuang Hu
2021-01-11 23:49 ` Chun-Kuang Hu
2021-01-26 7:41 ` Hsin-Yi Wang
2021-01-26 7:41 ` Hsin-Yi Wang
2021-01-26 7:41 ` Hsin-Yi Wang
2021-01-26 7:41 ` Hsin-Yi Wang
2021-01-11 7:43 ` [PATCH v3, 06/15] drm/mediatek: add component RDMA4 Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 23:50 ` Chun-Kuang Hu
2021-01-11 23:50 ` Chun-Kuang Hu
2021-01-11 23:50 ` Chun-Kuang Hu
2021-01-11 23:50 ` Chun-Kuang Hu
2021-01-11 7:43 ` [PATCH v3, 07/15] drm/mediatek: enable OVL_LAYER_SMI_ID_EN for multi-layer usecase Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 23:59 ` Chun-Kuang Hu
2021-01-11 23:59 ` Chun-Kuang Hu
2021-01-11 23:59 ` Chun-Kuang Hu
2021-01-11 23:59 ` Chun-Kuang Hu
2021-01-28 0:43 ` Yongqiang Niu [this message]
2021-01-28 0:43 ` Yongqiang Niu
2021-01-28 0:43 ` Yongqiang Niu
2021-01-28 0:43 ` Yongqiang Niu
2021-01-11 7:43 ` [PATCH v3, 08/15] drm/mediatek: check if fb is null Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-12 0:20 ` Chun-Kuang Hu
2021-01-12 0:20 ` Chun-Kuang Hu
2021-01-12 0:20 ` Chun-Kuang Hu
2021-01-12 0:20 ` Chun-Kuang Hu
2021-01-11 7:43 ` [PATCH v3, 09/15] drm/mediatek: Add pm runtime support for gamma Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-12 23:09 ` Chun-Kuang Hu
2021-01-12 23:09 ` Chun-Kuang Hu
2021-01-12 23:09 ` Chun-Kuang Hu
2021-01-12 23:09 ` Chun-Kuang Hu
2021-01-11 7:43 ` [PATCH v3, 10/15] drm/mediatek: Add pm runtime support for color Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` [PATCH v3, 11/15] drm/mediatek: fix aal size config Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-14 22:55 ` Chun-Kuang Hu
2021-01-14 22:55 ` Chun-Kuang Hu
2021-01-14 22:55 ` Chun-Kuang Hu
2021-01-14 22:55 ` Chun-Kuang Hu
2021-01-11 7:43 ` [PATCH v3, 12/15] drm/mediatek: separate ccorr module Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-12 23:15 ` Chun-Kuang Hu
2021-01-12 23:15 ` Chun-Kuang Hu
2021-01-12 23:15 ` Chun-Kuang Hu
2021-01-12 23:15 ` Chun-Kuang Hu
2021-01-11 7:43 ` [PATCH v3, 13/15] drm/mediatek: add matrix bits private data for ccorr Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` [PATCH v3, 14/15] drm/mediatek: add DDP support for MT8192 Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` [PATCH v3, 15/15] drm/mediatek: add support for mediatek SOC MT8192 Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
2021-01-11 7:43 ` Yongqiang Niu
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