From: Weihang Li <liweihang@huawei.com>
To: <dledford@redhat.com>, <jgg@nvidia.com>
Cc: <leon@kernel.org>, <linux-rdma@vger.kernel.org>,
<linuxarm@openeuler.org>
Subject: [PATCH for-next 09/12] RDMA/hns: Refactor post recv flow
Date: Sat, 30 Jan 2021 16:58:07 +0800 [thread overview]
Message-ID: <1611997090-48820-10-git-send-email-liweihang@huawei.com> (raw)
In-Reply-To: <1611997090-48820-1-git-send-email-liweihang@huawei.com>
From: Xi Wang <wangxi11@huawei.com>
Refactor post recv flow by removing unnecessary checking and removing
duplicated code.
Signed-off-by: Xi Wang <wangxi11@huawei.com>
Signed-off-by: Weihang Li <liweihang@huawei.com>
---
drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 81 +++++++++++++++---------------
1 file changed, 41 insertions(+), 40 deletions(-)
diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
index 105019c5..1f70422 100644
--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
+++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c
@@ -48,8 +48,8 @@
#include "hns_roce_hem.h"
#include "hns_roce_hw_v2.h"
-static void set_data_seg_v2(struct hns_roce_v2_wqe_data_seg *dseg,
- struct ib_sge *sg)
+static inline void set_data_seg_v2(struct hns_roce_v2_wqe_data_seg *dseg,
+ struct ib_sge *sg)
{
dseg->lkey = cpu_to_le32(sg->lkey);
dseg->addr = cpu_to_le64(sg->addr);
@@ -729,6 +729,40 @@ static int check_recv_valid(struct hns_roce_dev *hr_dev,
return 0;
}
+static void fill_rq_wqe(struct hns_roce_qp *hr_qp, const struct ib_recv_wr *wr,
+ u32 wqe_idx)
+{
+ struct hns_roce_v2_wqe_data_seg *dseg;
+ struct hns_roce_rinl_sge *sge_list;
+ void *wqe = NULL;
+ int i;
+
+ wqe = hns_roce_get_recv_wqe(hr_qp, wqe_idx);
+ dseg = (struct hns_roce_v2_wqe_data_seg *)wqe;
+ for (i = 0; i < wr->num_sge; i++) {
+ if (!wr->sg_list[i].length)
+ continue;
+ set_data_seg_v2(dseg, wr->sg_list + i);
+ dseg++;
+ }
+
+ if (hr_qp->rq.rsv_sge) {
+ dseg->lkey = cpu_to_le32(HNS_ROCE_INVALID_LKEY);
+ dseg->addr = 0;
+ dseg->len = cpu_to_le32(HNS_ROCE_INVALID_SGE_LENGTH);
+ }
+
+ /* rq support inline data */
+ if (hr_qp->rq_inl_buf.wqe_cnt) {
+ sge_list = hr_qp->rq_inl_buf.wqe_list[wqe_idx].sg_list;
+ hr_qp->rq_inl_buf.wqe_list[wqe_idx].sge_cnt = (u32)wr->num_sge;
+ for (i = 0; i < wr->num_sge; i++) {
+ sge_list[i].addr = (void *)(u64)wr->sg_list[i].addr;
+ sge_list[i].len = wr->sg_list[i].length;
+ }
+ }
+}
+
static int hns_roce_v2_post_recv(struct ib_qp *ibqp,
const struct ib_recv_wr *wr,
const struct ib_recv_wr **bad_wr)
@@ -736,15 +770,9 @@ static int hns_roce_v2_post_recv(struct ib_qp *ibqp,
struct hns_roce_dev *hr_dev = to_hr_dev(ibqp->device);
struct hns_roce_qp *hr_qp = to_hr_qp(ibqp);
struct ib_device *ibdev = &hr_dev->ib_dev;
- struct hns_roce_v2_wqe_data_seg *dseg;
- struct hns_roce_rinl_sge *sge_list;
+ u32 wqe_idx, nreq, max_sge;
unsigned long flags;
- void *wqe = NULL;
- u32 wqe_idx;
- u32 max_sge;
- int nreq;
int ret;
- int i;
spin_lock_irqsave(&hr_qp->rq.lock, flags);
@@ -764,8 +792,6 @@ static int hns_roce_v2_post_recv(struct ib_qp *ibqp,
goto out;
}
- wqe_idx = (hr_qp->rq.head + nreq) & (hr_qp->rq.wqe_cnt - 1);
-
if (unlikely(wr->num_sge > max_sge)) {
ibdev_err(ibdev, "num_sge = %d >= max_sge = %u.\n",
wr->num_sge, max_sge);
@@ -774,32 +800,8 @@ static int hns_roce_v2_post_recv(struct ib_qp *ibqp,
goto out;
}
- wqe = hns_roce_get_recv_wqe(hr_qp, wqe_idx);
- dseg = (struct hns_roce_v2_wqe_data_seg *)wqe;
- for (i = 0; i < wr->num_sge; i++) {
- if (!wr->sg_list[i].length)
- continue;
- set_data_seg_v2(dseg, wr->sg_list + i);
- dseg++;
- }
-
- if (hr_qp->rq.rsv_sge) {
- dseg->lkey = cpu_to_le32(HNS_ROCE_INVALID_LKEY);
- dseg->addr = 0;
- dseg->len = cpu_to_le32(HNS_ROCE_INVALID_SGE_LENGTH);
- }
-
- /* rq support inline data */
- if (hr_qp->rq_inl_buf.wqe_cnt) {
- sge_list = hr_qp->rq_inl_buf.wqe_list[wqe_idx].sg_list;
- hr_qp->rq_inl_buf.wqe_list[wqe_idx].sge_cnt =
- (u32)wr->num_sge;
- for (i = 0; i < wr->num_sge; i++) {
- sge_list[i].addr =
- (void *)(u64)wr->sg_list[i].addr;
- sge_list[i].len = wr->sg_list[i].length;
- }
- }
+ wqe_idx = (hr_qp->rq.head + nreq) & (hr_qp->rq.wqe_cnt - 1);
+ fill_rq_wqe(hr_qp, wr, wqe_idx);
hr_qp->rq.wrid[wqe_idx] = wr->wr_id;
}
@@ -928,9 +930,8 @@ static int hns_roce_v2_post_srq_recv(struct ib_srq *ibsrq,
dseg = (struct hns_roce_v2_wqe_data_seg *)wqe;
for (i = 0; i < wr->num_sge; ++i) {
- dseg[i].len = cpu_to_le32(wr->sg_list[i].length);
- dseg[i].lkey = cpu_to_le32(wr->sg_list[i].lkey);
- dseg[i].addr = cpu_to_le64(wr->sg_list[i].addr);
+ set_data_seg_v2(dseg, wr->sg_list + i);
+ dseg++;
}
if (srq->rsv_sge) {
--
2.8.1
next prev parent reply other threads:[~2021-01-30 9:24 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-30 8:57 [PATCH for-next 00/12] RDMA/hns: Several fixes and cleanups of RQ/SRQ Weihang Li
2021-01-30 8:57 ` [PATCH for-next 01/12] RDMA/hns: Allocate one more recv SGE for HIP08 Weihang Li
2021-01-30 8:58 ` [PATCH for-next 02/12] RDMA/hns: Bugfix for checking whether the srq is full when post wr Weihang Li
2021-01-30 8:58 ` [PATCH for-next 03/12] RDMA/hns: Force srq_limit to 0 when creating SRQ Weihang Li
2021-01-30 8:58 ` [PATCH for-next 04/12] RDMA/hns: Fixed wrong judgments in the goto branch Weihang Li
2021-01-30 8:58 ` [PATCH for-next 05/12] RDMA/hns: Remove the reserved WQE of SRQ Weihang Li
2021-01-30 8:58 ` [PATCH for-next 06/12] RDMA/hns: Refactor hns_roce_create_srq() Weihang Li
2021-01-30 8:58 ` [PATCH for-next 07/12] RDMA/hns: Refactor code about SRQ Context Weihang Li
2021-01-30 8:58 ` [PATCH for-next 08/12] RDMA/hns: Use new interfaces to write SRQC Weihang Li
2021-01-30 8:58 ` Weihang Li [this message]
2021-01-30 8:58 ` [PATCH for-next 10/12] RDMA/hns: Clear remaining unused sges when post_recv Weihang Li
2021-01-30 8:58 ` [PATCH for-next 11/12] RDMA/hns: Refactor hns_roce_v2_post_srq_recv() Weihang Li
2021-01-30 8:58 ` [PATCH for-next 12/12] RDMA/hns: Add verification of QP type when post_recv Weihang Li
2021-02-08 23:43 ` [PATCH for-next 00/12] RDMA/hns: Several fixes and cleanups of RQ/SRQ Jason Gunthorpe
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