From: Abel Vesa <abel.vesa@nxp.com>
To: Rob Herring <robh@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <kernel@pengutronix.de>,
Lucas Stach <l.stach@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
Chanwoo Choi <cw00.choi@samsung.com>,
Georgi Djakov <djakov@kernel.org>,
Dong Aisheng <aisheng.dong@nxp.com>, Peng Fan <peng.fan@nxp.com>,
Martin Kepplinger <martink@posteo.de>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-clk@vger.kernel.org,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Cc: NXP Linux Team <linux-imx@nxp.com>, Abel Vesa <abel.vesa@nxp.com>
Subject: [RFC 17/19] arm64: dts: imx8mq: Add interconnect properties to icc consumer nodes
Date: Fri, 19 Feb 2021 18:00:14 +0200 [thread overview]
Message-ID: <1613750416-11901-18-git-send-email-abel.vesa@nxp.com> (raw)
In-Reply-To: <1613750416-11901-1-git-send-email-abel.vesa@nxp.com>
We add all the properties necessary to control the interconnect
based on the required rates all the way from consumers to the dram.
The fsl,icc-rate specifies the minimum required rate the consumer needs
in order to operate.
For now, only the fec, usdhc1 and usdhc2 are added as consumers.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 6a64b4bf31f5..43760316052f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -1112,6 +1112,9 @@ usdhc1: mmc@30b40000 {
"fsl,imx7d-usdhc";
reg = <0x30b40000 0x10000>;
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+ interconnects = <&icc IMX8MQ_ICM_USDHC1 &icc IMX8MQ_ICS_DRAM>;
+ interconnect-names = "path";
+ fsl,icc-rate = <266666>;
clocks = <&clk IMX8MQ_CLK_IPG_ROOT>,
<&clk IMX8MQ_CLK_NAND_USDHC_BUS>,
<&clk IMX8MQ_CLK_USDHC1_ROOT>;
@@ -1127,6 +1130,9 @@ usdhc2: mmc@30b50000 {
"fsl,imx7d-usdhc";
reg = <0x30b50000 0x10000>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+ interconnects = <&icc IMX8MQ_ICM_USDHC2 &icc IMX8MQ_ICS_DRAM>;
+ interconnect-names = "path";
+ fsl,icc-rate = <266666>;
clocks = <&clk IMX8MQ_CLK_IPG_ROOT>,
<&clk IMX8MQ_CLK_NAND_USDHC_BUS>,
<&clk IMX8MQ_CLK_USDHC2_ROOT>;
@@ -1169,6 +1175,9 @@ fec1: ethernet@30be0000 {
<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+ interconnects = <&icc IMX8MQ_ICM_ENET &icc IMX8MQ_ICS_DRAM>;
+ interconnect-names = "path";
+ fsl,icc-rate = <800000>;
clocks = <&clk IMX8MQ_CLK_ENET1_ROOT>,
<&clk IMX8MQ_CLK_ENET1_ROOT>,
<&clk IMX8MQ_CLK_ENET_TIMER>,
--
2.29.2
WARNING: multiple messages have this Message-ID (diff)
From: Abel Vesa <abel.vesa@nxp.com>
To: Rob Herring <robh@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <kernel@pengutronix.de>,
Lucas Stach <l.stach@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
Chanwoo Choi <cw00.choi@samsung.com>,
Georgi Djakov <djakov@kernel.org>,
Dong Aisheng <aisheng.dong@nxp.com>, Peng Fan <peng.fan@nxp.com>,
Martin Kepplinger <martink@posteo.de>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-clk@vger.kernel.org,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Cc: NXP Linux Team <linux-imx@nxp.com>, Abel Vesa <abel.vesa@nxp.com>
Subject: [RFC 17/19] arm64: dts: imx8mq: Add interconnect properties to icc consumer nodes
Date: Fri, 19 Feb 2021 18:00:14 +0200 [thread overview]
Message-ID: <1613750416-11901-18-git-send-email-abel.vesa@nxp.com> (raw)
In-Reply-To: <1613750416-11901-1-git-send-email-abel.vesa@nxp.com>
We add all the properties necessary to control the interconnect
based on the required rates all the way from consumers to the dram.
The fsl,icc-rate specifies the minimum required rate the consumer needs
in order to operate.
For now, only the fec, usdhc1 and usdhc2 are added as consumers.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 6a64b4bf31f5..43760316052f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -1112,6 +1112,9 @@ usdhc1: mmc@30b40000 {
"fsl,imx7d-usdhc";
reg = <0x30b40000 0x10000>;
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+ interconnects = <&icc IMX8MQ_ICM_USDHC1 &icc IMX8MQ_ICS_DRAM>;
+ interconnect-names = "path";
+ fsl,icc-rate = <266666>;
clocks = <&clk IMX8MQ_CLK_IPG_ROOT>,
<&clk IMX8MQ_CLK_NAND_USDHC_BUS>,
<&clk IMX8MQ_CLK_USDHC1_ROOT>;
@@ -1127,6 +1130,9 @@ usdhc2: mmc@30b50000 {
"fsl,imx7d-usdhc";
reg = <0x30b50000 0x10000>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+ interconnects = <&icc IMX8MQ_ICM_USDHC2 &icc IMX8MQ_ICS_DRAM>;
+ interconnect-names = "path";
+ fsl,icc-rate = <266666>;
clocks = <&clk IMX8MQ_CLK_IPG_ROOT>,
<&clk IMX8MQ_CLK_NAND_USDHC_BUS>,
<&clk IMX8MQ_CLK_USDHC2_ROOT>;
@@ -1169,6 +1175,9 @@ fec1: ethernet@30be0000 {
<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+ interconnects = <&icc IMX8MQ_ICM_ENET &icc IMX8MQ_ICS_DRAM>;
+ interconnect-names = "path";
+ fsl,icc-rate = <800000>;
clocks = <&clk IMX8MQ_CLK_ENET1_ROOT>,
<&clk IMX8MQ_CLK_ENET1_ROOT>,
<&clk IMX8MQ_CLK_ENET_TIMER>,
--
2.29.2
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next prev parent reply other threads:[~2021-02-19 16:07 UTC|newest]
Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-19 15:59 [RFC 00/19] Rework support for i.MX8MQ interconnect with devfreq Abel Vesa
2021-02-19 15:59 ` Abel Vesa
2021-02-19 15:59 ` [RFC 01/19] clk: imx8mq: Replace critical with ignore_unused flag for dram_apb clock Abel Vesa
2021-02-19 15:59 ` Abel Vesa
2021-02-19 15:59 ` [RFC 02/19] dt-bindings: interconnect: imx8mq: Add missing pl301 and SAI ids Abel Vesa
2021-02-19 15:59 ` Abel Vesa
2021-03-05 23:10 ` Rob Herring
2021-03-05 23:10 ` Rob Herring
2021-02-19 16:00 ` [RFC 03/19] devfreq: imx-bus: Switch governor to powersave Abel Vesa
2021-02-19 16:00 ` Abel Vesa
2021-02-26 14:46 ` Chanwoo Choi
2021-02-26 14:46 ` Chanwoo Choi
2021-02-19 16:00 ` [RFC 04/19] devfreq: imx-bus: Decouple imx-bus from icc made Abel Vesa
2021-02-19 16:00 ` Abel Vesa
2021-02-26 16:52 ` Chanwoo Choi
2021-02-26 16:52 ` Chanwoo Choi
2021-02-19 16:00 ` [RFC 05/19] devfreq: imx8m-ddrc: Change governor to powersave Abel Vesa
2021-02-19 16:00 ` Abel Vesa
2021-02-26 14:47 ` Chanwoo Choi
2021-02-26 14:47 ` Chanwoo Choi
2021-03-09 13:40 ` Dong Aisheng
2021-03-09 13:40 ` Dong Aisheng
2021-02-19 16:00 ` [RFC 06/19] devfreq: imx8m-ddrc: Use the opps acquired from EL3 Abel Vesa
2021-02-19 16:00 ` Abel Vesa
2021-02-26 15:12 ` Chanwoo Choi
2021-02-26 15:12 ` Chanwoo Choi
2021-02-19 16:00 ` [RFC 07/19] devfreq: imx8m-ddrc: Add late system sleep PM ops Abel Vesa
2021-02-19 16:00 ` Abel Vesa
2021-02-26 15:23 ` Chanwoo Choi
2021-02-26 15:23 ` Chanwoo Choi
2021-02-19 16:00 ` [RFC 08/19] interconnect: imx: Switch from imx_icc_node_adj_desc to fsl,icc-id node assignment Abel Vesa
2021-02-19 16:00 ` [RFC 08/19] interconnect: imx: Switch from imx_icc_node_adj_desc to fsl, icc-id " Abel Vesa
2021-02-19 16:00 ` [RFC 09/19] interconnect: imx8: Remove the imx_icc_node_adj_desc Abel Vesa
2021-02-19 16:00 ` Abel Vesa
2021-02-19 16:00 ` [RFC 10/19] interconnect: imx8mq: Add the pl301_per_m and pl301_wakeup nodes and subnodes Abel Vesa
2021-02-19 16:00 ` Abel Vesa
2021-02-19 16:00 ` [RFC 11/19] interconnect: imx8mq: Add of_match_table Abel Vesa
2021-02-19 16:00 ` Abel Vesa
2021-02-19 16:00 ` [RFC 12/19] interconnect: imx: Add imx_icc_get_bw and imx_icc_aggregate functions Abel Vesa
2021-02-19 16:00 ` Abel Vesa
2021-02-19 16:00 ` [RFC 13/19] arm64: dts: imx8mq: Add fsl,icc-id property to ddrc node Abel Vesa
2021-02-19 16:00 ` Abel Vesa
2021-02-19 16:00 ` [RFC 14/19] arm64: dts: imx8mq: Add fsl,icc-id to noc node Abel Vesa
2021-02-19 16:00 ` Abel Vesa
2021-02-19 16:29 ` Abel Vesa
2021-02-19 16:29 ` Abel Vesa
2021-02-19 16:00 ` [RFC 15/19] arm64: dts: imx8mq: Add all pl301 nodes Abel Vesa
2021-02-19 16:00 ` Abel Vesa
2021-02-21 15:47 ` Krzysztof Kozlowski
2021-02-21 15:47 ` Krzysztof Kozlowski
2021-02-19 16:00 ` [RFC 16/19] arm64: dts: imx8mq: Add the interconnect node Abel Vesa
2021-02-19 16:00 ` Abel Vesa
2021-02-19 16:00 ` Abel Vesa [this message]
2021-02-19 16:00 ` [RFC 17/19] arm64: dts: imx8mq: Add interconnect properties to icc consumer nodes Abel Vesa
2021-02-19 16:00 ` [RFC 18/19] net: ethernet: fec_main: Add interconnect support Abel Vesa
2021-02-19 16:00 ` Abel Vesa
2021-02-19 16:00 ` [RFC 19/19] mmc: sdhci-esdhc-imx: " Abel Vesa
2021-02-19 16:00 ` Abel Vesa
2021-02-22 16:03 ` [RFC 00/19] Rework support for i.MX8MQ interconnect with devfreq Martin Kepplinger
2021-02-22 16:03 ` Martin Kepplinger
2021-02-23 17:20 ` Abel Vesa
2021-02-23 17:20 ` Abel Vesa
2021-02-25 12:13 ` Martin Kepplinger
2021-02-25 12:13 ` Martin Kepplinger
2021-03-09 11:43 ` Abel Vesa
2021-03-09 11:43 ` Abel Vesa
2021-03-24 8:03 ` Martin Kepplinger
2021-03-24 8:03 ` Martin Kepplinger
2021-02-26 23:04 ` Chanwoo Choi
2021-02-26 23:04 ` Chanwoo Choi
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