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From: Wang Xingang <wangxingang5@huawei.com>
To: <qemu-devel@nongnu.org>
Cc: xieyingtai@huawei.com, peter.maydell@linaro.org,
	cenjiahui@huawei.com, wangxingang5@huawei.com, mst@redhat.com,
	shannon.zhaosl@gmail.com, qemu-arm@nongnu.org,
	imammedo@redhat.com
Subject: [RFC RESEND PATCH 3/4] hw/pci: Add pci_root_bus_max_bus
Date: Sat, 27 Feb 2021 08:33:50 +0000	[thread overview]
Message-ID: <1614414831-39712-4-git-send-email-wangxingang5@huawei.com> (raw)
In-Reply-To: <1614414831-39712-1-git-send-email-wangxingang5@huawei.com>

From: Xingang Wang <wangxingang5@huawei.com>

This helps to find max bus number of a root bus.

Signed-off-by: Xingang Wang <wangxingang5@huawei.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
---
 hw/pci/pci.c         | 33 +++++++++++++++++++++++++++++++++
 include/hw/pci/pci.h |  1 +
 2 files changed, 34 insertions(+)

diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index dc969989c9..ed92ce0971 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -516,6 +516,39 @@ int pci_bus_num(PCIBus *s)
     return PCI_BUS_GET_CLASS(s)->bus_num(s);
 }
 
+int pci_root_bus_max_bus(PCIBus *bus)
+{
+    PCIHostState *host;
+    int max_bus = 0;
+    int type;
+    int devfn;
+
+    if (!pci_bus_is_root(bus)) {
+        return 0;
+    }
+
+    host = PCI_HOST_BRIDGE(BUS(bus)->parent);
+    max_bus = pci_bus_num(host->bus);
+
+    for (devfn = 0; devfn < ARRAY_SIZE(host->bus->devices); devfn++) {
+        PCIDevice *dev = host->bus->devices[devfn];
+
+        if (!dev) {
+            continue;
+        }
+
+        type = dev->config[PCI_HEADER_TYPE] & ~PCI_HEADER_TYPE_MULTI_FUNCTION;
+        if (type == PCI_HEADER_TYPE_BRIDGE) {
+            uint8_t subordinate = dev->config[PCI_SUBORDINATE_BUS];
+            if (subordinate > max_bus) {
+                max_bus = subordinate;
+            }
+        }
+    }
+
+    return max_bus;
+}
+
 int pci_bus_numa_node(PCIBus *bus)
 {
     return PCI_BUS_GET_CLASS(bus)->numa_node(bus);
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 1bc231480f..238b91817a 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -449,6 +449,7 @@ static inline PCIBus *pci_get_bus(const PCIDevice *dev)
     return PCI_BUS(qdev_get_parent_bus(DEVICE(dev)));
 }
 int pci_bus_num(PCIBus *s);
+int pci_root_bus_max_bus(PCIBus *bus);
 static inline int pci_dev_bus_num(const PCIDevice *dev)
 {
     return pci_bus_num(pci_get_bus(dev));
-- 
2.19.1



  parent reply	other threads:[~2021-02-27  8:36 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-27  8:33 [RFC RESEND PATCH 0/4] hw/arm/virt-acpi-build: Introduce iommu option for pci root bus Wang Xingang
2021-02-27  8:33 ` [RFC RESEND PATCH 1/4] pci: Add PCI_BUS_IOMMU property Wang Xingang
2021-03-10 10:25   ` Auger Eric
2021-03-11 11:59     ` Wang Xingang
2021-02-27  8:33 ` [RFC RESEND PATCH 2/4] hw/pci: Add iommu option for pci root bus Wang Xingang
2021-03-10 10:24   ` Auger Eric
2021-03-11 12:24     ` Wang Xingang
2021-03-14 12:11       ` Auger Eric
2021-02-27  8:33 ` Wang Xingang [this message]
2021-02-27  8:33 ` [RFC RESEND PATCH 4/4] hw/arm/virt-acpi-build: Add explicit idmap info in IORT table Wang Xingang
2021-03-09 10:44 ` [RFC RESEND PATCH 0/4] hw/arm/virt-acpi-build: Introduce iommu option for pci root bus Wang Xingang
2021-03-09 14:36 ` Auger Eric
2021-03-10  2:13   ` Wang Xingang
2021-03-10 10:18     ` Auger Eric
2021-03-11 11:57       ` Wang Xingang
2021-03-14 12:02         ` Auger Eric

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