[PATCH v1 0/3] Add irq support to accommodate SC7280 target

From: Krishna Manikandan <mkrishn@codeaurora.org>
To: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org,
	freedreno@lists.freedesktop.org
Cc: Krishna Manikandan <mkrishn@codeaurora.org>,
	linux-kernel@vger.kernel.org, robdclark@gmail.com,
	kalyan_t@codeaurora.org, dianders@chromium.org
Subject: [PATCH v1 0/3] Add irq support to accommodate SC7280 target
Date: Tue,  6 Apr 2021 11:31:32 +0530	[thread overview]
Message-ID: <1617688895-26275-1-git-send-email-mkrishn@codeaurora.org> (raw)

The changes in this series adds all the irq related changes which are needed to
support EDP interface coming on sc7280 target.

Changes in this series:
        - Currently each interrupt register has a range of 32 indexes only.
          But with the introduction of VSYNC and UNDERRUN irq for INTF_5,
          the number of irqs under INTR_STATUS will exceed this value.
          Increase the range of each interrupt register to 64 indexes
          to handle this.

        - Changes are added to enable the vsync and underrun irqs for INTF_5 which
          is required for edp panel.

        - Some irqs which are applicable for sdm845 target are obsolete for sc7180
          and sc7280 targets. Support is added to skip all the obsolete irqs based on
          the target.

Krishna Manikandan (3):
  drm/msm/disp/dpu1: increase the range of interrupts in dpu_irq_map
  drm/msm/disp/dpu1: add vsync and underrun irqs for INTF_5
  drm/msm/disp/dpu1: add flags to indicate obsolete irqs

 drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c      |   4 +-
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c    |   9 +
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h    |   2 +
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 773 +++++++++++++++++++---
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h |   5 +-
 5 files changed, 692 insertions(+), 101 deletions(-)

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2.7.4