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From: Taylor Simpson <tsimpson@quicinc.com>
To: qemu-devel@nongnu.org
Cc: ale@rev.ng, philmd@redhat.com, tsimpson@quicinc.com,
	richard.henderson@linaro.org, bcain@quicinc.com
Subject: [PATCH v3 04/26] Hexagon (target/hexagon) use env_archcpu and env_cpu
Date: Wed,  7 Apr 2021 20:57:25 -0500	[thread overview]
Message-ID: <1617847067-9867-5-git-send-email-tsimpson@quicinc.com> (raw)
In-Reply-To: <1617847067-9867-1-git-send-email-tsimpson@quicinc.com>

Remove hexagon_env_get_cpu and replace with env_archcpu
Replace CPU(hexagon_env_get_cpu(env)) with env_cpu(env)

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
---
 linux-user/hexagon/cpu_loop.c | 2 +-
 target/hexagon/cpu.c          | 4 ++--
 target/hexagon/cpu.h          | 5 -----
 target/hexagon/op_helper.c    | 2 +-
 target/hexagon/translate.c    | 2 +-
 5 files changed, 5 insertions(+), 10 deletions(-)

diff --git a/linux-user/hexagon/cpu_loop.c b/linux-user/hexagon/cpu_loop.c
index 9a68ca0..bc34f5d 100644
--- a/linux-user/hexagon/cpu_loop.c
+++ b/linux-user/hexagon/cpu_loop.c
@@ -25,7 +25,7 @@
 
 void cpu_loop(CPUHexagonState *env)
 {
-    CPUState *cs = CPU(hexagon_env_get_cpu(env));
+    CPUState *cs = env_cpu(env);
     int trapnr, signum, sigcode;
     target_ulong sigaddr;
     target_ulong syscallnum;
diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index c2fe357..f044506 100644
--- a/target/hexagon/cpu.c
+++ b/target/hexagon/cpu.c
@@ -71,7 +71,7 @@ const char * const hexagon_regnames[TOTAL_PER_THREAD_REGS] = {
  */
 static target_ulong adjust_stack_ptrs(CPUHexagonState *env, target_ulong addr)
 {
-    HexagonCPU *cpu = hexagon_env_get_cpu(env);
+    HexagonCPU *cpu = env_archcpu(env);
     target_ulong stack_adjust = cpu->lldb_stack_adjust;
     target_ulong stack_start = env->stack_start;
     target_ulong stack_size = 0x10000;
@@ -115,7 +115,7 @@ static void print_reg(FILE *f, CPUHexagonState *env, int regnum)
 
 static void hexagon_dump(CPUHexagonState *env, FILE *f)
 {
-    HexagonCPU *cpu = hexagon_env_get_cpu(env);
+    HexagonCPU *cpu = env_archcpu(env);
 
     if (cpu->lldb_compat) {
         /*
diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h
index e04eac5..2855dd3 100644
--- a/target/hexagon/cpu.h
+++ b/target/hexagon/cpu.h
@@ -127,11 +127,6 @@ typedef struct HexagonCPU {
     target_ulong lldb_stack_adjust;
 } HexagonCPU;
 
-static inline HexagonCPU *hexagon_env_get_cpu(CPUHexagonState *env)
-{
-    return container_of(env, HexagonCPU, env);
-}
-
 #include "cpu_bits.h"
 
 #define cpu_signal_handler cpu_hexagon_signal_handler
diff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c
index 5d35dfc..7ac8554 100644
--- a/target/hexagon/op_helper.c
+++ b/target/hexagon/op_helper.c
@@ -35,7 +35,7 @@ static void QEMU_NORETURN do_raise_exception_err(CPUHexagonState *env,
                                                  uint32_t exception,
                                                  uintptr_t pc)
 {
-    CPUState *cs = CPU(hexagon_env_get_cpu(env));
+    CPUState *cs = env_cpu(env);
     qemu_log_mask(CPU_LOG_INT, "%s: %d\n", __func__, exception);
     cs->exception_index = exception;
     cpu_loop_exit_restore(cs, pc);
diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c
index f975d7a..e235fdb 100644
--- a/target/hexagon/translate.c
+++ b/target/hexagon/translate.c
@@ -585,7 +585,7 @@ static void hexagon_tr_translate_packet(DisasContextBase *dcbase, CPUState *cpu)
          * The CPU log is used to compare against LLDB single stepping,
          * so end the TLB after every packet.
          */
-        HexagonCPU *hex_cpu = hexagon_env_get_cpu(env);
+        HexagonCPU *hex_cpu = env_archcpu(env);
         if (hex_cpu->lldb_compat && qemu_loglevel_mask(CPU_LOG_TB_CPU)) {
             ctx->base.is_jmp = DISAS_TOO_MANY;
         }
-- 
2.7.4



  parent reply	other threads:[~2021-04-08  2:08 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-08  1:57 [PATCH v3 00/26] Hexagon (target/hexagon) update Taylor Simpson
2021-04-08  1:57 ` [PATCH v3 01/26] Hexagon (target/hexagon) TCG generation cleanup Taylor Simpson
2021-04-08  1:57 ` [PATCH v3 02/26] Hexagon (target/hexagon) cleanup gen_log_predicated_reg_write_pair Taylor Simpson
2021-04-08 19:05   ` Richard Henderson
2021-04-08  1:57 ` [PATCH v3 03/26] Hexagon (target/hexagon) remove unnecessary inline directives Taylor Simpson
2021-04-08  1:57 ` Taylor Simpson [this message]
2021-04-08  1:57 ` [PATCH v3 05/26] Hexagon (target/hexagon) properly generate TB end for DISAS_NORETURN Taylor Simpson
2021-04-08  1:57 ` [PATCH v3 06/26] Hexagon (target/hexagon) decide if pred has been written at TCG gen time Taylor Simpson
2021-04-08  1:57 ` [PATCH v3 07/26] Hexagon (target/hexagon) change variables from int to bool when appropriate Taylor Simpson
2021-04-08  1:57 ` [PATCH v3 08/26] Hexagon (target/hexagon) remove unused carry_from_add64 function Taylor Simpson
2021-04-08  1:57 ` [PATCH v3 09/26] Hexagon (target/hexagon) change type of softfloat_roundingmodes Taylor Simpson
2021-04-08  1:57 ` [PATCH v3 10/26] Hexagon (target/hexagon) use softfloat default NaN and tininess Taylor Simpson
2021-04-08  1:57 ` [PATCH v3 11/26] Hexagon (target/hexagon) replace float32_mul_pow2 with float32_scalbn Taylor Simpson
2021-04-08  1:57 ` [PATCH v3 12/26] Hexagon (target/hexagon) use softfloat for float-to-int conversions Taylor Simpson
2021-04-08  1:57 ` [PATCH v3 13/26] Hexagon (target/hexagon) cleanup ternary operators in semantics Taylor Simpson
2021-04-08 19:17   ` Richard Henderson
2021-04-08  1:57 ` [PATCH v3 14/26] Hexagon (target/hexagon) cleanup reg_field_info definition Taylor Simpson
2021-04-08 19:18   ` Richard Henderson
2021-04-08  1:57 ` [PATCH v3 15/26] Hexagon (target/hexagon) move QEMU_GENERATE to only be on during macros.h Taylor Simpson
2021-04-08 19:19   ` Richard Henderson
2021-04-08  1:57 ` [PATCH v3 16/26] Hexagon (target/hexagon) compile all debug code Taylor Simpson
2021-04-08 19:23   ` Richard Henderson
2021-04-08  1:57 ` [PATCH v3 17/26] Hexagon (target/hexagon) add F2_sfrecipa instruction Taylor Simpson
2021-04-08  1:57 ` [PATCH v3 18/26] Hexagon (target/hexagon) add F2_sfinvsqrta Taylor Simpson
2021-04-08  1:57 ` [PATCH v3 19/26] Hexagon (target/hexagon) add A5_ACS (vacsh) Taylor Simpson
2021-04-08 19:28   ` Richard Henderson
2021-04-08  1:57 ` [PATCH v3 20/26] Hexagon (target/hexagon) add A6_vminub_RdP Taylor Simpson
2021-04-08  1:57 ` [PATCH v3 21/26] Hexagon (target/hexagon) add A4_addp_c/A4_subp_c Taylor Simpson
2021-04-08  1:57 ` [PATCH v3 22/26] Hexagon (target/hexagon) circular addressing Taylor Simpson
2021-04-08 19:39   ` Richard Henderson
2021-04-08  1:57 ` [PATCH v3 23/26] Hexagon (target/hexagon) bit reverse (brev) addressing Taylor Simpson
2021-04-08  1:57 ` [PATCH v3 24/26] Hexagon (target/hexagon) load and unpack bytes instructions Taylor Simpson
2021-04-08  1:57 ` [PATCH v3 25/26] Hexagon (target/hexagon) load into shifted register instructions Taylor Simpson
2021-04-08  1:57 ` [PATCH v3 26/26] Hexagon (target/hexagon) CABAC decode bin Taylor Simpson

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