From: Taylor Simpson <tsimpson@quicinc.com>
To: qemu-devel@nongnu.org
Cc: ale@rev.ng, philmd@redhat.com, tsimpson@quicinc.com,
richard.henderson@linaro.org, bcain@quicinc.com
Subject: [PATCH v3 07/26] Hexagon (target/hexagon) change variables from int to bool when appropriate
Date: Wed, 7 Apr 2021 20:57:28 -0500 [thread overview]
Message-ID: <1617847067-9867-8-git-send-email-tsimpson@quicinc.com> (raw)
In-Reply-To: <1617847067-9867-1-git-send-email-tsimpson@quicinc.com>
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
---
target/hexagon/cpu_bits.h | 2 +-
target/hexagon/decode.c | 80 +++++++++++++++++++++++-----------------------
target/hexagon/insn.h | 21 ++++++------
target/hexagon/op_helper.c | 8 ++---
target/hexagon/translate.c | 6 ++--
target/hexagon/translate.h | 2 +-
6 files changed, 60 insertions(+), 59 deletions(-)
diff --git a/target/hexagon/cpu_bits.h b/target/hexagon/cpu_bits.h
index 96af834..96fef71 100644
--- a/target/hexagon/cpu_bits.h
+++ b/target/hexagon/cpu_bits.h
@@ -47,7 +47,7 @@ static inline uint32_t iclass_bits(uint32_t encoding)
return iclass;
}
-static inline int is_packet_end(uint32_t endocing)
+static inline bool is_packet_end(uint32_t endocing)
{
uint32_t bits = parse_bits(endocing);
return ((bits == 0x3) || (bits == 0x0));
diff --git a/target/hexagon/decode.c b/target/hexagon/decode.c
index 65d97ce..dffe1d1 100644
--- a/target/hexagon/decode.c
+++ b/target/hexagon/decode.c
@@ -340,8 +340,8 @@ static void decode_split_cmpjump(Packet *pkt)
if (GET_ATTRIB(pkt->insn[i].opcode, A_NEWCMPJUMP)) {
last = pkt->num_insns;
pkt->insn[last] = pkt->insn[i]; /* copy the instruction */
- pkt->insn[last].part1 = 1; /* last instruction does the CMP */
- pkt->insn[i].part1 = 0; /* existing instruction does the JUMP */
+ pkt->insn[last].part1 = true; /* last insn does the CMP */
+ pkt->insn[i].part1 = false; /* existing insn does the JUMP */
pkt->num_insns++;
}
}
@@ -354,7 +354,7 @@ static void decode_split_cmpjump(Packet *pkt)
}
}
-static int decode_opcode_can_jump(int opcode)
+static bool decode_opcode_can_jump(int opcode)
{
if ((GET_ATTRIB(opcode, A_JUMP)) ||
(GET_ATTRIB(opcode, A_CALL)) ||
@@ -362,15 +362,15 @@ static int decode_opcode_can_jump(int opcode)
(opcode == J2_pause)) {
/* Exception to A_JUMP attribute */
if (opcode == J4_hintjumpr) {
- return 0;
+ return false;
}
- return 1;
+ return true;
}
- return 0;
+ return false;
}
-static int decode_opcode_ends_loop(int opcode)
+static bool decode_opcode_ends_loop(int opcode)
{
return GET_ATTRIB(opcode, A_HWLOOP0_END) ||
GET_ATTRIB(opcode, A_HWLOOP1_END);
@@ -383,9 +383,9 @@ static void decode_set_insn_attr_fields(Packet *pkt)
int numinsns = pkt->num_insns;
uint16_t opcode;
- pkt->pkt_has_cof = 0;
- pkt->pkt_has_endloop = 0;
- pkt->pkt_has_dczeroa = 0;
+ pkt->pkt_has_cof = false;
+ pkt->pkt_has_endloop = false;
+ pkt->pkt_has_dczeroa = false;
for (i = 0; i < numinsns; i++) {
opcode = pkt->insn[i].opcode;
@@ -394,14 +394,14 @@ static void decode_set_insn_attr_fields(Packet *pkt)
}
if (GET_ATTRIB(opcode, A_DCZEROA)) {
- pkt->pkt_has_dczeroa = 1;
+ pkt->pkt_has_dczeroa = true;
}
if (GET_ATTRIB(opcode, A_STORE)) {
if (pkt->insn[i].slot == 0) {
- pkt->pkt_has_store_s0 = 1;
+ pkt->pkt_has_store_s0 = true;
} else {
- pkt->pkt_has_store_s1 = 1;
+ pkt->pkt_has_store_s1 = true;
}
}
@@ -422,9 +422,9 @@ static void decode_set_insn_attr_fields(Packet *pkt)
*/
static void decode_shuffle_for_execution(Packet *packet)
{
- int changed = 0;
+ bool changed = false;
int i;
- int flag; /* flag means we've seen a non-memory instruction */
+ bool flag; /* flag means we've seen a non-memory instruction */
int n_mems;
int last_insn = packet->num_insns - 1;
@@ -437,7 +437,7 @@ static void decode_shuffle_for_execution(Packet *packet)
}
do {
- changed = 0;
+ changed = false;
/*
* Stores go last, must not reorder.
* Cannot shuffle stores past loads, either.
@@ -445,13 +445,13 @@ static void decode_shuffle_for_execution(Packet *packet)
* then a store, shuffle the store to the front. Don't shuffle
* stores wrt each other or a load.
*/
- for (flag = n_mems = 0, i = last_insn; i >= 0; i--) {
+ for (flag = false, n_mems = 0, i = last_insn; i >= 0; i--) {
int opcode = packet->insn[i].opcode;
if (flag && GET_ATTRIB(opcode, A_STORE)) {
decode_send_insn_to(packet, i, last_insn - n_mems);
n_mems++;
- changed = 1;
+ changed = true;
} else if (GET_ATTRIB(opcode, A_STORE)) {
n_mems++;
} else if (GET_ATTRIB(opcode, A_LOAD)) {
@@ -466,7 +466,7 @@ static void decode_shuffle_for_execution(Packet *packet)
* a .new value
*/
} else {
- flag = 1;
+ flag = true;
}
}
@@ -474,7 +474,7 @@ static void decode_shuffle_for_execution(Packet *packet)
continue;
}
/* Compares go first, may be reordered wrt each other */
- for (flag = 0, i = 0; i < last_insn + 1; i++) {
+ for (flag = false, i = 0; i < last_insn + 1; i++) {
int opcode = packet->insn[i].opcode;
if ((strstr(opcode_wregs[opcode], "Pd4") ||
@@ -483,7 +483,7 @@ static void decode_shuffle_for_execution(Packet *packet)
/* This should be a compare (not a store conditional) */
if (flag) {
decode_send_insn_to(packet, i, 0);
- changed = 1;
+ changed = true;
continue;
}
} else if (GET_ATTRIB(opcode, A_IMPLICIT_WRITES_P3) &&
@@ -495,18 +495,18 @@ static void decode_shuffle_for_execution(Packet *packet)
*/
if (flag) {
decode_send_insn_to(packet, i, 0);
- changed = 1;
+ changed = true;
continue;
}
} else if (GET_ATTRIB(opcode, A_IMPLICIT_WRITES_P0) &&
!GET_ATTRIB(opcode, A_NEWCMPJUMP)) {
if (flag) {
decode_send_insn_to(packet, i, 0);
- changed = 1;
+ changed = true;
continue;
}
} else {
- flag = 1;
+ flag = true;
}
}
if (changed) {
@@ -543,7 +543,7 @@ static void decode_apply_extenders(Packet *packet)
int i;
for (i = 0; i < packet->num_insns; i++) {
if (GET_ATTRIB(packet->insn[i].opcode, A_IT_EXTENDER)) {
- packet->insn[i + 1].extension_valid = 1;
+ packet->insn[i + 1].extension_valid = true;
apply_extender(packet, i + 1, packet->insn[i].immed[0]);
}
}
@@ -764,7 +764,7 @@ static void decode_add_endloop_insn(Insn *insn, int loopnum)
}
}
-static int decode_parsebits_is_loopend(uint32_t encoding32)
+static bool decode_parsebits_is_loopend(uint32_t encoding32)
{
uint32_t bits = parse_bits(encoding32);
return bits == 0x2;
@@ -775,8 +775,11 @@ decode_set_slot_number(Packet *pkt)
{
int slot;
int i;
- int hit_mem_insn = 0;
- int hit_duplex = 0;
+ bool hit_mem_insn = false;
+ bool hit_duplex = false;
+ bool slot0_found = false;
+ bool slot1_found = false;
+ int slot1_iidx = 0;
/*
* The slots are encoded in reverse order
@@ -801,7 +804,7 @@ decode_set_slot_number(Packet *pkt)
if ((GET_ATTRIB(pkt->insn[i].opcode, A_MEMLIKE) ||
GET_ATTRIB(pkt->insn[i].opcode, A_MEMLIKE_PACKET_RULES)) &&
!hit_mem_insn) {
- hit_mem_insn = 1;
+ hit_mem_insn = true;
pkt->insn[i].slot = 0;
continue;
}
@@ -818,7 +821,7 @@ decode_set_slot_number(Packet *pkt)
for (i = pkt->num_insns - 1; i >= 0; i--) {
/* First subinsn always goes to slot 0 */
if (GET_ATTRIB(pkt->insn[i].opcode, A_SUBINSN) && !hit_duplex) {
- hit_duplex = 1;
+ hit_duplex = true;
pkt->insn[i].slot = 0;
continue;
}
@@ -830,13 +833,10 @@ decode_set_slot_number(Packet *pkt)
}
/* Fix the exceptions - slot 1 is never empty, always aligns to slot 0 */
- int slot0_found = 0;
- int slot1_found = 0;
- int slot1_iidx = 0;
for (i = pkt->num_insns - 1; i >= 0; i--) {
/* Is slot0 used? */
if (pkt->insn[i].slot == 0) {
- int is_endloop = (pkt->insn[i].opcode == J2_endloop01);
+ bool is_endloop = (pkt->insn[i].opcode == J2_endloop01);
is_endloop |= (pkt->insn[i].opcode == J2_endloop0);
is_endloop |= (pkt->insn[i].opcode == J2_endloop1);
@@ -845,17 +845,17 @@ decode_set_slot_number(Packet *pkt)
* slot0 for endloop
*/
if (!is_endloop) {
- slot0_found = 1;
+ slot0_found = true;
}
}
/* Is slot1 used? */
if (pkt->insn[i].slot == 1) {
- slot1_found = 1;
+ slot1_found = true;
slot1_iidx = i;
}
}
/* Is slot0 empty and slot1 used? */
- if ((slot0_found == 0) && (slot1_found == 1)) {
+ if ((!slot0_found) && slot1_found) {
/* Then push it to slot0 */
pkt->insn[slot1_iidx].slot = 0;
}
@@ -873,7 +873,7 @@ int decode_packet(int max_words, const uint32_t *words, Packet *pkt,
{
int num_insns = 0;
int words_read = 0;
- int end_of_packet = 0;
+ bool end_of_packet = false;
int new_insns = 0;
uint32_t encoding32;
@@ -890,7 +890,7 @@ int decode_packet(int max_words, const uint32_t *words, Packet *pkt,
* decode works
*/
if (pkt->insn[num_insns].opcode == A4_ext) {
- pkt->insn[num_insns + 1].extension_valid = 1;
+ pkt->insn[num_insns + 1].extension_valid = true;
}
num_insns += new_insns;
words_read++;
@@ -913,7 +913,7 @@ int decode_packet(int max_words, const uint32_t *words, Packet *pkt,
decode_add_endloop_insn(&pkt->insn[pkt->num_insns++], 0);
}
if (words_read >= 3) {
- uint32_t has_loop0, has_loop1;
+ bool has_loop0, has_loop1;
has_loop0 = decode_parsebits_is_loopend(words[0]);
has_loop1 = decode_parsebits_is_loopend(words[1]);
if (has_loop0 && has_loop1) {
diff --git a/target/hexagon/insn.h b/target/hexagon/insn.h
index 5756a1d..2e34591 100644
--- a/target/hexagon/insn.h
+++ b/target/hexagon/insn.h
@@ -40,14 +40,15 @@ struct Instruction {
uint32_t iclass:6;
uint32_t slot:3;
- uint32_t part1:1; /*
+ uint32_t which_extended:1; /* If has an extender, which immediate */
+ uint32_t new_value_producer_slot:4;
+
+ bool part1; /*
* cmp-jumps are split into two insns.
* set for the compare and clear for the jump
*/
- uint32_t extension_valid:1; /* Has a constant extender attached */
- uint32_t which_extended:1; /* If has an extender, which immediate */
- uint32_t is_endloop:1; /* This is an end of loop */
- uint32_t new_value_producer_slot:4;
+ bool extension_valid; /* Has a constant extender attached */
+ bool is_endloop; /* This is an end of loop */
int32_t immed[IMMEDS_MAX]; /* immediate field */
};
@@ -58,13 +59,13 @@ struct Packet {
uint16_t encod_pkt_size_in_bytes;
/* Pre-decodes about COF */
- uint32_t pkt_has_cof:1; /* Has any change-of-flow */
- uint32_t pkt_has_endloop:1;
+ bool pkt_has_cof; /* Has any change-of-flow */
+ bool pkt_has_endloop;
- uint32_t pkt_has_dczeroa:1;
+ bool pkt_has_dczeroa;
- uint32_t pkt_has_store_s0:1;
- uint32_t pkt_has_store_s1:1;
+ bool pkt_has_store_s0;
+ bool pkt_has_store_s1;
Insn insn[INSTRUCTIONS_MAX];
};
diff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c
index 7ac8554..1d91fa2 100644
--- a/target/hexagon/op_helper.c
+++ b/target/hexagon/op_helper.c
@@ -948,8 +948,8 @@ static bool is_inf_prod(int32_t a, int32_t b)
float32 HELPER(sffma_lib)(CPUHexagonState *env, float32 RxV,
float32 RsV, float32 RtV)
{
- int infinp;
- int infminusinf;
+ bool infinp;
+ bool infminusinf;
float32 tmp;
arch_fpop_start(env);
@@ -982,8 +982,8 @@ float32 HELPER(sffma_lib)(CPUHexagonState *env, float32 RxV,
float32 HELPER(sffms_lib)(CPUHexagonState *env, float32 RxV,
float32 RsV, float32 RtV)
{
- int infinp;
- int infminusinf;
+ bool infinp;
+ bool infminusinf;
float32 tmp;
arch_fpop_start(env);
diff --git a/target/hexagon/translate.c b/target/hexagon/translate.c
index 49ec8b7..0468422 100644
--- a/target/hexagon/translate.c
+++ b/target/hexagon/translate.c
@@ -177,7 +177,7 @@ static void gen_start_packet(DisasContext *ctx, Packet *pkt)
ctx->store_width[i] = 0;
}
tcg_gen_movi_tl(hex_pkt_has_store_s1, pkt->pkt_has_store_s1);
- ctx->s1_store_processed = 0;
+ ctx->s1_store_processed = false;
#if HEX_DEBUG
/* Handy place to set a breakpoint before the packet executes */
@@ -210,7 +210,7 @@ static void mark_implicit_reg_write(DisasContext *ctx, Insn *insn,
int attrib, int rnum)
{
if (GET_ATTRIB(insn->opcode, attrib)) {
- int is_predicated = GET_ATTRIB(insn->opcode, A_CONDEXEC);
+ bool is_predicated = GET_ATTRIB(insn->opcode, A_CONDEXEC);
if (is_predicated && !is_preloaded(ctx, rnum)) {
tcg_gen_mov_tl(hex_new_value[rnum], hex_gpr[rnum]);
}
@@ -354,7 +354,7 @@ void process_store(DisasContext *ctx, Packet *pkt, int slot_num)
if (slot_num == 1 && ctx->s1_store_processed) {
return;
}
- ctx->s1_store_processed = 1;
+ ctx->s1_store_processed = true;
if (is_predicated) {
TCGv cancelled = tcg_temp_new();
diff --git a/target/hexagon/translate.h b/target/hexagon/translate.h
index 0ecfbd7..97b12a7 100644
--- a/target/hexagon/translate.h
+++ b/target/hexagon/translate.h
@@ -36,7 +36,7 @@ typedef struct DisasContext {
int preg_log_idx;
DECLARE_BITMAP(pregs_written, NUM_PREGS);
uint8_t store_width[STORES_MAX];
- uint8_t s1_store_processed;
+ bool s1_store_processed;
} DisasContext;
static inline void ctx_log_reg_write(DisasContext *ctx, int rnum)
--
2.7.4
next prev parent reply other threads:[~2021-04-08 1:59 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-08 1:57 [PATCH v3 00/26] Hexagon (target/hexagon) update Taylor Simpson
2021-04-08 1:57 ` [PATCH v3 01/26] Hexagon (target/hexagon) TCG generation cleanup Taylor Simpson
2021-04-08 1:57 ` [PATCH v3 02/26] Hexagon (target/hexagon) cleanup gen_log_predicated_reg_write_pair Taylor Simpson
2021-04-08 19:05 ` Richard Henderson
2021-04-08 1:57 ` [PATCH v3 03/26] Hexagon (target/hexagon) remove unnecessary inline directives Taylor Simpson
2021-04-08 1:57 ` [PATCH v3 04/26] Hexagon (target/hexagon) use env_archcpu and env_cpu Taylor Simpson
2021-04-08 1:57 ` [PATCH v3 05/26] Hexagon (target/hexagon) properly generate TB end for DISAS_NORETURN Taylor Simpson
2021-04-08 1:57 ` [PATCH v3 06/26] Hexagon (target/hexagon) decide if pred has been written at TCG gen time Taylor Simpson
2021-04-08 1:57 ` Taylor Simpson [this message]
2021-04-08 1:57 ` [PATCH v3 08/26] Hexagon (target/hexagon) remove unused carry_from_add64 function Taylor Simpson
2021-04-08 1:57 ` [PATCH v3 09/26] Hexagon (target/hexagon) change type of softfloat_roundingmodes Taylor Simpson
2021-04-08 1:57 ` [PATCH v3 10/26] Hexagon (target/hexagon) use softfloat default NaN and tininess Taylor Simpson
2021-04-08 1:57 ` [PATCH v3 11/26] Hexagon (target/hexagon) replace float32_mul_pow2 with float32_scalbn Taylor Simpson
2021-04-08 1:57 ` [PATCH v3 12/26] Hexagon (target/hexagon) use softfloat for float-to-int conversions Taylor Simpson
2021-04-08 1:57 ` [PATCH v3 13/26] Hexagon (target/hexagon) cleanup ternary operators in semantics Taylor Simpson
2021-04-08 19:17 ` Richard Henderson
2021-04-08 1:57 ` [PATCH v3 14/26] Hexagon (target/hexagon) cleanup reg_field_info definition Taylor Simpson
2021-04-08 19:18 ` Richard Henderson
2021-04-08 1:57 ` [PATCH v3 15/26] Hexagon (target/hexagon) move QEMU_GENERATE to only be on during macros.h Taylor Simpson
2021-04-08 19:19 ` Richard Henderson
2021-04-08 1:57 ` [PATCH v3 16/26] Hexagon (target/hexagon) compile all debug code Taylor Simpson
2021-04-08 19:23 ` Richard Henderson
2021-04-08 1:57 ` [PATCH v3 17/26] Hexagon (target/hexagon) add F2_sfrecipa instruction Taylor Simpson
2021-04-08 1:57 ` [PATCH v3 18/26] Hexagon (target/hexagon) add F2_sfinvsqrta Taylor Simpson
2021-04-08 1:57 ` [PATCH v3 19/26] Hexagon (target/hexagon) add A5_ACS (vacsh) Taylor Simpson
2021-04-08 19:28 ` Richard Henderson
2021-04-08 1:57 ` [PATCH v3 20/26] Hexagon (target/hexagon) add A6_vminub_RdP Taylor Simpson
2021-04-08 1:57 ` [PATCH v3 21/26] Hexagon (target/hexagon) add A4_addp_c/A4_subp_c Taylor Simpson
2021-04-08 1:57 ` [PATCH v3 22/26] Hexagon (target/hexagon) circular addressing Taylor Simpson
2021-04-08 19:39 ` Richard Henderson
2021-04-08 1:57 ` [PATCH v3 23/26] Hexagon (target/hexagon) bit reverse (brev) addressing Taylor Simpson
2021-04-08 1:57 ` [PATCH v3 24/26] Hexagon (target/hexagon) load and unpack bytes instructions Taylor Simpson
2021-04-08 1:57 ` [PATCH v3 25/26] Hexagon (target/hexagon) load into shifted register instructions Taylor Simpson
2021-04-08 1:57 ` [PATCH v3 26/26] Hexagon (target/hexagon) CABAC decode bin Taylor Simpson
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