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From: Stephen Boyd <sboyd@kernel.org>
To: "Andreas Färber" <afaerber@suse.de>,
	"Cristian Ciocaltea" <cristian.ciocaltea@gmail.com>,
	"Edgar Bernardi Righi" <edgar.righi@lsitec.org.br>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	"Michael Turquette" <mturquette@baylibre.com>,
	"Rob Herring" <robh+dt@kernel.org>
Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org
Subject: Re: [PATCH v3 3/6] clk: actions: Fix bisp_factor_table based clocks on Owl S500 SoC
Date: Sun, 27 Jun 2021 18:47:07 -0700	[thread overview]
Message-ID: <162484482710.3259633.13588609804522862763@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <e675820a46cd9930d8d576c6cae61d41c1a8416f.1623354574.git.cristian.ciocaltea@gmail.com>

Quoting Cristian Ciocaltea (2021-06-10 13:05:23)
> The following clocks of the Actions Semi Owl S500 SoC have been defined
> to use a shared clock factor table 'bisp_factor_table[]': DE[1-2], VCE,
> VDE, BISP, SENSOR[0-1]
> 
> There are several issues involved in this approach:
> 
> * 'bisp_factor_table[]' describes the configuration of a regular 8-rates
>   divider, so its usage is redundant. Additionally, judging by the BISP
>   clock context, it is incomplete since it maps only 8 out of 12
>   possible entries.
> 
> * The clocks mentioned above are not identical in terms of the available
>   rates, therefore cannot rely on the same factor table. Specifically,
>   BISP and SENSOR* are standard 12-rate dividers so their configuration
>   should rely on a proper clock div table, while VCE and VDE require a
>   factor table that is a actually a subset of the one needed for DE[1-2]
>   clocks.
> 
> Let's fix this by implementing the following:
> 
> * Add new factor tables 'de_factor_table' and 'hde_factor_table' to
>   properly handle DE[1-2], VCE and VDE clocks.
> 
> * Add a common div table 'std12rate_div_table' for BISP and SENSOR[0-1]
>   clocks converted to OWL_COMP_DIV.
> 
> * Drop the now unused 'bisp_factor_table[]'.
> 
> Additionally, drop the CLK_IGNORE_UNUSED flag for SENSOR[0-1] since
> there is no reason to always keep ON those clocks.
> 
> Fixes: ed6b4795ece4 ("clk: actions: Add clock driver for S500 SoC")
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---

Applied to clk-next

WARNING: multiple messages have this Message-ID (diff)
From: Stephen Boyd <sboyd@kernel.org>
To: "Andreas Färber" <afaerber@suse.de>,
	"Cristian Ciocaltea" <cristian.ciocaltea@gmail.com>,
	"Edgar Bernardi Righi" <edgar.righi@lsitec.org.br>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	"Michael Turquette" <mturquette@baylibre.com>,
	"Rob Herring" <robh+dt@kernel.org>
Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org
Subject: Re: [PATCH v3 3/6] clk: actions: Fix bisp_factor_table based clocks on Owl S500 SoC
Date: Sun, 27 Jun 2021 18:47:07 -0700	[thread overview]
Message-ID: <162484482710.3259633.13588609804522862763@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <e675820a46cd9930d8d576c6cae61d41c1a8416f.1623354574.git.cristian.ciocaltea@gmail.com>

Quoting Cristian Ciocaltea (2021-06-10 13:05:23)
> The following clocks of the Actions Semi Owl S500 SoC have been defined
> to use a shared clock factor table 'bisp_factor_table[]': DE[1-2], VCE,
> VDE, BISP, SENSOR[0-1]
> 
> There are several issues involved in this approach:
> 
> * 'bisp_factor_table[]' describes the configuration of a regular 8-rates
>   divider, so its usage is redundant. Additionally, judging by the BISP
>   clock context, it is incomplete since it maps only 8 out of 12
>   possible entries.
> 
> * The clocks mentioned above are not identical in terms of the available
>   rates, therefore cannot rely on the same factor table. Specifically,
>   BISP and SENSOR* are standard 12-rate dividers so their configuration
>   should rely on a proper clock div table, while VCE and VDE require a
>   factor table that is a actually a subset of the one needed for DE[1-2]
>   clocks.
> 
> Let's fix this by implementing the following:
> 
> * Add new factor tables 'de_factor_table' and 'hde_factor_table' to
>   properly handle DE[1-2], VCE and VDE clocks.
> 
> * Add a common div table 'std12rate_div_table' for BISP and SENSOR[0-1]
>   clocks converted to OWL_COMP_DIV.
> 
> * Drop the now unused 'bisp_factor_table[]'.
> 
> Additionally, drop the CLK_IGNORE_UNUSED flag for SENSOR[0-1] since
> there is no reason to always keep ON those clocks.
> 
> Fixes: ed6b4795ece4 ("clk: actions: Add clock driver for S500 SoC")
> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---

Applied to clk-next

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  reply	other threads:[~2021-06-28  1:47 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-10 20:05 [PATCH v3 0/6] Improve clock support for Actions S500 SoC Cristian Ciocaltea
2021-06-10 20:05 ` Cristian Ciocaltea
2021-06-10 20:05 ` [PATCH v3 1/6] clk: actions: Fix UART clock dividers on Owl " Cristian Ciocaltea
2021-06-10 20:05   ` Cristian Ciocaltea
2021-06-28  1:46   ` Stephen Boyd
2021-06-28  1:46     ` Stephen Boyd
2021-06-10 20:05 ` [PATCH v3 2/6] clk: actions: Fix SD clocks factor table " Cristian Ciocaltea
2021-06-10 20:05   ` Cristian Ciocaltea
2021-06-28  1:47   ` Stephen Boyd
2021-06-28  1:47     ` Stephen Boyd
2021-06-10 20:05 ` [PATCH v3 3/6] clk: actions: Fix bisp_factor_table based clocks " Cristian Ciocaltea
2021-06-10 20:05   ` Cristian Ciocaltea
2021-06-28  1:47   ` Stephen Boyd [this message]
2021-06-28  1:47     ` Stephen Boyd
2021-06-10 20:05 ` [PATCH v3 4/6] clk: actions: Fix AHPPREDIV-H-AHB clock chain " Cristian Ciocaltea
2021-06-10 20:05   ` Cristian Ciocaltea
2021-06-11  4:11   ` Manivannan Sadhasivam
2021-06-11  4:11     ` Manivannan Sadhasivam
2021-06-28  1:47   ` Stephen Boyd
2021-06-28  1:47     ` Stephen Boyd
2021-06-10 20:05 ` [PATCH v3 5/6] dt-bindings: clock: Add NIC and ETHERNET bindings for Actions " Cristian Ciocaltea
2021-06-10 20:05   ` Cristian Ciocaltea
2021-06-28  1:47   ` Stephen Boyd
2021-06-28  1:47     ` Stephen Boyd
2021-06-10 20:05 ` [PATCH v3 6/6] clk: actions: Add NIC and ETHERNET clock support " Cristian Ciocaltea
2021-06-10 20:05   ` Cristian Ciocaltea
2021-06-28  1:47   ` Stephen Boyd
2021-06-28  1:47     ` Stephen Boyd
2021-06-16 16:06 ` [PATCH v3 0/6] Improve " Cristian Ciocaltea
2021-06-16 16:06   ` Cristian Ciocaltea

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