From: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
To: Mark Brown <broonie@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Pratyush Yadav <p.yadav@ti.com>,
Michal Simek <michal.simek@xilinx.com>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-spi@vger.kernel.org>, <git@xilinx.com>,
<saikrishna12468@gmail.com>, Arnd Bergmann <arnd@arndb.de>,
Nobuhiro Iwamatsu <iwamatsu@nigauri.org>,
Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Subject: [PATCH 2/4] dt-bindings: spi: cadence-quadspi: Add support for Xilinx Versal OSPI
Date: Fri, 24 Sep 2021 15:37:09 +0530 [thread overview]
Message-ID: <1632478031-12242-3-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com> (raw)
In-Reply-To: <1632478031-12242-1-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com>
Add new compatible to support Cadence Octal SPI(OSPI) controller on
Xilinx Versal SoCs, also add power-domains property to the properties
list and marked as required for Xilinx Versal OSPI compatible.
Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
---
.../devicetree/bindings/spi/cdns,qspi-nor.yaml | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
index 0e7087cc8bf9..ca155abbda7a 100644
--- a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
+++ b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
@@ -11,6 +11,14 @@ maintainers:
allOf:
- $ref: spi-controller.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: xlnx,versal-ospi-1.0
+ then:
+ required:
+ - power-domains
properties:
compatible:
@@ -20,6 +28,7 @@ properties:
- ti,k2g-qspi
- ti,am654-ospi
- intel,lgm-qspi
+ - xlnx,versal-ospi-1.0
- const: cdns,qspi-nor
- const: cdns,qspi-nor
@@ -65,6 +74,9 @@ properties:
data rather than the QSPI clock. Make sure that QSPI return clock
is populated on the board before using this property.
+ power-domains:
+ maxItems: 1
+
resets:
maxItems: 2
--
2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
To: Mark Brown <broonie@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Pratyush Yadav <p.yadav@ti.com>,
Michal Simek <michal.simek@xilinx.com>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-spi@vger.kernel.org>, <git@xilinx.com>,
<saikrishna12468@gmail.com>, Arnd Bergmann <arnd@arndb.de>,
Nobuhiro Iwamatsu <iwamatsu@nigauri.org>,
Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Subject: [PATCH 2/4] dt-bindings: spi: cadence-quadspi: Add support for Xilinx Versal OSPI
Date: Fri, 24 Sep 2021 15:37:09 +0530 [thread overview]
Message-ID: <1632478031-12242-3-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com> (raw)
In-Reply-To: <1632478031-12242-1-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com>
Add new compatible to support Cadence Octal SPI(OSPI) controller on
Xilinx Versal SoCs, also add power-domains property to the properties
list and marked as required for Xilinx Versal OSPI compatible.
Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
---
.../devicetree/bindings/spi/cdns,qspi-nor.yaml | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
index 0e7087cc8bf9..ca155abbda7a 100644
--- a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
+++ b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml
@@ -11,6 +11,14 @@ maintainers:
allOf:
- $ref: spi-controller.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: xlnx,versal-ospi-1.0
+ then:
+ required:
+ - power-domains
properties:
compatible:
@@ -20,6 +28,7 @@ properties:
- ti,k2g-qspi
- ti,am654-ospi
- intel,lgm-qspi
+ - xlnx,versal-ospi-1.0
- const: cdns,qspi-nor
- const: cdns,qspi-nor
@@ -65,6 +74,9 @@ properties:
data rather than the QSPI clock. Make sure that QSPI return clock
is populated on the board before using this property.
+ power-domains:
+ maxItems: 1
+
resets:
maxItems: 2
--
2.17.1
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next prev parent reply other threads:[~2021-09-24 10:10 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-24 10:07 [PATCH 0/4] spi: cadence-quadspi: Add Xilinx Versal OSPI support Sai Krishna Potthuri
2021-09-24 10:07 ` Sai Krishna Potthuri
2021-09-24 10:07 ` [PATCH 1/4] firmware: xilinx: Add OSPI Mux selection support Sai Krishna Potthuri
2021-09-24 10:07 ` Sai Krishna Potthuri
2021-09-24 11:36 ` Greg Kroah-Hartman
2021-09-24 11:36 ` Greg Kroah-Hartman
2021-09-24 12:12 ` Michal Simek
2021-09-24 12:12 ` Michal Simek
2021-09-24 12:22 ` Greg Kroah-Hartman
2021-09-24 12:22 ` Greg Kroah-Hartman
2021-09-24 12:49 ` Michal Simek
2021-09-24 12:49 ` Michal Simek
2021-09-24 13:44 ` Greg Kroah-Hartman
2021-09-24 13:44 ` Greg Kroah-Hartman
2021-09-24 10:07 ` Sai Krishna Potthuri [this message]
2021-09-24 10:07 ` [PATCH 2/4] dt-bindings: spi: cadence-quadspi: Add support for Xilinx Versal OSPI Sai Krishna Potthuri
2021-09-24 12:45 ` Rob Herring
2021-09-24 12:45 ` Rob Herring
2021-10-04 16:59 ` Rob Herring
2021-10-04 16:59 ` Rob Herring
2021-09-24 10:07 ` [PATCH 3/4] spi: cadence-quadspi: Add OSPI support for Xilinx Versal SoC Sai Krishna Potthuri
2021-09-24 10:07 ` Sai Krishna Potthuri
2021-09-24 10:07 ` [PATCH 4/4] spi: cadence-quadspi: Add Xilinx Versal external DMA support Sai Krishna Potthuri
2021-09-24 10:07 ` Sai Krishna Potthuri
2021-10-02 0:16 ` [PATCH 0/4] spi: cadence-quadspi: Add Xilinx Versal OSPI support Mark Brown
2021-10-02 0:16 ` Mark Brown
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