From: Song Gao <gaosong@loongson.cn>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, thuth@redhat.com,
chenhuacai@loongson.cn, philmd@redhat.com, i.qemu@xen0n.name,
richard.henderson@linaro.org, laurent@vivier.eu,
peterx@redhat.com, f4bug@amsat.org, yangxiaojuan@loongson.cn,
alistair.francis@wdc.com, maobibo@loongson.cn,
pbonzini@redhat.com, bmeng.cn@gmail.com, alex.bennee@linaro.org,
gaosong@loongson.cn
Subject: [PATCH v8 03/29] target/loongarch: Add main translation routines
Date: Mon, 1 Nov 2021 17:51:25 +0800 [thread overview]
Message-ID: <1635760311-20015-4-git-send-email-gaosong@loongson.cn> (raw)
In-Reply-To: <1635760311-20015-1-git-send-email-gaosong@loongson.cn>
This patch adds main translation routines and
basic functions for translation.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
---
target/loongarch/helper.h | 9 +++
target/loongarch/op_helper.c | 22 ++++++
target/loongarch/translate.c | 160 +++++++++++++++++++++++++++++++++++++++++++
target/loongarch/translate.h | 27 ++++++++
4 files changed, 218 insertions(+)
create mode 100644 target/loongarch/helper.h
create mode 100644 target/loongarch/op_helper.c
create mode 100644 target/loongarch/translate.c
create mode 100644 target/loongarch/translate.h
diff --git a/target/loongarch/helper.h b/target/loongarch/helper.h
new file mode 100644
index 0000000..09bfcfd
--- /dev/null
+++ b/target/loongarch/helper.h
@@ -0,0 +1,9 @@
+/*
+ * QEMU LoongArch CPU
+ *
+ * Copyright (c) 2021 Loongson Technology Corporation Limited
+ *
+ * SPDX-License-Identifier: LGPL-2.1+
+ */
+
+DEF_HELPER_2(raise_exception, noreturn, env, i32)
diff --git a/target/loongarch/op_helper.c b/target/loongarch/op_helper.c
new file mode 100644
index 0000000..c22bdee
--- /dev/null
+++ b/target/loongarch/op_helper.c
@@ -0,0 +1,22 @@
+/*
+ * LoongArch emulation helpers for QEMU.
+ *
+ * Copyright (c) 2021 Loongson Technology Corporation Limited
+ *
+ * SPDX-License-Identifier: LGPL-2.1+
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/main-loop.h"
+#include "cpu.h"
+#include "qemu/host-utils.h"
+#include "exec/helper-proto.h"
+#include "exec/exec-all.h"
+#include "exec/cpu_ldst.h"
+#include "internals.h"
+
+/* Exceptions helpers */
+void helper_raise_exception(CPULoongArchState *env, uint32_t exception)
+{
+ do_raise_exception(env, exception, GETPC());
+}
diff --git a/target/loongarch/translate.c b/target/loongarch/translate.c
new file mode 100644
index 0000000..b449af7
--- /dev/null
+++ b/target/loongarch/translate.c
@@ -0,0 +1,160 @@
+/*
+ * LoongArch emulation for QEMU - main translation routines.
+ *
+ * Copyright (c) 2021 Loongson Technology Corporation Limited
+ *
+ * SPDX-License-Identifier: LGPL-2.1+
+ */
+
+#include "qemu/osdep.h"
+#include "cpu.h"
+#include "tcg/tcg-op.h"
+#include "exec/translator.h"
+#include "exec/helper-proto.h"
+#include "exec/helper-gen.h"
+
+#include "exec/translator.h"
+#include "exec/log.h"
+#include "qemu/qemu-print.h"
+#include "translate.h"
+#include "internals.h"
+
+/* Global register indices */
+TCGv cpu_gpr[32], cpu_pc;
+static TCGv cpu_lladdr, cpu_llval;
+TCGv_i32 cpu_fcsr0;
+TCGv_i64 cpu_fpr[32];
+
+#define DISAS_STOP DISAS_TARGET_0
+
+void generate_exception(DisasContext *ctx, int excp)
+{
+ tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next);
+ gen_helper_raise_exception(cpu_env, tcg_constant_i32(excp));
+ ctx->base.is_jmp = DISAS_NORETURN;
+}
+
+static inline void gen_goto_tb(DisasContext *ctx, int n, target_ulong dest)
+{
+ if (translator_use_goto_tb(&ctx->base, dest)) {
+ tcg_gen_goto_tb(n);
+ tcg_gen_movi_tl(cpu_pc, dest);
+ tcg_gen_exit_tb(ctx->base.tb, n);
+ } else {
+ tcg_gen_movi_tl(cpu_pc, dest);
+ tcg_gen_lookup_and_goto_ptr();
+ }
+}
+
+static void loongarch_tr_init_disas_context(DisasContextBase *dcbase,
+ CPUState *cs)
+{
+ int64_t bound;
+ DisasContext *ctx = container_of(dcbase, DisasContext, base);
+
+ ctx->page_start = ctx->base.pc_first & TARGET_PAGE_MASK;
+ ctx->mem_idx = MMU_USER_IDX;
+
+ /* Bound the number of insns to execute to those left on the page. */
+ bound = -(ctx->base.pc_first | TARGET_PAGE_MASK) / 4;
+ ctx->base.max_insns = MIN(ctx->base.max_insns, bound);
+}
+
+static void loongarch_tr_tb_start(DisasContextBase *dcbase, CPUState *cs)
+{
+}
+
+static void loongarch_tr_insn_start(DisasContextBase *dcbase, CPUState *cs)
+{
+ DisasContext *ctx = container_of(dcbase, DisasContext, base);
+
+ tcg_gen_insn_start(ctx->base.pc_next);
+}
+
+static void loongarch_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
+{
+ CPULoongArchState *env = cs->env_ptr;
+ DisasContext *ctx = container_of(dcbase, DisasContext, base);
+
+ ctx->opcode = cpu_ldl_code(env, ctx->base.pc_next);
+
+ if (!decode(ctx, ctx->opcode)) {
+ qemu_log_mask(LOG_UNIMP, "Error: unkown opcode. 0x%lx: 0x%x\n",
+ ctx->base.pc_next, ctx->opcode);
+ generate_exception(ctx, EXCP_INE);
+ }
+
+ ctx->base.pc_next += 4;
+}
+
+static void loongarch_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs)
+{
+ DisasContext *ctx = container_of(dcbase, DisasContext, base);
+
+ switch (ctx->base.is_jmp) {
+ case DISAS_STOP:
+ tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next);
+ tcg_gen_lookup_and_goto_ptr();
+ break;
+ case DISAS_TOO_MANY:
+ gen_goto_tb(ctx, 0, ctx->base.pc_next);
+ break;
+ case DISAS_NORETURN:
+ break;
+ default:
+ g_assert_not_reached();
+ }
+}
+
+static void loongarch_tr_disas_log(const DisasContextBase *dcbase, CPUState *cs)
+{
+ qemu_log("IN: %s\n", lookup_symbol(dcbase->pc_first));
+ log_target_disas(cs, dcbase->pc_first, dcbase->tb->size);
+}
+
+static const TranslatorOps loongarch_tr_ops = {
+ .init_disas_context = loongarch_tr_init_disas_context,
+ .tb_start = loongarch_tr_tb_start,
+ .insn_start = loongarch_tr_insn_start,
+ .translate_insn = loongarch_tr_translate_insn,
+ .tb_stop = loongarch_tr_tb_stop,
+ .disas_log = loongarch_tr_disas_log,
+};
+
+void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
+{
+ DisasContext ctx;
+
+ translator_loop(&loongarch_tr_ops, &ctx.base, cs, tb, max_insns);
+}
+
+void loongarch_translate_init(void)
+{
+ int i;
+
+ cpu_gpr[0] = NULL;
+ for (i = 1; i < 32; i++) {
+ cpu_gpr[i] = tcg_global_mem_new(cpu_env,
+ offsetof(CPULoongArchState, gpr[i]),
+ regnames[i]);
+ }
+
+ for (i = 0; i < 32; i++) {
+ int off = offsetof(CPULoongArchState, fpr[i]);
+ cpu_fpr[i] = tcg_global_mem_new_i64(cpu_env, off, fregnames[i]);
+ }
+
+ cpu_pc = tcg_global_mem_new(cpu_env, offsetof(CPULoongArchState, pc), "pc");
+ cpu_fcsr0 = tcg_global_mem_new_i32(cpu_env,
+ offsetof(CPULoongArchState, fcsr0), "fcsr0");
+ cpu_lladdr = tcg_global_mem_new(cpu_env,
+ offsetof(CPULoongArchState, lladdr), "lladdr");
+ cpu_llval = tcg_global_mem_new(cpu_env,
+ offsetof(CPULoongArchState, llval), "llval");
+}
+
+void restore_state_to_opc(CPULoongArchState *env, TranslationBlock *tb,
+ target_ulong *data)
+{
+ env->pc = data[0];
+}
diff --git a/target/loongarch/translate.h b/target/loongarch/translate.h
new file mode 100644
index 0000000..dff7d79
--- /dev/null
+++ b/target/loongarch/translate.h
@@ -0,0 +1,27 @@
+/*
+ * LoongArch translation routines.
+ *
+ * Copyright (c) 2021 Loongson Technology Corporation Limited
+ *
+ * SPDX-License-Identifier: LGPL-2.1+
+ */
+
+#ifndef TARGET_LOONGARCH_TRANSLATE_H
+#define TARGET_LOONGARCH_TRANSLATE_H
+
+#include "exec/translator.h"
+
+typedef struct DisasContext {
+ DisasContextBase base;
+ target_ulong page_start;
+ uint32_t opcode;
+ int mem_idx;
+} DisasContext;
+
+void generate_exception(DisasContext *ctx, int excp);
+
+extern TCGv cpu_gpr[32], cpu_pc;
+extern TCGv_i32 cpu_fscr0;
+extern TCGv_i64 cpu_fpr[32];
+
+#endif
--
1.8.3.1
next prev parent reply other threads:[~2021-11-01 9:55 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-01 9:51 [PATCH v8 00/29] Add LoongArch linux-user emulation support Song Gao
2021-11-01 9:51 ` [PATCH v8 01/29] target/loongarch: Add README Song Gao
2021-11-01 9:51 ` [PATCH v8 02/29] target/loongarch: Add core definition Song Gao
2021-11-02 8:38 ` Philippe Mathieu-Daudé
2021-11-02 12:54 ` gaosong
2021-11-01 9:51 ` Song Gao [this message]
2021-11-01 9:51 ` [PATCH v8 04/29] target/loongarch: Add fixed point arithmetic instruction translation Song Gao
2021-11-01 9:51 ` [PATCH v8 05/29] target/loongarch: Add fixed point shift " Song Gao
2021-11-01 9:51 ` [PATCH v8 06/29] target/loongarch: Add fixed point bit " Song Gao
2021-11-01 9:51 ` [PATCH v8 07/29] target/loongarch: Add fixed point load/store " Song Gao
2021-11-01 9:51 ` [PATCH v8 08/29] target/loongarch: Add fixed point atomic " Song Gao
2021-11-01 9:51 ` [PATCH v8 09/29] target/loongarch: Add fixed point extra " Song Gao
2021-11-01 9:51 ` [PATCH v8 10/29] target/loongarch: Add floating point arithmetic " Song Gao
2021-11-01 9:51 ` [PATCH v8 11/29] target/loongarch: Add floating point comparison " Song Gao
2021-11-01 9:51 ` [PATCH v8 12/29] target/loongarch: Add floating point conversion " Song Gao
2021-11-01 9:51 ` [PATCH v8 13/29] target/loongarch: Add floating point move " Song Gao
2021-11-01 9:51 ` [PATCH v8 14/29] target/loongarch: Add floating point load/store " Song Gao
2021-11-01 9:51 ` [PATCH v8 15/29] target/loongarch: Add branch " Song Gao
2021-11-01 9:51 ` [PATCH v8 16/29] target/loongarch: Add disassembler Song Gao
2021-11-01 9:51 ` [PATCH v8 17/29] linux-user: Add LoongArch generic header files Song Gao
2021-11-01 9:51 ` [PATCH v8 18/29] linux-user: Add LoongArch specific structures Song Gao
2021-11-01 9:51 ` [PATCH v8 19/29] linux-user: Add LoongArch signal support Song Gao
2021-11-01 9:51 ` [PATCH v8 20/29] linux-user: Add LoongArch elf support Song Gao
2021-11-01 9:51 ` [PATCH v8 21/29] linux-user: Add LoongArch syscall support Song Gao
2021-11-01 9:51 ` [PATCH v8 22/29] linux-user: Add LoongArch cpu_loop support Song Gao
2021-11-01 9:51 ` [PATCH v8 23/29] linux-user: Add host dependency for LoongArch 64-bit Song Gao
2021-11-01 9:51 ` [PATCH v8 24/29] default-configs: Add loongarch linux-user support Song Gao
2021-11-01 9:51 ` [PATCH v8 25/29] target/loongarch: Add target build suport Song Gao
2021-11-01 9:51 ` [PATCH v8 26/29] target/loongarch: 'make check-tcg' support Song Gao
2021-11-02 13:56 ` Alex Bennée
2021-11-01 9:51 ` [PATCH v8 27/29] scripts: add loongarch64 binfmt config Song Gao
2021-11-01 9:51 ` [PATCH v8 28/29] accel/tcg/user-exec: Implement CPU-specific signal handler for loongarch64 hosts Song Gao
2021-11-01 10:45 ` WANG Xuerui
2021-11-01 11:21 ` gaosong
2021-11-02 3:18 ` WANG Xuerui
2021-11-01 9:51 ` [PATCH v8 29/29] linux-user: Add safe syscall handling " Song Gao
2021-11-02 8:31 ` [PATCH v8 00/29] Add LoongArch linux-user emulation support Philippe Mathieu-Daudé
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1635760311-20015-4-git-send-email-gaosong@loongson.cn \
--to=gaosong@loongson.cn \
--cc=alex.bennee@linaro.org \
--cc=alistair.francis@wdc.com \
--cc=bmeng.cn@gmail.com \
--cc=chenhuacai@loongson.cn \
--cc=f4bug@amsat.org \
--cc=i.qemu@xen0n.name \
--cc=laurent@vivier.eu \
--cc=maobibo@loongson.cn \
--cc=pbonzini@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=peterx@redhat.com \
--cc=philmd@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
--cc=thuth@redhat.com \
--cc=yangxiaojuan@loongson.cn \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.