From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Simon Horman <horms+renesas@verge.net.au>,
Magnus Damm <magnus.damm@gmail.com>,
Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>,
Kevin Hilman <khilman@kernel.org>,
Ulf Hansson <ulf.hansson@linaro.org>,
devicetree@vger.kernel.org, linux-pm@vger.kernel.org,
linux-renesas-soc@vger.kernel.org
Subject: Re: [PATCH v3 7/7] soc: renesas: Add r8a7795 SYSC PM Domain Binding Definitions
Date: Thu, 10 Mar 2016 04:32:27 +0200 [thread overview]
Message-ID: <1636171.nVxheqdHqq@avalon> (raw)
In-Reply-To: <1457551122-21838-8-git-send-email-geert+renesas@glider.be>
Hi Geert,
Thank you for the patch.
On Wednesday 09 March 2016 20:18:42 Geert Uytterhoeven wrote:
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> v3:
> - New.
> ---
> include/dt-bindings/power/r8a7795-sysc.h | 42 +++++++++++++++++++++++++++++
> 1 file changed, 42 insertions(+)
> create mode 100644 include/dt-bindings/power/r8a7795-sysc.h
>
> diff --git a/include/dt-bindings/power/r8a7795-sysc.h
> b/include/dt-bindings/power/r8a7795-sysc.h new file mode 100644
> index 0000000000000000..ee2e26ba605ef9a3
> --- /dev/null
> +++ b/include/dt-bindings/power/r8a7795-sysc.h
> @@ -0,0 +1,42 @@
> +/*
> + * Copyright (C) 2016 Glider bvba
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; version 2 of the License.
> + */
> +#ifndef __DT_BINDINGS_POWER_R8A7795_SYSC_H__
> +#define __DT_BINDINGS_POWER_R8A7795_SYSC_H__
> +
> +/*
> + * These power domain indices match the numbers of the interrupt bits
> + * representing the power areas in the various Interrupt Registers
> + * (e.g. SYSCISR, Interrupt Status Register)
> + */
> +
> +#define R8A7795_PD_CA57_CPU0 0
> +#define R8A7795_PD_CA57_CPU1 1
> +#define R8A7795_PD_CA57_CPU2 2
> +#define R8A7795_PD_CA57_CPU3 3
> +#define R8A7795_PD_CA53_CPU0 5
> +#define R8A7795_PD_CA53_CPU1 6
> +#define R8A7795_PD_CA53_CPU2 7
> +#define R8A7795_PD_CA53_CPU3 8
> +#define R8A7795_PD_A3VP 9
> +#define R8A7795_PD_CA57_SCU 12
> +#define R8A7795_PD_CR7 13
> +#define R8A7795_PD_A3VC 14
> +#define R8A7795_PD_3DG_A 17
> +#define R8A7795_PD_3DG_B 18
> +#define R8A7795_PD_3DG_C 19
> +#define R8A7795_PD_3DG_D 20
> +#define R8A7795_PD_CA53_SCU 21
> +#define R8A7795_PD_3DG_E 22
> +#define R8A7795_PD_A3IR 24
> +#define R8A7795_PD_A2VC0 25
> +#define R8A7795_PD_A2VC1 26
> +
> +/* Always-on power area */
> +#define R8A7795_PD_ALWAYS_ON 32
Shouldn't we also define the always-on power domain for the other SoCs
(patches 2/7 to 6/7 in this series) ? I know they're already covered by the
cpg power domain, but going forward I believe that standardizing on the SYSC
power domains would be beneficial. We of course have to keep backward
compatibility in the implementation.
This isn't an issue for this patch, so
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> +#endif /* __DT_BINDINGS_POWER_R8A7795_SYSC_H__ */
--
Regards,
Laurent Pinchart
next prev parent reply other threads:[~2016-03-10 2:32 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-09 19:18 [PATCH v3 0/7] PM / Domains: Add DT bindings for the R-Car System Controller Geert Uytterhoeven
2016-03-09 19:18 ` Geert Uytterhoeven
2016-03-09 19:18 ` [PATCH v3 2/7] soc: renesas: Add r8a7779 SYSC PM Domain Binding Definitions Geert Uytterhoeven
2016-03-10 2:40 ` Laurent Pinchart
2016-03-10 8:02 ` Geert Uytterhoeven
[not found] ` <1457551122-21838-1-git-send-email-geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
2016-03-09 19:18 ` [PATCH v3 1/7] PM / Domains: Add DT bindings for the R-Car System Controller Geert Uytterhoeven
2016-03-09 19:18 ` Geert Uytterhoeven
2016-03-10 2:24 ` Laurent Pinchart
2016-03-10 8:21 ` Geert Uytterhoeven
2016-03-17 19:17 ` Rob Herring
2016-03-09 19:18 ` [PATCH v3 3/7] soc: renesas: Add r8a7790 SYSC PM Domain Binding Definitions Geert Uytterhoeven
2016-03-09 19:18 ` Geert Uytterhoeven
2016-03-10 6:57 ` Laurent Pinchart
2016-03-10 8:26 ` Geert Uytterhoeven
2016-03-10 8:26 ` Geert Uytterhoeven
[not found] ` <CAMuHMdVy1eY1t55NSmdkJ=haFEPYWoTReecOOK-63XaJj6ztew-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-03-24 15:35 ` Geert Uytterhoeven
2016-03-24 15:35 ` Geert Uytterhoeven
2016-03-09 19:18 ` [PATCH v3 4/7] soc: renesas: Add r8a7791 " Geert Uytterhoeven
2016-03-09 19:18 ` Geert Uytterhoeven
[not found] ` <1457551122-21838-5-git-send-email-geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org>
2016-03-10 6:58 ` Laurent Pinchart
2016-03-10 6:58 ` Laurent Pinchart
2016-03-09 19:18 ` [PATCH v3 7/7] soc: renesas: Add r8a7795 " Geert Uytterhoeven
2016-03-09 19:18 ` Geert Uytterhoeven
2016-03-10 2:32 ` Laurent Pinchart [this message]
2016-03-10 8:17 ` Geert Uytterhoeven
2016-03-10 8:54 ` Laurent Pinchart
2016-03-09 19:18 ` [PATCH v3 5/7] soc: renesas: Add r8a7793 " Geert Uytterhoeven
2016-03-10 6:59 ` Laurent Pinchart
2016-03-10 8:09 ` Geert Uytterhoeven
2016-03-10 8:09 ` Geert Uytterhoeven
2016-03-24 16:09 ` Geert Uytterhoeven
2016-03-09 19:18 ` [PATCH v3 6/7] soc: renesas: Add r8a7794 " Geert Uytterhoeven
2016-03-10 2:35 ` Laurent Pinchart
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