From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
Mark Rutland <mark.rutland@arm.com>
Cc: stable@vger.kernel.org, will@kernel.org, james.morse@arm.com,
catalin.marinas@arm.com, alexandru.elisei@arm.com,
suzuki.poulose@arm.com
Subject: Re: [PATCH] arm64/kvm: extract ESR_ELx.EC only
Date: Mon, 8 Nov 2021 10:42:20 +0000 [thread overview]
Message-ID: <163636813221.2539373.16277310841922173561.b4-ty@kernel.org> (raw)
In-Reply-To: <20211103110545.4613-1-mark.rutland@arm.com>
On Wed, 3 Nov 2021 11:05:45 +0000, Mark Rutland wrote:
> Since ARMv8.0 the upper 32 bits of ESR_ELx have been RES0, and recently
> some of the upper bits gained a meaning and can be non-zero. For
> example, when FEAT_LS64 is implemented, ESR_ELx[36:32] contain ISS2,
> which for an ST64BV or ST64BV0 can be non-zero. This can be seen in ARM
> DDI 0487G.b, page D13-3145, section D13.2.37.
>
> Generally, we must not rely on RES0 bit remaining zero in future, and
> when extracting ESR_ELx.EC we must mask out all other bits.
>
> [...]
Applied to next, thanks!
[1/1] arm64/kvm: extract ESR_ELx.EC only
commit: 8bb084119f1acc2ec55ea085a97231e3ddb30782
Cheers,
M.
--
Without deviation from the norm, progress is not possible.
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
Mark Rutland <mark.rutland@arm.com>
Cc: stable@vger.kernel.org, will@kernel.org, james.morse@arm.com,
catalin.marinas@arm.com, alexandru.elisei@arm.com,
suzuki.poulose@arm.com
Subject: Re: [PATCH] arm64/kvm: extract ESR_ELx.EC only
Date: Mon, 8 Nov 2021 10:42:20 +0000 [thread overview]
Message-ID: <163636813221.2539373.16277310841922173561.b4-ty@kernel.org> (raw)
In-Reply-To: <20211103110545.4613-1-mark.rutland@arm.com>
On Wed, 3 Nov 2021 11:05:45 +0000, Mark Rutland wrote:
> Since ARMv8.0 the upper 32 bits of ESR_ELx have been RES0, and recently
> some of the upper bits gained a meaning and can be non-zero. For
> example, when FEAT_LS64 is implemented, ESR_ELx[36:32] contain ISS2,
> which for an ST64BV or ST64BV0 can be non-zero. This can be seen in ARM
> DDI 0487G.b, page D13-3145, section D13.2.37.
>
> Generally, we must not rely on RES0 bit remaining zero in future, and
> when extracting ESR_ELx.EC we must mask out all other bits.
>
> [...]
Applied to next, thanks!
[1/1] arm64/kvm: extract ESR_ELx.EC only
commit: 8bb084119f1acc2ec55ea085a97231e3ddb30782
Cheers,
M.
--
Without deviation from the norm, progress is not possible.
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next prev parent reply other threads:[~2021-11-08 10:42 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-03 11:05 [PATCH] arm64/kvm: extract ESR_ELx.EC only Mark Rutland
2021-11-03 11:05 ` Mark Rutland
2021-11-08 10:07 ` Will Deacon
2021-11-08 10:07 ` Will Deacon
2021-11-08 10:42 ` Marc Zyngier [this message]
2021-11-08 10:42 ` Marc Zyngier
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