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From: Marc Zyngier <maz@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>,
	linux-arm-kernel@lists.infradead.org
Cc: Will Deacon <will@kernel.org>,
	stable@vger.kernel.org, Chris January <Chris.January@arm.com>
Subject: Re: [PATCH] arm64: KVM: Avoid setting the upper 32 bits of TCR_EL2 and CPTR_EL2 to 1
Date: Thu, 25 Nov 2021 15:53:27 +0000	[thread overview]
Message-ID: <163785558760.643582.3194076886252038382.b4-ty@kernel.org> (raw)
In-Reply-To: <20211125152014.2806582-1-catalin.marinas@arm.com>

On Thu, 25 Nov 2021 15:20:14 +0000, Catalin Marinas wrote:
> Having a signed (1 << 31) constant for TCR_EL2_RES1 and CPTR_EL2_TCPAC
> causes the upper 32-bit to be set to 1 when assigning them to a 64-bit
> variable. Bit 32 in TCR_EL2 is no longer RES0 in ARMv8.7: with FEAT_LPA2
> it changes the meaning of bits 49:48 and 9:8 in the stage 1 EL2 page
> table entries. As a result of the sign-extension, a non-VHE kernel can
> no longer boot on a model with ARMv8.7 enabled.
> 
> [...]

Applied to fixes, thanks!

[1/1] arm64: KVM: Avoid setting the upper 32 bits of TCR_EL2 and CPTR_EL2 to 1
      commit: 1f80d15020d7f130194821feb1432b67648c632d

Cheers,

	M.
-- 
Without deviation from the norm, progress is not possible.



WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Catalin Marinas <catalin.marinas@arm.com>,
	linux-arm-kernel@lists.infradead.org
Cc: Will Deacon <will@kernel.org>,
	stable@vger.kernel.org, Chris January <Chris.January@arm.com>
Subject: Re: [PATCH] arm64: KVM: Avoid setting the upper 32 bits of TCR_EL2 and CPTR_EL2 to 1
Date: Thu, 25 Nov 2021 15:53:27 +0000	[thread overview]
Message-ID: <163785558760.643582.3194076886252038382.b4-ty@kernel.org> (raw)
In-Reply-To: <20211125152014.2806582-1-catalin.marinas@arm.com>

On Thu, 25 Nov 2021 15:20:14 +0000, Catalin Marinas wrote:
> Having a signed (1 << 31) constant for TCR_EL2_RES1 and CPTR_EL2_TCPAC
> causes the upper 32-bit to be set to 1 when assigning them to a 64-bit
> variable. Bit 32 in TCR_EL2 is no longer RES0 in ARMv8.7: with FEAT_LPA2
> it changes the meaning of bits 49:48 and 9:8 in the stage 1 EL2 page
> table entries. As a result of the sign-extension, a non-VHE kernel can
> no longer boot on a model with ARMv8.7 enabled.
> 
> [...]

Applied to fixes, thanks!

[1/1] arm64: KVM: Avoid setting the upper 32 bits of TCR_EL2 and CPTR_EL2 to 1
      commit: 1f80d15020d7f130194821feb1432b67648c632d

Cheers,

	M.
-- 
Without deviation from the norm, progress is not possible.



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  reply	other threads:[~2021-11-25 15:55 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-25 15:20 [PATCH] arm64: KVM: Avoid setting the upper 32 bits of TCR_EL2 and CPTR_EL2 to 1 Catalin Marinas
2021-11-25 15:20 ` Catalin Marinas
2021-11-25 15:53 ` Marc Zyngier [this message]
2021-11-25 15:53   ` Marc Zyngier

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