From: Heiko Stuebner <heiko@sntech.de>
To: Brian Norris <briannorris@chromium.org>
Cc: Heiko Stuebner <heiko@sntech.de>,
linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, zain wang <wzz@rock-chips.com>,
linux-arm-kernel@lists.infradead.org,
Lin Huang <hl@rock-chips.com>,
Douglas Anderson <dianders@chromium.org>
Subject: Re: [PATCH v2] arm64: dts: rockchip: Set RK3399-Gru PCLK_EDP to 24 MHz
Date: Sun, 4 Sep 2022 19:22:17 +0200 [thread overview]
Message-ID: <166231195330.2423948.14822467158233209548.b4-ty@sntech.de> (raw)
In-Reply-To: <20220830131212.v2.1.I98d30623f13b785ca77094d0c0fd4339550553b6@changeid>
On Tue, 30 Aug 2022 13:16:17 -0700, Brian Norris wrote:
> We've found the AUX channel to be less reliable with PCLK_EDP at a
> higher rate (typically 25 MHz). This is especially important on systems
> with PSR-enabled panels (like Gru-Kevin), since we make heavy, constant
> use of AUX.
>
> According to Rockchip, using any rate other than 24 MHz can cause
> "problems between syncing the PHY an PCLK", which leads to all sorts of
> unreliabilities around register operations.
Applied, thanks!
[1/1] arm64: dts: rockchip: Set RK3399-Gru PCLK_EDP to 24 MHz
commit: 8123437cf46ea5a0f6ca5cb3c528d8b6db97b9c2
Best regards,
--
Heiko Stuebner <heiko@sntech.de>
WARNING: multiple messages have this Message-ID (diff)
From: Heiko Stuebner <heiko@sntech.de>
To: Brian Norris <briannorris@chromium.org>
Cc: Heiko Stuebner <heiko@sntech.de>,
linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, zain wang <wzz@rock-chips.com>,
linux-arm-kernel@lists.infradead.org,
Lin Huang <hl@rock-chips.com>,
Douglas Anderson <dianders@chromium.org>
Subject: Re: [PATCH v2] arm64: dts: rockchip: Set RK3399-Gru PCLK_EDP to 24 MHz
Date: Sun, 4 Sep 2022 19:22:17 +0200 [thread overview]
Message-ID: <166231195330.2423948.14822467158233209548.b4-ty@sntech.de> (raw)
In-Reply-To: <20220830131212.v2.1.I98d30623f13b785ca77094d0c0fd4339550553b6@changeid>
On Tue, 30 Aug 2022 13:16:17 -0700, Brian Norris wrote:
> We've found the AUX channel to be less reliable with PCLK_EDP at a
> higher rate (typically 25 MHz). This is especially important on systems
> with PSR-enabled panels (like Gru-Kevin), since we make heavy, constant
> use of AUX.
>
> According to Rockchip, using any rate other than 24 MHz can cause
> "problems between syncing the PHY an PCLK", which leads to all sorts of
> unreliabilities around register operations.
Applied, thanks!
[1/1] arm64: dts: rockchip: Set RK3399-Gru PCLK_EDP to 24 MHz
commit: 8123437cf46ea5a0f6ca5cb3c528d8b6db97b9c2
Best regards,
--
Heiko Stuebner <heiko@sntech.de>
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Heiko Stuebner <heiko@sntech.de>
To: Brian Norris <briannorris@chromium.org>
Cc: Heiko Stuebner <heiko@sntech.de>,
linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, zain wang <wzz@rock-chips.com>,
linux-arm-kernel@lists.infradead.org,
Lin Huang <hl@rock-chips.com>,
Douglas Anderson <dianders@chromium.org>
Subject: Re: [PATCH v2] arm64: dts: rockchip: Set RK3399-Gru PCLK_EDP to 24 MHz
Date: Sun, 4 Sep 2022 19:22:17 +0200 [thread overview]
Message-ID: <166231195330.2423948.14822467158233209548.b4-ty@sntech.de> (raw)
In-Reply-To: <20220830131212.v2.1.I98d30623f13b785ca77094d0c0fd4339550553b6@changeid>
On Tue, 30 Aug 2022 13:16:17 -0700, Brian Norris wrote:
> We've found the AUX channel to be less reliable with PCLK_EDP at a
> higher rate (typically 25 MHz). This is especially important on systems
> with PSR-enabled panels (like Gru-Kevin), since we make heavy, constant
> use of AUX.
>
> According to Rockchip, using any rate other than 24 MHz can cause
> "problems between syncing the PHY an PCLK", which leads to all sorts of
> unreliabilities around register operations.
Applied, thanks!
[1/1] arm64: dts: rockchip: Set RK3399-Gru PCLK_EDP to 24 MHz
commit: 8123437cf46ea5a0f6ca5cb3c528d8b6db97b9c2
Best regards,
--
Heiko Stuebner <heiko@sntech.de>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-09-04 17:22 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-30 20:16 [PATCH v2] arm64: dts: rockchip: Set RK3399-Gru PCLK_EDP to 24 MHz Brian Norris
2022-08-30 20:16 ` Brian Norris
2022-08-30 20:16 ` Brian Norris
2022-09-04 17:22 ` Heiko Stuebner [this message]
2022-09-04 17:22 ` Heiko Stuebner
2022-09-04 17:22 ` Heiko Stuebner
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