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From: Patchwork <patchwork@emeril.freedesktop.org>
To: "Suraj Kandpal" <suraj.kandpal@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable YCbCr420 for VDSC (rev2)
Date: Mon, 17 Oct 2022 04:47:35 -0000	[thread overview]
Message-ID: <166598205576.13567.6281489259122444082@emeril.freedesktop.org> (raw)
In-Reply-To: <20221014152622.233398-1-suraj.kandpal@intel.com>

== Series Details ==

Series: Enable YCbCr420 for VDSC (rev2)
URL   : https://patchwork.freedesktop.org/series/109723/
State : warning

== Summary ==

Error: dim checkpatch failed
d4a9778e02e4 drm/i915/dp: Check if DSC supports the given output_format
3e53847fd2c1 drm/i915: Adding the new registers for DSC
6f3d23b30a32 drm/i915: Enable YCbCr420 for VDSC
-:189: CHECK:MACRO_ARG_REUSE: Macro argument reuse '_row' - possible side-effects?
#189: FILE: drivers/gpu/drm/i915/display/intel_qp_tables.c:447:
+#define PARAM_TABLE(_minmax, _bpc, _row, _col, _is_420)  do { \
+	if (bpc == (_bpc)) {	\
+		if (_is_420)	\
+			return rc_range_##_minmax##qp420_##_bpc##bpc[_row][_col]; \
+		else	\
+			return rc_range_##_minmax##qp444_##_bpc##bpc[_row][_col]; \
+	}	\
 } while (0)

-:189: CHECK:MACRO_ARG_REUSE: Macro argument reuse '_col' - possible side-effects?
#189: FILE: drivers/gpu/drm/i915/display/intel_qp_tables.c:447:
+#define PARAM_TABLE(_minmax, _bpc, _row, _col, _is_420)  do { \
+	if (bpc == (_bpc)) {	\
+		if (_is_420)	\
+			return rc_range_##_minmax##qp420_##_bpc##bpc[_row][_col]; \
+		else	\
+			return rc_range_##_minmax##qp444_##_bpc##bpc[_row][_col]; \
+	}	\
 } while (0)

total: 0 errors, 0 warnings, 2 checks, 228 lines checked
a6c473a5a5c0 drm/i915: Fill in native_420 field



  parent reply	other threads:[~2022-10-17  4:47 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-14 15:26 [Intel-gfx] [PATCH v4 0/4] Enable YCbCr420 for VDSC Suraj Kandpal
2022-10-14 15:26 ` [Intel-gfx] [PATCH v4 1/4] drm/i915/dp: Check if DSC supports the given output_format Suraj Kandpal
2022-10-14 15:26 ` [Intel-gfx] [PATCH v4 2/4] drm/i915: Adding the new registers for DSC Suraj Kandpal
2022-10-14 15:26 ` [Intel-gfx] [PATCH v4 3/4] drm/i915: Enable YCbCr420 for VDSC Suraj Kandpal
2022-10-14 15:26 ` [Intel-gfx] [PATCH v4 4/4] drm/i915: Fill in native_420 field Suraj Kandpal
2022-10-14 16:16 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable YCbCr420 for VDSC Patchwork
2022-10-14 16:16 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-10-14 16:39 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-10-14 17:55 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-10-17  4:47 ` Patchwork [this message]
2022-10-17  5:02 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for Enable YCbCr420 for VDSC (rev2) Patchwork
2022-10-17 13:10 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable YCbCr420 for VDSC (rev3) Patchwork
2022-10-17 13:24 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-10-17 15:46 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-10-18  0:08 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-10-19 15:41 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
2022-11-07  7:26 ` [Intel-gfx] [PATCH v5 0/8] Enable YCbCr420 for VDSC Suraj Kandpal
2022-11-07  7:26   ` [Intel-gfx] [PATCH v5 1/8] drm/dp_helper: Add helper to check if the sink supports given format with DSC Suraj Kandpal
2022-11-07  7:26   ` [Intel-gfx] [PATCH v5 2/8] drm/i915/dp: Check if DSC supports the given output_format Suraj Kandpal
2022-11-07  7:26   ` [Intel-gfx] [PATCH v5 3/8] drm/i915: Adding the new registers for DSC Suraj Kandpal
2022-11-07  7:26   ` [Intel-gfx] [PATCH v5 4/8] drm/i915: Enable YCbCr420 for VDSC Suraj Kandpal
2022-11-07  7:26   ` [Intel-gfx] [PATCH v5 5/8] drm/i915: Fill in native_420 field Suraj Kandpal
2022-11-07  7:26   ` [Intel-gfx] [PATCH v5 6/8] drm/i915/dsc: Add debugfs entry to validate DSC YCbCr420 Suraj Kandpal
2022-11-07  7:26   ` [Intel-gfx] [PATCH v5 7/8] drm/i915/dsc: Allow DSC only with YCbCr420 format when forced from debugfs Suraj Kandpal
2022-11-07  7:26   ` [Intel-gfx] [PATCH v5 8/8] drm/i915: Code styling fixes Suraj Kandpal
2022-11-07  7:34 ` [Intel-gfx] [PATCH v5 0/8] Enable YCbCr420 for VDSC Suraj Kandpal
2022-11-07  7:34   ` [Intel-gfx] [PATCH v5 1/8] drm/dp_helper: Add helper to check if the sink supports given format with DSC Suraj Kandpal
2022-11-07  7:34   ` [Intel-gfx] [PATCH v5 2/8] drm/i915/dp: Check if DSC supports the given output_format Suraj Kandpal
2022-11-07  7:34   ` [Intel-gfx] [PATCH v5 3/8] drm/i915: Adding the new registers for DSC Suraj Kandpal
2022-11-07  7:34   ` [Intel-gfx] [PATCH v5 4/8] drm/i915: Enable YCbCr420 for VDSC Suraj Kandpal
2022-11-07  7:34   ` [Intel-gfx] [PATCH v5 5/8] drm/i915: Fill in native_420 field Suraj Kandpal
2022-11-07  7:34   ` [Intel-gfx] [PATCH v5 6/8] drm/i915/dsc: Add debugfs entry to validate DSC YCbCr420 Suraj Kandpal
2022-11-07  7:34   ` [Intel-gfx] [PATCH v5 7/8] drm/i915/dsc: Allow DSC only with YCbCr420 format when forced from debugfs Suraj Kandpal
2022-11-07  7:34   ` [Intel-gfx] [PATCH v5 8/8] drm/i915: Code styling fixes Suraj Kandpal
2022-11-07  8:30 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Enable YCbCr420 for VDSC (rev3) Patchwork
2022-11-07  8:46 ` [Intel-gfx] [PATCH 0/8] Enable YCbCr420 for VDSC Suraj Kandpal
2022-11-07  8:46   ` [Intel-gfx] [PATCH 1/8] drm/dp_helper: Add helper to check if the sink supports given format with DSC Suraj Kandpal
2022-11-07  8:46   ` [Intel-gfx] [PATCH 2/8] drm/i915/dp: Check if DSC supports the given output_format Suraj Kandpal
2022-11-07  8:46   ` [Intel-gfx] [PATCH 3/8] drm/i915: Adding the new registers for DSC Suraj Kandpal
2022-11-07  8:46   ` [Intel-gfx] [PATCH 4/8] drm/i915: Enable YCbCr420 for VDSC Suraj Kandpal
2022-11-07  8:46   ` [Intel-gfx] [PATCH 5/8] drm/i915: Fill in native_420 field Suraj Kandpal
2022-11-07  8:46   ` [Intel-gfx] [PATCH 6/8] drm/i915/dsc: Add debugfs entry to validate DSC YCbCr420 Suraj Kandpal
2022-11-07  8:46   ` [Intel-gfx] [PATCH 7/8] drm/i915/dsc: Allow DSC only with YCbCr420 format when forced from debugfs Suraj Kandpal
2022-11-07  8:46   ` [Intel-gfx] [PATCH 8/8] drm/i915: Code styling fixes Suraj Kandpal
  -- strict thread matches above, loose matches on Subject: below --
2022-09-21 10:55 [Intel-gfx] [PATCH 0/3] Enable YCbCr420 for VDSC Kandpal, Suraj
2022-09-26  8:43 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable YCbCr420 for VDSC (rev2) Patchwork

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