From: Catalin Marinas <catalin.marinas@arm.com>
To: linux-efi@vger.kernel.org, Ard Biesheuvel <ardb@kernel.org>
Cc: Will Deacon <will@kernel.org>,
linux-arm-kernel@lists.infradead.org,
Marc Zyngier <maz@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Subject: Re: [PATCH v7 0/6] arm64: Permit EFI boot with MMU and caches on
Date: Tue, 24 Jan 2023 12:10:30 +0000 [thread overview]
Message-ID: <167456222617.325679.10076226441218692662.b4-ty@arm.com> (raw)
In-Reply-To: <20230111102236.1430401-1-ardb@kernel.org>
On Wed, 11 Jan 2023 11:22:30 +0100, Ard Biesheuvel wrote:
> The purpose of this series is to remove any explicit cache maintenance
> for coherency during early boot. Software managed coherency is error
> prone and tedious, and running with the MMU off is generally bad for
> performance, and it becomes unnecessary if we simply retain the
> cacheable 1:1 mapping of all of system RAM provided by EFI, and use it
> to populate the initial ID map page tables. After setting up this
> preliminary ID map, we disable the MMU, drop to EL1, reprogram the MAIR,
> TCR and SCTLR registers as before, and proceed as usual, avoiding the
> need for any manipulations of memory while the MMU and caches are off.
>
> [...]
Applied to arm64 (for-next/efi-boot-mmu-on), thanks!
[1/6] arm64: head: Move all finalise_el2 calls to after __enable_mmu
https://git.kernel.org/arm64/c/82e4958800c0
[2/6] arm64: kernel: move identity map out of .text mapping
https://git.kernel.org/arm64/c/af7249b317e4
[3/6] arm64: head: record the MMU state at primary entry
https://git.kernel.org/arm64/c/9d7c13e5dde3
[4/6] arm64: head: avoid cache invalidation when entering with the MMU on
https://git.kernel.org/arm64/c/32b135a7fafe
[5/6] arm64: head: Clean the ID map and the HYP text to the PoC if needed
https://git.kernel.org/arm64/c/3dcf60bbfd28
[6/6] efi: arm64: enter with MMU and caches enabled
https://git.kernel.org/arm64/c/617861703830
--
Catalin
WARNING: multiple messages have this Message-ID (diff)
From: Catalin Marinas <catalin.marinas@arm.com>
To: linux-efi@vger.kernel.org, Ard Biesheuvel <ardb@kernel.org>
Cc: Will Deacon <will@kernel.org>,
linux-arm-kernel@lists.infradead.org,
Marc Zyngier <maz@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Subject: Re: [PATCH v7 0/6] arm64: Permit EFI boot with MMU and caches on
Date: Tue, 24 Jan 2023 12:10:30 +0000 [thread overview]
Message-ID: <167456222617.325679.10076226441218692662.b4-ty@arm.com> (raw)
In-Reply-To: <20230111102236.1430401-1-ardb@kernel.org>
On Wed, 11 Jan 2023 11:22:30 +0100, Ard Biesheuvel wrote:
> The purpose of this series is to remove any explicit cache maintenance
> for coherency during early boot. Software managed coherency is error
> prone and tedious, and running with the MMU off is generally bad for
> performance, and it becomes unnecessary if we simply retain the
> cacheable 1:1 mapping of all of system RAM provided by EFI, and use it
> to populate the initial ID map page tables. After setting up this
> preliminary ID map, we disable the MMU, drop to EL1, reprogram the MAIR,
> TCR and SCTLR registers as before, and proceed as usual, avoiding the
> need for any manipulations of memory while the MMU and caches are off.
>
> [...]
Applied to arm64 (for-next/efi-boot-mmu-on), thanks!
[1/6] arm64: head: Move all finalise_el2 calls to after __enable_mmu
https://git.kernel.org/arm64/c/82e4958800c0
[2/6] arm64: kernel: move identity map out of .text mapping
https://git.kernel.org/arm64/c/af7249b317e4
[3/6] arm64: head: record the MMU state at primary entry
https://git.kernel.org/arm64/c/9d7c13e5dde3
[4/6] arm64: head: avoid cache invalidation when entering with the MMU on
https://git.kernel.org/arm64/c/32b135a7fafe
[5/6] arm64: head: Clean the ID map and the HYP text to the PoC if needed
https://git.kernel.org/arm64/c/3dcf60bbfd28
[6/6] efi: arm64: enter with MMU and caches enabled
https://git.kernel.org/arm64/c/617861703830
--
Catalin
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next prev parent reply other threads:[~2023-01-24 12:10 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-11 10:22 [PATCH v7 0/6] arm64: Permit EFI boot with MMU and caches on Ard Biesheuvel
2023-01-11 10:22 ` Ard Biesheuvel
2023-01-11 10:22 ` [PATCH v7 1/6] arm64: head: Move all finalise_el2 calls to after __enable_mmu Ard Biesheuvel
2023-01-11 10:22 ` Ard Biesheuvel
2023-01-11 10:22 ` [PATCH v7 2/6] arm64: kernel: move identity map out of .text mapping Ard Biesheuvel
2023-01-11 10:22 ` Ard Biesheuvel
2023-02-03 18:08 ` Nathan Chancellor
2023-02-03 18:08 ` Nathan Chancellor
2023-02-03 22:41 ` Ard Biesheuvel
2023-02-03 22:41 ` Ard Biesheuvel
2023-01-11 10:22 ` [PATCH v7 3/6] arm64: head: record the MMU state at primary entry Ard Biesheuvel
2023-01-11 10:22 ` Ard Biesheuvel
2023-01-11 10:22 ` [PATCH v7 4/6] arm64: head: avoid cache invalidation when entering with the MMU on Ard Biesheuvel
2023-01-11 10:22 ` Ard Biesheuvel
2023-01-25 16:32 ` Nathan Chancellor
2023-01-25 16:32 ` Nathan Chancellor
2023-01-25 16:42 ` Ard Biesheuvel
2023-01-25 16:42 ` Ard Biesheuvel
2023-01-11 10:22 ` [PATCH v7 5/6] arm64: head: Clean the ID map and the HYP text to the PoC if needed Ard Biesheuvel
2023-01-11 10:22 ` Ard Biesheuvel
2023-01-11 10:22 ` [PATCH v7 6/6] efi: arm64: enter with MMU and caches enabled Ard Biesheuvel
2023-01-11 10:22 ` Ard Biesheuvel
2023-01-11 10:26 ` [PATCH v7 0/6] arm64: Permit EFI boot with MMU and caches on Ard Biesheuvel
2023-01-11 10:26 ` Ard Biesheuvel
2023-01-24 12:10 ` Catalin Marinas [this message]
2023-01-24 12:10 ` Catalin Marinas
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